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429-Pin Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2012 - 0x64

Abstract: No abstract text available
Text: PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P SCANEN ARXBIT5 READY ESCLK EMOSI ECSB EMISO RUN , Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , EEPROM HOLT INTEGRATED CIRCUITS 5 HI-3210 PIN DESCRIPTIONS SIGNAL AACK AINT ARX0N ARX0P ARX1N , MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes high when , repeat time for ARINC TX3 Enables Interrupts on AINT pin Sets flag value for ARINC 429 Receive FIFO Sets


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PDF HI-3210 HI-3210 64-PIN 64PCS 0x64
2011 - ARINC-429 driver

Abstract: HI-3210 HI-8448 HI-8592 application notes on ARINC-429 receiver 0x802c arinc429 HOLT INC DS3210 0x802e
Text: ARX0N ARX0P SCANEN ARXBIT5 READY ESCLK EMOSI ECSB EMISO RUN ARXBIT4 ATXMSK MRST PIN , HMOSI HCSB MINT MINTACK APPLICATION 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3210 Rev. New) 05/11 HI-3210 BLOCK DIAGRAM , 429 Transmit Buses HI-3210 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P , Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes


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PDF HI-3210 HI-3210 64-PIN 64PCS ARINC-429 driver HI-8448 HI-8592 application notes on ARINC-429 receiver 0x802c arinc429 HOLT INC DS3210 0x802e
2012 - aftv

Abstract: No abstract text available
Text: PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P SCANEN ARXBIT5 READY ESCLK EMOSI ECSB EMISO RUN , Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , -3210 ECSB ESCLK EMOSI EMISO Auto-Initialization EEPROM HOLT INTEGRATED CIRCUITS 5 HI-3210 PIN , Reset to HI-3210 Active High Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization , AINT pin Sets flag value for ARINC 429 Receive FIFO Sets loop-back self-test mode Indicates which FIFOs


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PDF HI-3210 HI-3210 64-PIN 64PCS aftv
2014 - Not Available

Abstract: No abstract text available
Text: PIN CONFIGURATION 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 The HI , ARXBIT1 HMISO HSCLK HMOSI HCSB MINT MINTACK APPLICATION 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3210 Rev. G) 01/14 HI , 429 Transmit Buses HI-3210 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P , Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes


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PDF HI-3210 HI-3210 64-PIN 64PCS
2013 - 0x4018

Abstract: HI-3200
Text: PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P SCANEN ARXBIT5 READY ESCLK EMOSI ECSB EMISO RUN , Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , EEPROM HOLT INTEGRATED CIRCUITS 5 HI-3210 PIN DESCRIPTIONS SIGNAL AACK AINT ARX0N ARX0P ARX1N , MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes high when , AINT pin Sets flag value for ARINC 429 Receive FIFO Sets loop-back self-test mode Indicates which FIFOs


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PDF HI-3210 HI-3210 64-PIN 64PCS 0x4018 HI-3200
2013 - Not Available

Abstract: No abstract text available
Text: Pin programmable - requires no MCU or software control ! No need for certification to RTCA DO , circuitry for receiver inputs allows compliance with RTCA/DO-160G, Section 22 Level 3 Pin Injection Tests. ! 128- pin HI-8476 option provides enhanced label filtering and output flexibility ! Certifiable to RTCA DO-254, “Design Assurance for Airborne Electronic Hardware” The 64- pin HI , enable reception of a single label or group of labels. The 128- pin HI-8476 option increases the label


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PDF HI-8475, HI-8476 HI-8475 DO-178B, 128-PIN 128PQS
2013 - ARINC 763

Abstract: HI-8470PQTF 238k DO-160G RTCA DO-160 cn87
Text: protected to RTCA/DO-160G, Section 22 Level 3 Pin Injection Test Waveform Set A (3 & 4), Set B (3 & 5A) and Set Z (3 & 5B) without the use of any external components. Pin programmable - requires no MCU or , On-chip ARINC 429 Transmitter and Line Driver 3.3 V single supply operation Pin programmable transmit , compliance with RTCA/DO-160G, Section 22 Level 3 Pin Injection Tests. Adjustable sense thresholds DO , - 1 GNDCONV GND Figure 2 HOLT INTEGRATED CIRCUITS 2 HI-8470 PIN DESCRIPTIONS PIN 1 2


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PDF HI-8470 16-Channel HI-8470 8470PQ DS8470 100-PIN 100PQS ARINC 763 HI-8470PQTF 238k DO-160G RTCA DO-160 cn87
2013 - HI-3210

Abstract: No abstract text available
Text: PIN CONFIGURATION 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 The HI , ARXBIT1 HMISO HSCLK HMOSI HCSB MINT MINTACK APPLICATION 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3210 Rev. E) 10/13 HI , 429 Transmit Buses HI-3210 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P , Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes


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PDF HI-3210 HI-3210 64-PIN 64PCS
2014 - Not Available

Abstract: No abstract text available
Text: PIN CONFIGURATION 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 The HI , ARXBIT1 HMISO HSCLK HMOSI HCSB MINT MINTACK APPLICATION 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3210 Rev. H) 08/14 HI , 429 Transmit Buses HI-3210 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P , RESET AND START-UP section. Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization


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PDF HI-3210 HI-3210 64-PIN 64PCS
2014 - Not Available

Abstract: No abstract text available
Text: rapid start-up or operation without a host CPU. PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P , it comes in an 80- pin PQFP package with eight instead of two ARINC 429 bit monitor pins. HI-3200 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , -3201 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P ARX1N ARX1P ARX2N ARX2P ARX3N , with MODE0 pin , PROG initiates HI-3200 Auto-Initialization EEPROM programming routine READY goes high


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PDF HI-3200, HI-3201 HI-3200 80PTQS
2013 - arinc 825

Abstract: HI-3110 HI-3200 HOLT INC
Text: -3110 integrated CAN controller / transceiver. The HI-3201 is identical to the HI-3200 except it comes in an 80- pin , Auto-initialization feature allows power-on configuration or independent operation without CPU PIN CONFIGURATION , -3110 CAN Bus ARINC 429 4 x Transmit HI-3200 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3200 Rev. C) ARX7P ARX7N MODE0 CMOSI MODE1 MCLK MODE2 , , Label 01 Channel 0, Label 00 TRANSMIT TIMER CCSB CSCLK CMOSI CMISO HI-3200, HI-3201 PIN


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PDF HI-3200, HI-3201 HI-3200 80PTQS arinc 825 HI-3110 HOLT INC
1998 - dd-03282

Abstract: TMA4 application notes on ARINC-429 receiver
Text: OPERATION When an error condition occurs, the ERROR output pin goes low to indicate the presence of an error. The error pin will go high again when the Error Status Register is clear. Each of these bits is , interrupt or PULSE interrupt via TABLE 3. DD-00429VP (144- PIN TQFP) ASIC PINOUTS PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 DESCRIPTION PIN , or RD/WR DTACK ERROR MASTER RESET +5V BIST TOA (N/C) BIST TOB (N/C) GND PIN NO. 73 74 75 76 77 78 79


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PDF DD-00429 DD-00429 DD00429 16-bit DD-00429, DD-03282 1-800-DDC-5757 A5976 TMA4 application notes on ARINC-429 receiver
2013 - Not Available

Abstract: No abstract text available
Text: PIN CONFIGURATION 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 The HI , ARXBIT1 HMISO HSCLK HMOSI HCSB MINT MINTACK APPLICATION 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3210 Rev. F) 11/13 HI , 429 Transmit Buses HI-3210 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P , Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes


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PDF HI-3210 HI-3210 64-PIN 64PCS
2013 - ARINC 763

Abstract: No abstract text available
Text: protected to RTCA/DO-160G, Section 22 Level 3 Pin Injection Test Waveform Set A (3 & 4), Set B (3 & 5A) and Set Z (3 & 5B) without the use of any external components. Pin programmable - requires no MCU or , On-chip ARINC 429 Transmitter and Line Driver 3.3 V single supply operation Pin programmable transmit , compliance with RTCA/DO-160G, Section 22 Level 3 Pin Injection Tests. Adjustable sense thresholds DO , - 1 GNDCONV GND Figure 2 HOLT INTEGRATED CIRCUITS 2 HI-8470 PIN DESCRIPTIONS PIN 1 2


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PDF HI-8470 16-Channel HI-8470 DS8470 100-PIN 100PQS ARINC 763
1996 - rx1a

Abstract: 4 channel ARINC-429 adapter rx3b RX-2B DD-42999SO RX-1a ARINC-429 adapter RX2b ARINC 600 Connector size 3 dimensions tx-1a
Text: Software 68 PIN PCMCIA CONNECTOR CE1, CE2, WE/PGM, IORD, IOWR, RESET REG, OE PCMCIA INTERFACE ADAPTER D0-D15 DD-42900 ARINC 429 INTERFACE FIFO 0 33- PIN ARINC 429 CONNECTOR RCV 0 RDYBSY , AND TRANSMITTER MODULE INPUT PINOUT (J1) PIN NO. DESCRIPTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15-16 , (TTL) TX0_SEL TX1_SEL N/C VCC GND PIN NO. DESCRIPTION 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 , PIN 1 P2 P1 PIN 1 FIGURE 2. PCMCIA CABLE ASSEMBLY A A J1 PIN 33 PIN 1 B PIN 34


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PDF DD-42940M2-300 DD-42940M2 DD-42900 DD42940M2 allow03) DD-42950SO 95/98/NT/2000 rx1a 4 channel ARINC-429 adapter rx3b RX-2B DD-42999SO RX-1a ARINC-429 adapter RX2b ARINC 600 Connector size 3 dimensions tx-1a
2013 - Not Available

Abstract: No abstract text available
Text: PIN CONFIGURATION 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 The HI , ARXBIT1 HMISO HSCLK HMOSI HCSB MINT MINTACK APPLICATION 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3210 Rev. D) 08/13 HI , 429 Transmit Buses HI-3210 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P , Multiplexed with MODE0 pin , PROG initiates HI-3210 Auto-Initialization EEPROM programming routine READY goes


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PDF HI-3210 HI-3210 64-PIN 64PCS
2013 - HI3200

Abstract: No abstract text available
Text: rapid start-up or operation without a host CPU. PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P , it comes in an 80- pin PQFP package with eight instead of two ARINC 429 bit monitor pins. HI-3200 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , -3201 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P ARX1N ARX1P ARX2N ARX2P ARX3N , with MODE0 pin , PROG initiates HI-3200 Auto-Initialization EEPROM programming routine READY goes high


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PDF HI-3200, HI-3201 HI-3200 80PTQS HI3200
1996 - RX-2B

Abstract: rx1a RX2B rx3b ARINC 600 Connector size 3 dimensions 7402 pinouts 4 channel ARINC-429 adapter
Text: 32 Transmit FIFO's · Built-In Fault Detection · Free Library Software 68 PIN PCMCIA CONNECTOR , 429 INTERFACE FIFO 0 33- PIN ARINC 429 CONNECTOR RCV 0 RDYBSY/IREQ, INPACK, WP/IOIS16, BVDI , AND TRANSMITTER MODULE INPUT PINOUT (J1) PIN NO. DESCRIPTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15-16 , (TTL) TX0_SEL TX1_SEL N/C VCC GND PIN NO. DESCRIPTION 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 N/C PIN 1 20 37 19 GND N/C GND N/C GND USA P2 N/C GND N/C GND N/C N/C N/C GND


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PDF DD-42940M2-300 DD-42940M2 DD-42900 DD-4294to 1-800-DDC-5757 DD-42941 DD-42942 RX-2B rx1a RX2B rx3b ARINC 600 Connector size 3 dimensions 7402 pinouts 4 channel ARINC-429 adapter
2013 - Not Available

Abstract: No abstract text available
Text: Pin programmable - requires no MCU or software control (no need for DO-178 certification) ! , ARINC 429 Transmitter and Line Driver ! 3.3 V single supply operation ! Pin programmable , line driver allows compliance with RTCA/DO-160G, Section 22 Level 3 Pin Injection Tests. ! , lightning protected to RTCA/DO-160G, Section 22 Level 3 Pin Injection Test Waveform Set A (3 & 4), Set B (3 , CN+ 2 CN- 1 GNDCONV GND Figure 2 HOLT INTEGRATED CIRCUITS 2 HI-8470 PIN


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PDF HI-8470 16-Channel HI-8470 DO-178 100-PIN 100PQS
2011 - HI3-201-5

Abstract: ARINC825 arinc 825 HI32015 HI-3110 0x8031 HI3-201 HI-8448 HI-8592 ARINC429
Text: rapid start-up or operation without a host CPU. PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P , it comes in an 80- pin PQFP package with eight instead of two ARINC 429 bit monitor pins. HI-3200 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , -3201 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P ARX1N ARX1P ARX2N ARX2P ARX3N , with MODE0 pin , PROG initiates HI-3200 Auto-Initialization EEPROM programming routine READY goes high


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PDF HI-3200, HI-3201 HI-3200 80PTQS HI3-201-5 ARINC825 arinc 825 HI32015 HI-3110 0x8031 HI3-201 HI-8448 HI-8592 ARINC429
2013 - HI-3593

Abstract: No abstract text available
Text: 23 44 - Pin Plastic 7mm x 7mm Chip-Scale Package (QFN) The Serial Peripheral Interface , - PIN CONFIGURATIONS (Top View) 44 - Pin Plastic Quad Flat Pack (PQFP) Independent data rates for , -1 MB1-3 MB1-2 MB1-1 GND HOLT INTEGRATED CIRCUITS 2 2.2uF HI-3593 PIN DESCRIPTIONS , pin Goes high as defined by Flag / Interrupt Assignment Register Receiver 1 programmable Interrupt pin Goes high as defined by Flag / Interrupt Assignment Register Goes high when the Transmit FIFO is


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PDF HI-3593 RIN1A-40 RIN1B-40 RIN2A-40 RIN2B-40 HI-3593PQI HI-3593PQT HI-3593PQM 44-PIN 44PTQS HI-3593
2002 - 00429VP

Abstract: No abstract text available
Text: , the ERROR output pin goes low to indicate the presence of an error. The error pin will go high again , associated interrupt pin will go low for 1 µS and return high again. When programmed for LEVEL interrupt mode , only prevents the associated IRQ pin from becoming active. When the mask bit is cleared, an interrupt , WAIT pin , the host microprocessor may read data from the DD42900 shared memory resources (DMT and Rx , ±0.1 ) ±0.004 PIN NO. 1 INDEX 39 EQ. SP. @ 0.0256 = 0.998 (0.65 = 25.36) (TOL. NONCUM) 1


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PDF DD-42900 16-Bit DD-42900 1-800-DDC-5757 A5976 web-09-02-0 00429VP
2012 - application notes on ARINC-429 receiver

Abstract: 0x3418 arinc 825 HI3-201-5
Text: -3110 integrated CAN controller / transceiver. The HI-3201 is identical to the HI-3200 except it comes in an 80- pin , Auto-initialization feature allows power-on configuration or independent operation without CPU PIN CONFIGURATION , -3110 CAN Bus ARINC 429 4 x Transmit HI-3200 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations) (DS3200 Rev. B) ARX7P ARX7N MODE0 CMOSI MODE1 MCLK MODE2 , , Label 01 Channel 0, Label 00 TRANSMIT TIMER CCSB CSCLK CMOSI CMISO HI-3200, HI-3201 PIN


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PDF HI-3200, HI-3201 HI-3200 80PTQS application notes on ARINC-429 receiver 0x3418 arinc 825 HI3-201-5
1998 - application notes on ARINC-429 receiver

Abstract: dd-03282
Text: IRQ Control Register 2. When programmed for pulse interrupt mode, the associated interrupt pin will go , interrupt register. ERROR INTERRUPT OPERATION When an error condition occurs, the ERROR output pin goes low to indicate the presence of an error. The error pin will go high again when the Error Status , the error condition. TABLE 3. DD-00429VP (144- PIN TQFP) ASIC PINOUTS PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 DESCRIPTION PIN NO. 37


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PDF DD-00429 DD-00429 16-bit DD-00429, DD-03282 1-800-DDC-5757 A5976 application notes on ARINC-429 receiver
2014 - Not Available

Abstract: No abstract text available
Text: rapid start-up or operation without a host CPU. PIN CONFIGURATION ARX2P ARX1N ARX1P ARX0N ARX0P , it comes in an 80- pin PQFP package with eight instead of two ARINC 429 bit monitor pins. HI-3200 64 - Pin Plastic Quad Flat Pack (PQFP) (See ordering information for additional pin configurations , -3201 PIN DESCRIPTIONS SIGNAL FUNCTION AACK AINT ARX0N ARX0P ARX1N ARX1P ARX2N ARX2P ARX3N , AND START-UP section. Multiplexed with MODE0 pin , PROG initiates HI-3200 Auto-Initialization EEPROM


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PDF HI-3200, HI-3201 HI-3200 80PTQS
Supplyframe Tracking Pixel