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2004 - CX20115A

Abstract: spc700 CX20114 CXA1127 CXA1127AM CX20115 EPROM 27C256 interface drive motor Sony SPC700 dsp CXP85224A 82952
Text: ) ( byte ) ( byte ) 32K 40K 40K 48K 52K 60K 32K 40K 40K 48K 52K 60K 40K 48K 52K 60K 1344 1312 1376 2048 1568 , circuit - CXP871P40 CXP872P48A Supply voltage (V) Package Pins Page 7 4 32- byte 1 , CXP874P60 QFP/ LQFP 4.5 to 5.5 100 CXP877P48A 9 7 13 3 2048 4 1376 16M 32k 1296 128- byte 2-ch serial I/O 8-level 1-ch serial I/O 1-ch serial I/O 32- byte 1-ch serial I/O 8-level 2-ch serial I/O 8 , timer 1-channel, 8-bit, 32- byte buffer RAM 1-channel, 8-bit, 8-stage FIFO 12-channel, 8-bit successive


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PDF SPC700/SPC700II CXP87532/40 CXP87132/40* CXP87740A/48A* CXP87240A/48A* CXP88152/60 CXP85220A/24A/28A/32A CXP85324A/32A/40A 64-pin CX20115A spc700 CX20114 CXA1127 CXA1127AM CX20115 EPROM 27C256 interface drive motor Sony SPC700 dsp CXP85224A 82952
2008 - DEMO9S12XDT512

Abstract: MC9S12XDT HI-3599 MC9S12XDT512 HI-3599PSx-40 HI-3598 arinc 429 serial transmitter 3598DEMO XGATE
Text: receiving an 8-bit byte from the Holt device. The following function name and argument list is used , SPI0DR; // send dummy data // receive, left-shift then OR next byte j = txrx8bits(0x00,1); rxdata = rxdata | (j << 16); // send dummy data // receive, left-shift then OR next byte j = txrx8bits(0x00,1); rxdata = rxdata | (j << 8); // send dummy data // receive and OR the least signif. byte j = txrx8bits , code loads one word in the self test register: // send op code (ignore returned data byte ) dummy =


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PDF AN-150 HI-3598, HI-3599 HI-3598 HI-3598/HI-3599. RIN1A-40 DEMO9S12XDT512 MC9S12XDT MC9S12XDT512 HI-3599PSx-40 arinc 429 serial transmitter 3598DEMO XGATE
GPCR01A

Abstract: nmos 6502 microprocessor SPCR01A 6502 instruction
Text: (two channel) that includes a CMOS 8-bit Software-based audio processing microprocessor, 40K-byte MROM (speech is compressed by a Provides 40K-byte MROM for program and audio data with 4 , education toys Ex. Pattern to voice (animal, car, color, etc.) 40K-byte MROM Rosc Math High end , provides a 40K-byte MROM that can be defined as OD : Open Drain the program area, audio data area, or , approx. rate) and 128- byte 1sec speech duration @ 6KHz sampling working SRAM. It


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PDF GPCR01A GPCR01A 40K-byte 12sec. 24K-bit 24K-bits 128-byte 128-byte nmos 6502 microprocessor SPCR01A 6502 instruction
1995 - 32 ks xtal

Abstract: iad5 AD73422-40K EBR 5v IAD13 AD73322 AD73422 ADSP-2100 sigma sport
Text: DMA port, a byte DMA port, a programmable timer, Flag I/O, extensive interrupt capabilities, and , SEQUENCER PROGRAM MEMORY DATA MEMORY SIGMA DELTA ADC BYTE DMA CONTROLLER EXTERNAL ADDRESS , PROGRAM SEQUENCER PROGRAM MEMORY DATA MEMORY SIGMA DELTA ADC BYTE DMA CONTROLLER


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PDF AD73422-40K 16-Bit AD733xx D0/IAD13 32 ks xtal iad5 AD73422-40K EBR 5v IAD13 AD73322 AD73422 ADSP-2100 sigma sport
CR02A 8

Abstract: CR02A transistor SPRS1024C SPRS512C ic VOICE RECORDER playback 20Sec
Text: playback (two channel) that includes a CMOS 8-bit Software-based audio processing microprocessor, 40K-byte MROM (speech is compressed by 4-bit Provides 40K-byte MROM for program and audio data with ADPCM , Rate) Key wake -up function 40K-byte MROM Rosc 8-bit Two Timers TimeBase INT control , Area control The GPCR02A provides a 40K-byte MROM that can be defined OD : Open Drain as , ADPCM rate). 128-bytes working SRAM It also includes Serial SRAM Interface and 128- byte


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PDF GPCR02A GPCR02A 40K-byte 12sec. 128-bytes 128-byte SPCR02A CR02A 8 CR02A transistor SPRS1024C SPRS512C ic VOICE RECORDER playback 20Sec
2009 - 3585

Abstract: HI-3599 application notes on ARINC-429 receiver MC9S12XD txadd HI-3585 MC9S12XD64 HI-3598 PAD01
Text: Department at sales@holtic.com. // send next byte (ignore returned data byte ) dummy =txrx8bits_5(char)(TxBusWord_5[i]>>8)& 0xFF),1); // send LS byte (ignore returned data byte ) dummy = txrx8bits_5(char , variable rxdata. // send op code (ignore returned data byte ) rxdata = txrx8bits_5(0x08,1); // send dummy data // receive and left-justify most signif. byte j = txrx8bits_5(0x00,1); rxdata = (j << 24 , SPI1DR; // send dummy data // receive, left-shift then OR next byte j = txrx8bits_5(0x00,1); rxdata


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PDF AN-145 HI-3585, HI-3598/HI-3599 MC9S12XD64 HI-3598 HI-3599 HI-3585 HI-3599. 3585 application notes on ARINC-429 receiver MC9S12XD txadd MC9S12XD64 PAD01
2009 - MC9S12XD64

Abstract: 3585 HI-3585 HI-3599 arinc 429 serial transmitter HI-3598 PAD01 eXTAL AN-145 0x00002008
Text: Sales Department at sales@holtic.com. // send next byte (ignore returned data byte ) dummy =txrx8bits_5(char)(TxBusWord_5[i]>>8)& 0xFF),1); // send LS byte (ignore returned data byte ) dummy = , , into the variable rxdata. // send op code (ignore returned data byte ) rxdata = txrx8bits_5(0x08,1); // send dummy data // receive and left-justify most signif. byte j = txrx8bits_5(0x00,1); rxdata = (j , ) {;} dummy = SPI1DR; // send dummy data // receive, left-shift then OR next byte j = txrx8bits_5(0x00,1


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PDF AN-145 HI-3585, HI-3598/HI-3599 MC9S12XD64 HI-3598 HI-3599 HI-3585 HI-3599. MC9S12XD64 3585 arinc 429 serial transmitter PAD01 eXTAL AN-145 0x00002008
RC TOY CAR CIRCUIT DIAGRAM

Abstract: toy car RC circuit diagram SPC41A1
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech ! Software-based audio processing duration @ 6KHz sampling rate) and 128- byte , FIELD XI (Rosc) XO 40K-byte ROM 8-bit RISC controller Two Timers TimeBase INT control , TMB, or both TMA and TMB to The SPC41A1 provides a 40K-byte ROM that can be defined as the program


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PDF SPC41A1 RC TOY CAR CIRCUIT DIAGRAM toy car RC circuit diagram SPC41A1
generalplus

Abstract: GPC41A1 SPC41A1
Text: -bit microprocessor with 69 Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech Software-based audio processing duration @ 6KHz sampling rate) and 128- byte working , ) Low Voltage Reset 2. BLOCK DIAGRAM 40K-byte ROM XI (Rosc) XO 8-bit RISC controller 4 , will toggle the tone wave automatically without INT. 6.4. ROM Area The GPC41A1 provides a 40K-byte


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PDF GPC41A1 GPC41A1 SPC41A1 generalplus
2003 - Not Available

Abstract: No abstract text available
Text: -bit microprocessor with 69 Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech 64- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech Software-based audio processing duration @ 6KHz sampling rate) and 64- byte working , 2. BLOCK DIAGRAM 40K-byte ROM 8-bit microprocessor 4. APPLICATION FIELD Two Timers , The SPC41B2 provides a 40K-byte ROM that can be defined as the program area, audio data area, or both


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PDF SPC41B2
SPEECH ENHANCEMENT

Abstract: sigma sport
Text: sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I , PROGRAM MEMORY DATA MEMORY FLAGS SIGMA DELTA ADC BYTE DMA CONTROLLER EXTERNAL ADDRESS S . BUS SERIAL I


OCR Scan
PDF 16-Bit 25iiS AD733xx D2/IAD15 D1/IAD14 DO/IAD13 AD73422-40K 119-Pin B-119) SPEECH ENHANCEMENT sigma sport
1N4148

Abstract: SPC41B1
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 64- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech ! Software-based audio processing duration @ 6KHz sampling rate) and 64- byte , Voltage Reset 2. BLOCK DIAGRAM 40K-byte ROM 8-bit 4. APPLICATION FIELD Two Timers , The SPC41B1 provides a 40K-byte ROM that can be defined as input data the program area, audio


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PDF SPC41B1 750ns 1N4148 SPC41B1
2001 - Not Available

Abstract: No abstract text available
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 64- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech ! Software-based audio processing duration @ 6KHz sampling rate) and 64- byte , Voltage Reset 2. BLOCK DIAGRAM 8-bit 40K-byte ROM 4. APPLICATION FIELD Two Timers , . data buffer or OD-NMOS 6.2. ROM AREA The SPC41B1 provides a 40K-byte ROM that can be defined as


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PDF SPC41B1
LM386

Abstract: No abstract text available
Text: -bit microprocessor with 69 Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech 64- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech Software-based audio processing duration @ 6KHz sampling rate) and 64- byte working , 40K-byte ROM 8-bit 4. APPLICATION FIELD Two Timers TimeBase INT control microprocessor , 40K-byte ROM that can be defined as input data the program area, audio data area, or both


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PDF GPC41B1 GPC41B1 SPC41B1 LM386
GPC41A1

Abstract: gpc41a2
Text: -bit microprocessor with 69 Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech Software-based audio processing duration @ 6KHz sampling rate) and 128- byte working , ) Low Voltage Reset 2. BLOCK DIAGRAM 4. APPLICATION FIELD 40K-byte ROM XI (Rosc) XO 8 , 6.4. ROM Area by the user's program. The GPC41A2 provides a 40K-byte ROM that can be defined as


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PDF GPC41A2 GPC41A, GPC41A1 GPC41A2" gpc41a2
SPC41A

Abstract: 1N4148 LM386 microprocessor ic 501
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. ! Software-based audio processing 13 sec speech duration @ 6KHz sampling rate) and 128- byte , -bit microprocessor ! Two 8-bit current outputs(D/A) 40K-byte ROM Two Timers TimeBase INT control 4 , 6.4. ROM Area frequency for each channel. The SPC41A provides a 40K-byte ROM that can be defined


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PDF SPC41A 750ns SPC41A 1N4148 LM386 microprocessor ic 501
GPC41A1

Abstract: No abstract text available
Text: -bit microprocessor with 69 Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech Software-based audio processing duration @ 6KHz sampling rate) and 128- byte working , output (D/A) Low Voltage Reset 2. BLOCK DIAGRAM 4. APPLICATION FIELD 40K-byte ROM XI (Rosc , provides a 40K-byte ROM that can be defined as the program area, audio data area, or both. Several


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PDF GPC41A3 GPC41A1
2002 - Not Available

Abstract: No abstract text available
Text: channel) that includes a CMOS 8-bit Software-based audio processing microprocessor, 40K-byte MROM (speech is compressed by a Provides 40K-byte MROM for program and audio data with 4-bit ADPCM with , . Pattern to voice (animal, car, color, etc.) Rosc 8-bit microprocessor 40K-byte MROM Math , The SPCR01A provides a 40K-byte MROM that can be defined as OD : Open Drain the program area , ) and 128- byte SRAM. It includes l a ti 128- byte working SRAM 1sec speech


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PDF SPCR01A
1N4148

Abstract: No abstract text available
Text: -bit microprocessor with 69 Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech 64- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech Software-based audio processing duration @ 6KHz sampling rate) and 64- byte working , . BLOCK DIAGRAM 4. APPLICATION FIELD 40K-byte ROM 8-bit Two Timers TimeBase INT control , specifications. data 6.2. ROM AREA The GPC41B3 provides a 40K-byte ROM that can be defined as input


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PDF GPC41B3 1N4148
RC TOY CAR CIRCUIT DIAGRAM

Abstract: SPC41A1 8050 pin connections
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech ! Software-based audio processing duration @ 6KHz sampling rate) and 128- byte , FIELD XI (Rosc) XO 40K-byte ROM 8-bit RISC controller Two Timers TimeBase INT control , and TMB to The SPC41A1 provides a 40K-byte ROM that can be defined as the tone frequency for


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PDF SPC41A1 RC TOY CAR CIRCUIT DIAGRAM SPC41A1 8050 pin connections
SPCR01A

Abstract: No abstract text available
Text: , 40K-byte MROM (speech is compressed by a ! Provides 40K-byte MROM for program and audio data with , 8-bit microprocessor 40K-byte MROM Math ! High end toy controller 128- byte SRAM Two 8 , _2 6.2. ROM Area control The SPCR01A provides a 40K-byte MROM that can be defined as OD : Open , -bits DRAM (speech is 128- byte ! 24K-bit DRAM 1sec speech duration @ 6KHz sampling working SRAM. It includes ! 128- byte working SRAM two ! Operating voltage (single power): 3.0V - 5.5V


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PDF SPCR01A SPCR01A
LM386

Abstract: SPC41B2 talking toy
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 64- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech ! Software-based audio processing duration @ 6KHz sampling rate) and 64- byte , -bit ADPCM ! Low Voltage Reset 2. BLOCK DIAGRAM 40K-byte ROM 8-bit microprocessor 4. APPLICATION , .) depending on the application specifications. output data 6.2. ROM Area The SPC41B2 provides a 40K-byte


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PDF SPC41B2 LM386 SPC41B2 talking toy
2002 - Not Available

Abstract: No abstract text available
Text: -bit microprocessor with 69 ! Provides 40K-byte ROM for program and audio data instructions, 40K-byte ROM for speech and melody data (Speech ! 128- byte working SRAM is compressed by a 4-bit ADPCM with approx. 13 sec speech ! Software-based audio processing duration @ 6KHz sampling rate) and 128- byte , FIELD XI (Rosc) XO 40K-byte ROM 8-bit RISC controller Two Timers TimeBase INT control , The SPC41A1 provides a 40K-byte ROM that can be defined as the program area, audio data area, or both


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PDF SPC41A1
SPCR02A

Abstract: ic VOICE RECORDER playback 20Sec SPRS1024C SPRS512C
Text: microprocessor, 40K-byte MROM (speech is compressed by 4-bit ! Provides 40K-byte MROM for program and audio , ) SPRS1024C (40sec @ 6.4 Sampling Rate) 40K-byte MROM Rosc 8-bit 128- byte SRAM Two 8-bit D/A , data specifications. 60K logic_2 6.2. ROM Area control The SPCR02A provides a 40K-byte , . speech @ 7KHz sampling rate with ADPCM It also includes Serial SRAM Interface and 128- byte working


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PDF SPCR02A supporSPCR02A SPCR02A ic VOICE RECORDER playback 20Sec SPRS1024C SPRS512C
2003 - tsop i 12mmx20mm

Abstract: Utron SRAM Utron SRAM 512K X
Text: (Vcc) Page mode operation by 8 words Data byte control : LB (I/O1~I/O8) UB (I/O9~I/O16) Package : 48-pin 6.0mm × 8.0mm TFBGA 48-pin 12mmX20mm TSOP-I The UT65L168 is design for upper and low byte access by data byte control ( UB LB ).It has low power modes by using control pin ZZ . PIN DESCRIPTION SYMBOL A0 - A18 I/O1 - I/O16 CE DECODER I/O9-I/O16 Upper Byte Lower Byte Control Upper Byte Control ZZ VCC Vccq VSS NC 512K × 16 MEMORY ARRAY I/O DATA CIRCUIT Output


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PDF UT65L168 /UT65L168 48-pin 12mmX20mm P80094 608-bit UT65L168BS-60LLI tsop i 12mmx20mm Utron SRAM Utron SRAM 512K X
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