The Datasheet Archive

Top Results (6)

Part ECAD Model Manufacturer Description Datasheet Download Buy Part
CP301-SM06-R CP301-SM06-R ECAD Model Superior Sensor Technology Highly Integrated Dual Pressure Sensor Two-Port Solution for CPAP, BiPAP and APAP - Tape & Reel
CP201-SM04-R CP201-SM04-R ECAD Model Superior Sensor Technology Highly Integrated Dual Pressure Sensor Two-Port Solution for CPAP, BiPAP and APAP - Tape & Reel
CP301-SM06-T CP301-SM06-T ECAD Model Superior Sensor Technology Highly Integrated Dual Pressure Sensor Two-Port Solution for CPAP, BiPAP and APAP - Single Tray
CP201-SM04-M CP201-SM04-M ECAD Model Superior Sensor Technology Highly Integrated Dual Pressure Sensor Two-Port Solution for CPAP, BiPAP and APAP - Multi Tray
CP201-SM02-M CP201-SM02-M ECAD Model Superior Sensor Technology Highly Integrated Dual Pressure Sensor Two-Port Solution for CPAP, BiPAP and APAP - Multi Tray, SON-11, SM04
CP201-SM04-C CP201-SM04-C ECAD Model Superior Sensor Technology Highly Integrated Dual Pressure Sensor Two-Port Solution for CPAP, BiPAP and APAP - Cut Tape

4081 AND gate Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1996 - pinout information of CMOS 4001, 4011, 4070

Abstract: 54C922 CGS3301 54HC123A F100K ECL 300 series and design guide 4060 counter 4029 counter MM54HC245 MM54C76 4081 AND gate
Text: 4071 OR Gate 54AC32 No 4081 AND Gate 54AC08 No 4093 NAND Gate None , guaranteed at 2V - 6V VDD. Typical power consumption is 0.1mW per gate . Propagation delays are less than 5ns , Replacement HCMOS Device Function Description Functional Replacement MM54HC00 NAND Gate 54AC00 MM54HC245 Transceiver 54AC245 MM54HC02 NOR Gate 54AC02 MM54HC257 Multiplexer 54AC257 MM54HC03 NAND Gate 54AC03 MM54HC259 Latch 54LS259 MM54HC04


Original
PDF Spectrum/STV/5M96/Printed pinout information of CMOS 4001, 4011, 4070 54C922 CGS3301 54HC123A F100K ECL 300 series and design guide 4060 counter 4029 counter MM54HC245 MM54C76 4081 AND gate
ic 4081 datasheet

Abstract: ic 4081 overvoltage 4081 AND gate coms 4081 AN4081 ISO7637 MAX6397 IC 4081 data sheet MAX6495
Text: , overvoltage, TVS, transient voltage suppressor Jul 12, 2007 APPLICATION NOTE 4081 Alternate Circuits , threshold, the gate pulls low and the MOSFET shuts off, disconnecting the power rail. The typical circuit , GATE output to discharge the gate capacitance and discharge the output capacitor. The current sink discharges the gate (see current I1, the green arrow), until the voltage on GATE equals the voltage on OUTFB. At this point the FET is turned off. The current sink continues to decrease the voltage on GATE


Original
PDF ISO7637, MAX6397: MAX6398: MAX6495: MAX6496: MAX6497: MAX6498: MAX6499: AN4081, APP4081, ic 4081 datasheet ic 4081 overvoltage 4081 AND gate coms 4081 AN4081 ISO7637 MAX6397 IC 4081 data sheet MAX6495
74573

Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
Text: -Input NOR Gate 4001 4025 7402 7427 AND Gates Device 7408 7411 7421 4073 4081 4082 , Quad 2-Input AND Gate Dual 4-Input AND Gate Similar Devices 4081 4073 4082 7411 7408 7421 , 7476 7483 7485 7486 7490 7493 74121 2 of 12 Function Quad 2-Input NAND Gate Quad 2-Input NOR Gate Quad 2-Input NAND Gate ( Open collector ) Hex Inverter Hex Inverter ( Open collector ) Hex Inverter ( Open collector ) Hex Buffer Quad 2-Input AND Gate Triple 3-Input NAND Gate Triple 3


Original
PDF
2007 - lcx 574

Abstract: STR 4512 HC 4093 4001 4011 cmos HC 40106 4017 14 pin package 4011 cmos logic gate HC 4011 logic gate hcf 4541 equivalent hct 4049
Text: advanced HCMOS ALVC: Advanced low-voltage HCMOS CMOS 4000B Dual gate VHC/VHCT HC/HCT: high-speed CMOS , Single gate HCMOS Single gate LCX Single gate VHC/VHCT VCX: Very low-voltage HCMOS, 3.3V I/O tolerant , ; 21 4073; 4081 OR 32; 4072; 4075 4071; 4072; 4075 EX NOR 266; 7266 EX OR 86 Inverter 04; 05; 14; U04 Multifunction Gate 00; 03; 10; 20; 30; 132; 133 NOR 51; 4078 , 133 137 138 139 147 148 151 153 155 157 158 160 161 163 * Not for single or dual gate


Original
PDF DIP-14/16 DIP-14 DIP-24 SGSTDLOG0307 lcx 574 STR 4512 HC 4093 4001 4011 cmos HC 40106 4017 14 pin package 4011 cmos logic gate HC 4011 logic gate hcf 4541 equivalent hct 4049
UHP400

Abstract: UHP-500 UHP400-1 diode IN 4001
Text: 403-1 503 406 406-1 506 407 407-1 507 408 408-1 508 432 432-1 532 433 433-1 533 U H P , for Inductive Loads U H P-408 UHP- 408-1 U HP-508 UH P-432 UHP-432-1 U H P-532 3— 3 U , mA Typical values at Vcc = 5.0 V. Each gate . Each input tested separately. T, = +25°C. OUT , €” 1.0 18 -0 .5 5 V jxA mA Typical values at Vcc = 5.0 V. Each gate . Each input tested , gate . 3. Each input tested separately. IN P U T V CC . 5V 0.4 V 4.1 — — OV


OCR Scan
PDF UHP-400, UHP-500 UHP-400-1, UHP-400-1 UHP-400 UHP400 UHP-500 UHP400-1 diode IN 4001
1996 - truth table of 4081

Abstract: 4KX16
Text: ) A0R(1) R/ R R R/ R R L L L R R 4081 drw 01 NOTE: 1. The first six , fax-on-demand at 408-492-8391. 6.xx DSC- 4081 /- 1 IDT70V727S/L 32K x 16 3.3V BANK-SWITCHABLE , ) Semaphore Access Control Gate I/O0 ­ I/O15 (1) Bidirectional Data Input/Output INT Interrupt , Enables (1) VCC (3) GND (4) 4081 tbl 01 NOTES: 1. Duplicated per port. 2. Generated upon , A2L A1L A0L BA2L BA1L BA0L NC PIN CONFIGURATIONS (1,2) R 4081 drw 02 NOTES: 1. All


Original
PDF IDT70V727S/L IDT70V727 100-pin PN100-1) 70V727 512Kbit truth table of 4081 4KX16
UHC400

Abstract: UHD-533 UHC-400-1 UHC-400 UHD-433-1 UHD433-1
Text: -403-1 U H D -5 03 U H D -4 0 6 U H D -406-1 U H D -5 06 U H D -408 U H D - 408-1 U H D -508 , 506 Quad AND for Inductive Loads 407 407-1 408-1 507 Quad NAND for Inductive Loads , T cE A ) Applicable Devices UHD-400 Min. Typ. Supply Current (Each Gate ) All , Gate ) All 4.5 V — — — 2.0 — — V — All 4.5 V — â , Forward Voltage Supply Current (Each Gate ) UHD-503 All 125°C V |N (1 ; Input Current


OCR Scan
PDF UHD-400, UHD-400-1, UHD-500 MIL-STD-883 UHD-400-1 UHD-400 UHC400 UHD-533 UHC-400-1 UHC-400 UHD-433-1 UHD433-1
1997 - truth table of 4081

Abstract: CMOS 4081
Text: ) A0R(1) R/ R R R/ R R L L L R R 4081 drw 01 NOTE: 1. The first six , fax-on-demand at 408-492-8391. 6.xx DSC- 4081 /- 1 IDT70V727S/L 32K x 16 3.3V BANK-SWITCHABLE , ) Semaphore Access Control Gate I/O0 ­ I/O15 (1) Bidirectional Data Input/Output INT Interrupt , Enables (1) VCC (3) GND (4) 4081 tbl 01 NOTES: 1. Duplicated per port. 2. Generated upon , A2L A1L A0L BA2L BA1L BA0L NC PIN CONFIGURATIONS (1,2) R 4081 drw 02 NOTES: 1. All


Original
PDF IDT70V727S/L IDT70V727 100-pin PN100-1) 70V727 512Kbit truth table of 4081 CMOS 4081
CMOS 4081

Abstract: 4081B 4081 CMOS 4000B 4000B logic family cmos family characteristics
Text: 4081B quad 2-1nput and gate DESCRIPTION - The 4081 B is a positive logic Quad 2-lnput AND Gate . The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. LOGIC AND CONNECTION DIAGRAM DIP ( TOP VIEW) r r r r r n r u lu lli lj lu lu u NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-line Package. DC CHARACTERISTICS: V0D as shown, Vgg = 0 V (See Note 1) LIMITS SYMBOL PARAMETER VDD = 5 V VDD= 10 V


OCR Scan
PDF 4081B 4000B CMOS 4081 4081B 4081 CMOS 4000B logic family cmos family characteristics
CMOS 4081

Abstract: No abstract text available
Text: . INTU . . 3EM SELR , INTR 4081 drw01 NOTE: _ _ 1. The first six address pins for , . AUGUST 1997 DSC- 4081 /» 6.xx 1 4ö25?l 0D2Ö223 4b3 IDT70V727S/L 32K x 16 3.3V , Inputs Semaphore Access Control Gate Read/Write Enable Output Enable Chip Enables I/O Byte Enables Bidirectional Data Input/Output Interrupt Flag (Output)*2 * +3.3V Power Ground NOTES: 4081 < w0 1 1 , ACKNOWLEDGE AND CLEAR S7 INTERRUPT ACKNOWLEDGE AND CLEAR L L NOTES: 4081 tbi 03 1. These registers are


OCR Scan
PDF IDT70V727S/L IDT70V727 B5771 IDT70V727S/L 100-pin PN100-1) 70V727 512Kbit CMOS 4081
2005 - 4001 4011 cmos

Abstract: 4049 DIP14 4013 datasheet hct lcx 574 CMOS 4541 str 4512 C3245 4017 14 pin package CMOS4000 hcf 4541 be
Text: HCMOS ALVC: Advanced low-voltage HCMOS CMOS 4000B Dual gate VHC/VHCT HC/HCT: high-speed CMOS LCX , Single gate HCMOS Single gate LCX Single gate VHC/VHCT VCX: Very low-voltage HCMOS, 3.3V I/O tolerant , ; 21 4073; 4081 OR 32; 4072; 4075 4071; 4072; 4075 EX NOR 266; 7266 EX OR 86 Inverter 04; 05; 14; U04 4069U; 4502 Multifunction Gate 00; 03; 10; 20; 30; 132; 133 NOR , CMOS4000B VHC Dual gate Single gate ALVC ACT HCT 00 02 03 04 05 07


Original
PDF SO-14 SO-16L SO-16 SO-20 SO-24 TSSOP14 OT23-8L TSSOP20 TSSOP16 OT23-5L 4001 4011 cmos 4049 DIP14 4013 datasheet hct lcx 574 CMOS 4541 str 4512 C3245 4017 14 pin package CMOS4000 hcf 4541 be
2004 - Not Available

Abstract: No abstract text available
Text: operating voltage (VDS) should not exceed 10 volts. 2. The forward and reverse gate currents should not exceed 16.0 and -2.2 mA respectively with gate resistance of 100. ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C) Item Saturated Drain Current Transconductance Pinch-off Voltage Gate Source Breakdown , ANG 3.672 3.921 4.081 4.166 4.220 4.250 4.290 4.318 4.308 4.173 3.828 126.7 107.5 87.9 68.3 49.0 29.8 , (0.422) 17.0±0.15 (0.669) 21.0±0.15 (0.827) 1. Gate 2. Source (Flange) 3. Drain Unit: mm(inches


Original
PDF FLM4450-4F -46dBc FLM4450-4F 25hods
FLM4450-4F

Abstract: *4166 "fet"
Text: exceed 10 volts. 2. The forward and reverse gate currents should not exceed 16.0 and -2.2 mA respectively with gate resistance of 100Q. ELECTRICAL CHARACTERISTI CS (Amb ent Temperature Ta , Vds = 5V, Ids = 90mA -1.0 -2.0 -3.5 V Gate Source Breakdown Voltage VGSO IGS = -90^A -5.0 - - V , 42.8 .700 44.0 4400 .397 -176.6 4.081 87.9 .066 22.9 .640 34.1 4500 .443 151.5 4.166 68.3 .078 3.8 , ) (0.827) 1. Gate 2. Source (Flange) 3. Drain Unit: mm(inches) For further information please contact


OCR Scan
PDF -46dBc FLM4450-4F FLM4450-4F FCSI0499M200 *4166 "fet"
1999 - Not Available

Abstract: No abstract text available
Text: operating voltage (VDS) should not exceed 10 volts. 2. The forward and reverse gate currents should not exceed 16.0 and -2.2 mA respectively with gate resistance of 100W. ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25¡C) Item Saturated Drain Current Transconductance Pinch-off Voltage Gate Source Breakdown , 29.7 156.7 S-PARAMETERS VDS = 10V, IDS = 1100mA S21 S12 MAG ANG MAG ANG 3.672 3.921 4.081 4.166 , (0.827) 1. Gate 2. Source (Flange) 3. Drain Unit: mm(inches) For further information please


Original
PDF FLM4450-4F -46dBc FLM4450-4F FCSI0499M200
Not Available

Abstract: No abstract text available
Text: exceed 10 volts. 2. The forw ard and reverse gate currents should not exceed 16.0 and -2.2 mA respectively w ith gate resistance of 100ohm. ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25deg.C) Item Saturated Drain Current Transconductance Pinch-off Voltage Gate Source Breakdown Voltage , -98.6 -139.1 -176.6 151.5 124.2 100.8 78.6 57.7 36.6 29.7 156.7 MAG 3.672 3.921 4.081 , Matched FET Case Style "IB" Metal-Ceramic Hermetic Package 1. Gate 2. Source (Flange) 3. Drain


Original
PDF FLM4450-4F -46dBc 50ohm FLM4450-4F 25deg 25atched
BP 109 transistor

Abstract: transistor BP 109 transistor ec5724 transistor GaAs FET s parameters transistor BP 915 EC5724
Text: drain gate gate gate gate 4081 drain optimize die attach to shorten the gate , at 18GHz Four cells (2400µm) : 7dB at 18GHz Chip size : 1.52 x 0.51 x 0.065 mm G: Gate D: Drain , Vds= 1V Ids=Idss/2 70 80 Igsd Gate to source/drain leakage current Vgsd= -6V Rth , Vgs Gate to source voltage Tch Operating channel temperature Tstg Storage temperature , , including 0.10nH gate and 0.20nH drain serie inductances Freq. GHz 3 4 5 6 7 8 9 10 11 12 13


Original
PDF EC5724 EC5724 18GHz. 24dBm 30dBm 18GHz DSEC57247003 BP 109 transistor transistor BP 109 transistor ec5724 transistor GaAs FET s parameters transistor BP 915
2004 - 4600 fet transistor

Abstract: FLM4450-4F
Text: ) should not exceed 10 volts. 2. The forward and reverse gate currents should not exceed 16.0 and -2.2 mA respectively with gate resistance of 100. ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C) Item , = 5V, VGS = 0V VDS = 5V, IDS = 1100mA Vp Gate Source Breakdown Voltage VGSO Output , 42.8 .700 44.0 4400 .397 -176.6 4.081 87.9 .066 22.9 .640 34.1 4500 , (0.421) 1. Gate 2. Source (Flange) 3. Drain 12.0 (0.422) Unit: mm(inches) 17.0±0.15


Original
PDF FLM4450-4F -46dBc FLM4450-4F 4600 fet transistor
1999 - FLM4450-4F

Abstract: No abstract text available
Text: ) should not exceed 10 volts. 2. The forward and reverse gate currents should not exceed 16.0 and -2.2 mA respectively with gate resistance of 100. ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C) Item , = 5V, VGS = 0V VDS = 5V, IDS = 1100mA Vp Gate Source Breakdown Voltage VGSO Output , 42.8 .700 44.0 4400 .397 -176.6 4.081 87.9 .066 22.9 .640 34.1 4500 , ) 0.2 Max. (0.008) 10.7 (0.421) 1. Gate 2. Source (Flange) 3. Drain 12.0 (0.422) Unit


Original
PDF FLM4450-4F -46dBc FLM4450-4F FCSI0499M200
4069UB

Abstract: y1 diode
Text: AVG Semiconductors DDiT Technical Data DV4069UB Available Q2, 1995 Quad 2-lnput NOR (NAND) Gate Dual 4-lnput NOR (NAND) Gate Triple 3-lnput NOR (NAND) Gate Quad 2-lnput OR (AND) Gate Hex Inverter Gate (unbuffered) These logic gates are constructed with P and N Channel devices in a single monolithic structure (Complementary MOS). They are used for low power dissipation and/or high noise immunity. The , Vss 4081 B VDD B4 A4 Y4 Y3 B3 A3 14 13 12 1 1 io| 9 8 rC> 4> P b r£> P -pi P 1 2 3 4 5 6 7] A1 Y1


OCR Scan
PDF DV4069UB 4001B, 4011B 1-800-AVG-SEMI T01D11Ã 4069UB y1 diode
cd 40118

Abstract: ci 4081 DV4001 4069UB dv408
Text: AVG Semiconductors DDI™ Technical Data DV4069UB Available Q2. 1995 Quad 2-lnput NOR (NAND) Gate Dual 4-lnput NOR (NAND) Gate Triple 3-lnput NOR (NAND) Gate Quad 2-lnput OR (AND) Gate Hex Inverter Gate (unbuffered) These logic gates are constructed with P and N Channel devices in a single monolithic structure (Complementary MOS). They are used for low power dissipation and/or high noise immunity , 81 Al 82 C2 Y2 V$s 407 IB V00 B4 A4 Y4 Y3 83 A3 Al 81 A1 B2 C2 Y2 Vss 4081 B VDD 84 A4 Y4 Y3 83


OCR Scan
PDF DV4069UB DV4001 1-800-AVG-SEMI 4001B. 4011B cd 40118 ci 4081 4069UB dv408
ccd 485

Abstract: defective pixel CCD485 CCD442A H3LR CCD481 level sensor 4081 ccd 15um CCD matrix transistor H1A
Text: x 4097 Photosite Array 15µm x 15µm Pixel Size 61.20 mm x 61.21 Active Image Area 4080 x 4081 , photons pass through a transparent polycrystalline silicon gate structure creating electron hole pairs , amplifiers. The last clocked gate in the Horizontal registers (SG) is larger than the others and can be used to horizontally bin charge. This gate requires its own clock which should be tied to H1 for , MOSFET tied to the input gate . Charge packets are clocked to a precharged capacitor whose potential


Original
PDF 4096X4097 CCD485 ccd485g 4096X4097 CCD485 ccd 485 defective pixel CCD442A H3LR CCD481 level sensor 4081 ccd 15um CCD matrix transistor H1A
Not Available

Abstract: No abstract text available
Text: AVG Semiconductors DDiT Technical Data D V4069U B A vailable Q2, 1995 Quad 2-Input NOR (NAND) Gate Dual 4-Input NOR (NAND) Gate Triple 3-Input NOR (NAND) Gate Quad 2-Input OR (AND) Gate Hex Inverter Gate (unbuffered) DV4001B DV4002B DV4025B DV4071B DV4069UB (DV4011B) (DV4012B) (DV4023B) (DV4081B) • • • N Suffix Plastic DIP AVG-001 Case All outputs buffered , \â ? 5 13 -0 *2 rt> ? 1 A4 9 10 11 4 > b Y5 4081 B 14 13


OCR Scan
PDF V4069U DV4001B DV4002B DV4025B DV4071B DV4069UB DV4011B) DV4012B) DV4023B) DV4081B)
Not Available

Abstract: No abstract text available
Text: 4081B QUAD 2-IN P U T AND GATE D E S C R IP TIO N — The 4081 B is a positive logic Quad 2 -In p u t A N D Gate . The o u tp u ts are fu lly buffe re d fo r highest noise im m u n ity and patte rn insen sitivity o f o u tp u t impedance. LO G IC A N D C O N N E C T IO N D IA G R A M DIP ( TOP VIE W ) NOTE: T h e F la tp a k v e rs io n has th e same p in o u ts (C o n n e c tio n D ia g ra m ) as th e D u a l In - lin e Package. LJ LU □ LA LLI LU Ld J D C C H A R A C T E R IS T IC S : V q q


OCR Scan
PDF 4081B
7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
Text: KG10000 SERIES SEMI-CUSTOM CMOS GATE ARRAY CMOS SILOCON GATE ARRAY The KG10000 Series is consists of silicon gate CMOS arrays whose interconnection are initially unspecified, therefore custom LSI , . Master chip consists of basic cell, i.e. 2 input NAND gate equivalently which is placed at regular , . SAMSUNG gate array design activity is performed on the computer aided design system which includes such , design rule check. • High performance oxide isolated silicon gate CMOS technology • Advanced single


OCR Scan
PDF KG10000 7408 CMOS TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
2000 - LM6462

Abstract: LM6464 LM103-3.6 54ACT3301 38510R75001 SMD MARKING CODE ACQ lm1242 MM54HC564 LH0041CJ 54AC00
Text: No file text available


Original
PDF 1-877-Dial-Die LM6462 LM6464 LM103-3.6 54ACT3301 38510R75001 SMD MARKING CODE ACQ lm1242 MM54HC564 LH0041CJ 54AC00
Supplyframe Tracking Pixel