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40-bit Datasheets Context Search

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1998 - register file

Abstract: ADSP-2100 ADSP-21000 ADSP-21160 RND32
Text: of long word accesses. Mode selectable support of 40-bit extended precision floating-point , -21160s internal SRAM memory accommodates the following word types: 48- bit instructions 40-bit extended , , comprised of two consecutive 32- bit data words 48- bit accesses, for instruction fetches only 40-bit data , during instruction fetches and are not employed for register load/store accesses. 40-bit accesses occur , of such an access is a single 40-bit data register. The DSP core cannot directly load or store 40-bit


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PDF ADSP-21160s 64-bit ADSP-21160 32-bits, 40-bit register file ADSP-2100 ADSP-21000 RND32
2001 - AN601

Abstract: DIV32 DS80C390 IEEE754
Text: gives load/unload access to a 40-bit accumulator. The 40-bit accumulator is updated on every multiply , result 16- bit multiplier 16- bit divisor 16- bit remainder 40-bit accumulator 40-bit , automatically accumulates the product with the previous contents of the 40-bit accumulator and sets the MOF , previous contents of the 40-bit accumulator and sets the MOF flag (MCNT1.6) if the divisor was 0000h , = LEFT SHIFT 1 = RIGHT SHIFT 40-BIT ACCUMULATOR The 40-bit accumulator adds the result of each


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PDF 16/32-Bit DS80C390 16-bit DS80C390 40Mov 40Mhz AN601 DIV32 IEEE754
MCHC705B16N

Abstract: MC705P6ACPE MC705P6ACDWE XC705B32CFNE MC68HC705C8ACFNE MC68HC705B16NCFN MC68HC705SR3CP MC705P6ac MC705P6AMDWE MCHC705B16NVFNE
Text: ç Prev Page Next Page è Microcontrollers ­ 8 and 16 Bit HC705 Family - 8- Bit Features: · 68HC705 CPU with the addition of EPROM memory · Fully static design allowing operation down to DC · 8- bit accumulator · 8- bit index register · 16- bit stack pointer · On-chip oscillator · 16- bit timer with built in prescaler, or 15- bit EPROM/ RAM EEPROM OTP (Bytes) (Bytes) (Bytes) I/O 64 C 176 192 224 , PWM COP - - - - 4-Ch., 8- Bit 4-Ch., 8- Bit 4-Ch., 8- Bit 4-Ch., 8- Bit 4-Ch., 8- Bit 4


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PDF HC705 68HC705 16-bit 15-bit 68-PLCC MC68HC11F1CFN2-ND MC68HC11F1CFN3TR-ND MCHC705B16N MC705P6ACPE MC705P6ACDWE XC705B32CFNE MC68HC705C8ACFNE MC68HC705B16NCFN MC68HC705SR3CP MC705P6ac MC705P6AMDWE MCHC705B16NVFNE
2002 - Not Available

Abstract: No abstract text available
Text: load/unload access to a 40-bit accumulator. The 40-bit accumulator is updated on every multiply or , shifted result 16- bit remainder 40-bit accumulator MST MOF SCB CLM Carry Bit Clear MA, MB, and MC 16- bit multiplicand 16- bit dividend 32- bit dividend 32- bit data 32- bit data 16- bit multiplier 16- bit divisor 40-bit , automatically accumulates the product with the previous contents of the 40-bit accumulator and sets the MOF flag , contents of the 40-bit accumulator and sets the MOF flag (MCNT1.6) if the divisor was 0000h. NORMALIZE


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PDF 16/32-Bit DS80C390 16-bit DS80C390 40MHz AN601 40Mhz
1999 - MUR1 crouzet 88826105

Abstract: PIC 32 bit FP 801 C6201 rts6201
Text: ] .8 Convert SP FP to 40-Bit Signed Long Integer = _fixfli , Convert SP FP to 40-Bit Unsigned Long Integer = , ] .8 Convert 40-Bit Signed Long Integer to SP FP = , FP = _fltuf [INTSPU on C67xx] .9 Convert 40-Bit , Convert SP FP to 40-Bit Signed Long Integer ASM Listing for _fixfli


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PDF SPRA515 TMS320C62xx 32-bit MUR1 crouzet 88826105 PIC 32 bit FP 801 C6201 rts6201
pic18f6520-i

Abstract: PIC18F25 18-BIT pic18f4685-ipt pic18f2455-i PIC18F67J10 PT 961 232 soic28
Text: Microcontrollers 8- Bit Microcontrollers (Continued) High Performance Microcontrollers PIC18FXXX , 36 36 36 36 36 36 36 36 36 36 36 54 54 54 39 50 39 70 69 55 ADC Ch. 7 × 10- bit 7 × 10- bit 7 × 10- bit 10 × 10- bit 10 × 10- bit 5 × 10- bit 10 × 10- bit 10 × 10- bit 10 × 10- bit 11 × 10- bit 11 × 10- bit 10 × 10- bit 10 × 10- bit 10 × 10- bit 10 × 10- bit 10 × 10- bit 11 × 10- bit 8 × 10- bit 10 × 10- bit 10 × 10- bit 13 × 10- bit 13 × 10- bit 9 × 10- bit 9 × 10- bit 13 × 10- bit 13 × 10- bit 13 × 10- bit 13 × 10- bit 13 × 10- bit


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PDF PIC18FXXX PIC18FXXJXX pic18f6520-i PIC18F25 18-BIT pic18f4685-ipt pic18f2455-i PIC18F67J10 PT 961 232 soic28
1995 - 4 bit dynamic ram

Abstract: 4170A 16 bit static RAM 16 BIT WORD STATIC RAM Dynamic RAM HB56B48 mask ram HM51 HM512200B HM514405C
Text: . 973 1048576-word ! 40-bit RAM Module . 985 CONTENTS HB56A240BR Series 2097152-word ! 40-bit RAM Module . , . 1029 HB56A440BR Series 4194304-word ! 40-bit RAM Module , . 1043 HB56A840BR Series 8388608-word ! 40-bit RAM Module , . 183 · MOS Dynamic RAM HM512200B Series 1048576-word ! 2- bit RAM (CMOS


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1998 - 32Kx16bit

Abstract: 00000x7 00000x4
Text: single-precision IEEE floating-point data. 48- bit words contain either instructions or 40-bit extended-precision , in internal memory. The 64- bit PM Data bus is used to transfer 48- bit instructions (and 64- bit , 40-bit , any of the 40-bit data registers in the processor to be transferred to any other register or to any , path for 40-bit register to register transfers. Data addresses come from one of two sources: an , instructions or 40-bit data, 87,380 x 48, but with missing addresses at the end of Block 0 and Block1. For


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PDF ADSP-21160 ADSP-21160, 48-bit 32-bit 32-bit 16-bit ADSP-21160s 32Kx16bit 00000x7 00000x4
1995 - 8 bit booth multiplier

Abstract: block diagram 8 bit booth multiplier modified booth circuit diagram 8 bit modified booth multiplication circuit multiplier accumulator MAC implementation using "saturation arithmetic"
Text: high-order portion is not used. The accumulator registers are treated as two 40-bit registers A (A2:A1:A0 , data ALU operations specify the 40-bit accumulator registers as source and/or destination operands The accumulator registers are treated as two 40-bit registers A (A2:A1:A0) and B (B2:B1:B0) for data ALU , output and supply a source accumulator of the same form. Most data ALU operations specify the 40-bit , as an address register for fast effective address computation. Automatic sign extension of the 40-bit


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PDF XX0100 011XXX. 1110XX. XX0101 8 bit booth multiplier block diagram 8 bit booth multiplier modified booth circuit diagram 8 bit modified booth multiplication circuit multiplier accumulator MAC implementation using "saturation arithmetic"
DIV32

Abstract: AF53 DS80C390 DS80C400
Text: , while the MC register gives load/unload access to a 40-bit accumulator. The 40-bit accumulator is , MUL DIV16 DIV32 40-bit accumulator 40-bit accumulator MA (D3h) MB (D4h) MC (D5h , previous contents of the 40-bit accumulator and sets the MOF flag (MCNT1.6) if the product exceeds , divide operation automatically accumulates the quotient with the previous contents of the 40-bit , of 16 Figure 2. Shift operation control. 40-Bit Accumulator The 40-bit accumulator adds the


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PDF DS80C390, DS80C400, 16-bit 32-bit 16/32-Bit DS80C390/ DS80C400 DS80C390/DS80C400 DIV32 AF53 DS80C390 DS80C400
XC68HC705B32CFN

Abstract: MC68HC705P6ACP MC68HC711E9CFN2 MC68HC11F1CFN4 MC68HC711k4cfn4 MC68S711E9CFN2 MC68HC705B16NCFN XC68HC705B32CB MC68HC705J1ACP MC68HC711E9CFN3
Text: Microcontrollers ­ 8 and 16 Bit Features: · 68HC05 CPU with the addition of EPROM memory · Fully static design allowing operation down to DC · 8- bit accumulator · 8- bit index register · 16- bit stack pointer · On-chip oscillator · 16- bit timer with built in prescaler, or 15- bit MFT timer · COP watchdog , Family - 8- Bit B RAM EEPROM (Bytes) (Bytes) 64 - 64 - 64 - 176 - 176 - 192 - , 22 31 31 31 31 31 31 32 32 32 31 21 10 A/D - - - 4-Ch., 8- Bit 4-Ch., 8- Bit 4


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PDF 68HC05 16-bit 15-bit HC705 MC68HC908QT1CP MC68HC908QT1CDW MC68HC908QT2CP MC68HC908QT2CDW MC68HC908QT4CP XC68HC705B32CFN MC68HC705P6ACP MC68HC711E9CFN2 MC68HC11F1CFN4 MC68HC711k4cfn4 MC68S711E9CFN2 MC68HC705B16NCFN XC68HC705B32CB MC68HC705J1ACP MC68HC711E9CFN3
2004 - MZ 251

Abstract: mz 73 b Super10 xm 69 rb n014 gpr 163 MZ 197 mz 251 circuit diagram 176E ST10
Text: . The 40-bit Adder/Subtracter , . 40-bit Signed Accumulator Register , instruction set handles BIT , BYTE, WORD, DOUBLEWORD, ACC = 40-bit signed value. Only MAC Instructions and , . The 16- bit Adder/Subtracter, Barrel Shifter and the 16- bit Logic Unit . Bit Manipulation Unit


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PDF Super10 Super10, Super10 SUP10IS MZ 251 mz 73 b xm 69 rb n014 gpr 163 MZ 197 mz 251 circuit diagram 176E ST10
2002 - cross reference guide

Abstract: 176E ST10 a3nmca
Text: . The 40-bit Adder/Subtracter , . 40-bit Signed Accumulator Register , instruction set handles BIT , BYTE, WORD, DOUBLEWORD, ACC = 40-bit signed value. Only MAC Instructions and , . The 16- bit Adder/Subtracter, Barrel Shifter and the 16- bit Logic Unit . Bit Manipulation Unit


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PDF Super10 Super10, Super10 SUP10IS cross reference guide 176E ST10 a3nmca
2009 - PCF2129

Abstract: P82B486 SC18IM700 demo SC16IS750 application Blinker PCF8591 for RTC ADC 12BIT I2C NXP SE97 pcf8562 SC16IS750
Text: www.nxp.com OM6281 PCA9698 Fm+ 40-bit GPIO daughter card with PCA9530 2- bit LED dimmer © 2009 NXP B.V. All , 18-V input (AEC-Q100) 40-bit I2C Fast Mode totem-pole GPIO with interrupt, reset, and output , SPI GPI interrupt with 18-V input (AEC-Q100) 40-bit I2C Fast-mode Plus totem-pole GPIO with , LED controller with output enable PCA9506 OM6285 P82B715 PCA9634 40-bit I C Fast Mode , bridge with GPIO SC18IS600 40-bit GPIO Low-power RTC for lowest power applications, smart


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PDF PCF2128 PCA9507 PCA9665 68-byte PCF8584 100-kHz PCA9564 400-kHz PCF2129 P82B486 SC18IM700 demo SC16IS750 application Blinker PCF8591 for RTC ADC 12BIT I2C NXP SE97 pcf8562 SC16IS750
2009 - Not Available

Abstract: No abstract text available
Text: / Acronym Interpretation 4B/5B 4- Bit / 5- Bit Encoding/Decoding ANSI American National , Item Bits Convention / Nomenclature • A bit in a register is identified using the format ‘register.bit’. For example, bit 0.15 is bit 15 of register 0. • When a colon is used with bits, it , €¢ For a range of bits, the order is always from the most-significant bit to the least-significant bit , indicate additional description that is not part of the pin name abbreviation. • A bit in a register


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PDF ICS1893CK-40 10Base-T/100Base-TX ICS1893CK-40 10Base-T 100Base-TX 1893CKI-40LFT 1893CKI40LF 40-Lead
8 BIT ALU

Abstract: MC68HC908MR32CFU MC68HC908GP32CP-ND MC9S12DP256CCPV MC9S12DG256 MC68HC908JL8CDW MC912D60ACFU8 MC908AZ60ACFU mc68hc908gp32cfb MC68HC908JL3E
Text: Microcontrollers ­ 8 and 16 Bit (Cont.) 68HC908 Family - 8- Bit Features: · 68HC08 CPU with , design allowing operation down to DC · 16- bit index register · 16- bit stack pointer · 2, 4 or 6 channel 16- bit timers with built in prescalers · COP watchdog protection · Low-power STOP and WAIT modes · , ) (Bytes) (Bytes) I/O A/D Timer (s) 16- Bit 2K 4K 8K 12K 16K 32K 60K 7680 , 13 37 15 23 23 12 12 21 36 37 20 32 10-Ch., 8- Bit 10-Ch., 8- Bit 10-Ch., 8- Bit 10


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PDF 68HC908 68HC08 68HC05 16-bit 68HC908AZ MC912D60ACFU8 MC9S12A128BCFU MC9S12A128BCPV 8 BIT ALU MC68HC908MR32CFU MC68HC908GP32CP-ND MC9S12DP256CCPV MC9S12DG256 MC68HC908JL8CDW MC912D60ACFU8 MC908AZ60ACFU mc68hc908gp32cfb MC68HC908JL3E
2013 - Not Available

Abstract: No abstract text available
Text: MADR-011007 40-bit Serial to Parallel Driver for GaAs FETs Rev. V1 Features Pin Configuration  40-bit Serial to Parallel Converter  20- bit Multiplexer for TX Control bits  Serial , Paddle2 Description The MADR-011007 is a 40-bit serial to parallel driver in a low cost 6 mm 48 , : 44.1908.574.300 • Asia/Pacific Tel: 81.44.844.8296 / Fax: 81.44.844.8298 MADR-011007 40-bit Serial to , : 81.44.844.8298 MADR-011007 40-bit Serial to Parallel Driver for GaAs FETs Rev. V1 Function Diagram First


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PDF MADR-011007 40-bit 20-bit 48-lead TX1-p96 S2083
2000 - DIP40

Abstract: CSP4 1X16 820C 840C 880C PLCC44 1x16-Bit pwm generator SPI interface DIP28
Text: N COP ROM/OTP 8- Bit Microcontroller Quick Reference Guide - 3/22/00 RAM A/D Converter , ; programmable I/Os; Timer with 1x 16- Bit Capture/Autoreload register 912C 768/4k 64 1x16- Bit Multi Function _ MICROWIRETM max.16 820C 1k/4k 64 1x16- Bit Multi Function _ , 128 1x16- Bit Multi Function _ MICROWIRETM max.16/24 DIP20/SO20/DIP28/SO28 commercial, industrial, automotive 880C 4k/4k 128 1x16- Bit Multi Function _ MICROWIRETM max.16/24/36


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PDF DIP20/SO20 16-Bit 768/4k 1x16-Bit DIP20/SO20/DIP28/SO28 3x16-Bit DIP40 CSP4 1X16 820C 840C 880C PLCC44 pwm generator SPI interface DIP28
verilog code for 32 BIT ALU implementation

Abstract: vhdl code 16 bit processor verilog code 16 bit processor verilog code for barrel shifter vhdl code for 8 bit barrel shifter 16 bit multiplier VERILOG Architecture of TMS320C4X FLOATING POINT PROCESSOR instruction set of TMS320C5x dsp processor Architecture of TMS320C54X addressing modes in adsp-21xx
Text: switching for interrupt processing. If you need extended precision, you can address the MAC unit's 40-bit , accumulator bers. The ADSP-219x DSPs expand on with 8 guard bits. the architecture by providing two 40-bit accumulators and a 40-bit shifter result. Device offers singleADSP-21xx family members have X cycle , multiply-accumulate (MAC) units, two 40-bit ALUs, a 40-bit barrel DSP has 40-bit internal shifter, and a 40-bit exponent unit suparchitecture. ported by six 40-bit accumulators. The Devices support con20XX can have


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PDF X3J16/95-0029 NM6403 verilog code for 32 BIT ALU implementation vhdl code 16 bit processor verilog code 16 bit processor verilog code for barrel shifter vhdl code for 8 bit barrel shifter 16 bit multiplier VERILOG Architecture of TMS320C4X FLOATING POINT PROCESSOR instruction set of TMS320C5x dsp processor Architecture of TMS320C54X addressing modes in adsp-21xx
2010 - MSC8156ADS Intrinsic Functions

Abstract: neg_norm_l SC3850 intrinsics SC3850 compiler MAC202 sc3850 Reference Manual idmpys DSASW0019955 SC3850 instruction Word64
Text: No file text available


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2008 - MiniKit-ADuC7020

Abstract: ADuC703x ADE5169 24 BIT adc spi microcontroller 8052 ADE5166 ADuC7061 ADuC7062 ARM7 ADE51XX
Text: ARM7TM 8051 ® ® ® 4 3 3 32 3 - www.analog.com/microcontroller 12 Bit I/O ARM7TDMI ARM7 ADuC7019 ADuC7028 ADuC7128 32 bit RISC D 32 bit 2 3% 126 , Flash/EE ADuC7129 4 ICE I 16 bit Thumb T 41.7 MHz 1 mA/MHz 8 kB SRAM SRAM JTAG ARM 32 bit 80 JTAG DNL ARM7TDMI MCU 16 / 32 bit RISC fs 1MSPS 1.0 44 MHz JTAG 0.5 32 bit 31 k 8 kB SRAM 16 bit 126 kB LSB 2k Flash / EE 0 20 >10000


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PDF ADuC7019 ADuC7028 ADuC7128 44MHz ADuC7129 24-Bit ADuC7060 ADuC7061 ADuC7062 BR04809-2-7/08 MiniKit-ADuC7020 ADuC703x ADE5169 24 BIT adc spi microcontroller 8052 ADE5166 ADuC7061 ADuC7062 ARM7 ADE51XX
2009 - Blinker

Abstract: SC16IS752 PCA9624 GTL2003 PWM I2C DIP SC16IS740 SE97 PCA9552 Matrix Graphic LED Drivers 8 12 pcf8562
Text: ) PCA9505 40-bit I2C Fast Mode totem-pole GPIO with interrupt, reset, pull-up resistors and output enable PCA9506 40-bit I2C Fast Mode totem-pole GPIO with interrupt, reset, and output enable , -V input (AEC-Q100) PCA9703 40-bit GPIO SE97 LED controllers PCA9574 16- bit GPIO , 2 I2C local ± 2 °C temperature sensor PCA9698 40-bit I2C Fast-mode Plus totem-pole GPIO , PCA9600 Fm+ 1-MHz bus buffer daughter card OM6281 PCA9698 Fm+ 40-bit GPIO daughter card with PCA9530 2- bit


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PDF PCA9530 OM6290 PCF8576D, PCF2119, PCF8531, PCA9633 Blinker SC16IS752 PCA9624 GTL2003 PWM I2C DIP SC16IS740 SE97 PCA9552 Matrix Graphic LED Drivers 8 12 pcf8562
C5440

Abstract: TPS543xx TMS320C5510 DSK tms320C5402 C5000 rj11 plug to 3.5mm TPS70758 C5402 BGA 144 C55X
Text: (2-16 bit ) ! C55x CPU Instruction Buffer Unit 17 x 17 MPY 40-bit ADDR RND, SAT 17 x 17 MPY 40-bit ADDR RND, SAT Advanced Idle Power Domain Register Management ALU 40-bit CMPS Operator (Viterbi) EXP Encoder Accumulator Barrel s Shifter 40-bit 40-bit 40-bit Acc A Acc B Acc B 40-bit 40-bit Acc C Acc D 40-bit (-32, 31) Advanced Emulation 16- bit ALU 4 Data , CPU 17 x 17 MPY 40-bit ADDR RND, SAT Accum ulators 40-bit 40-bit Acc A Acc B 40-bit 40-bit


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PDF TMS320C5000 C5000TM C5000 C2000TM C6000TM C55xTM C64xTM C28xTM C5440 TPS543xx TMS320C5510 DSK tms320C5402 rj11 plug to 3.5mm TPS70758 C5402 BGA 144 C55X
1997 - 8 bit barrel shifter vhdl code

Abstract: vhdl code for 8-bit serial adder D950-CORE vhdl code for SIGNED MULTIPLIER accumulator vhdl code for 8-bit adder Ya14
Text: operations, the ALU is fed with 32- bit wide operands, 0-extended to 40-bits. Then, the ALU generates a 40-bit , Calculation Unit s 16 x 16- bit parallel multiplier s 40-bit barrel shifter unit s 40-bit ALU s Two 40-bit , per MAC. A 40-bit arithmetic and logic unit, including a 8- bit extension for arithmetic operations, implements a wide range of arithmetic and logic functions. A 40-bit barrel shifter unit and a bit , 0 32- bit word signed / unsigned 31 16 15 0 40-bit word signed / unsigned


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PDF D950-CORE 16-Bit 16-bihts 8 bit barrel shifter vhdl code vhdl code for 8-bit serial adder D950-CORE vhdl code for SIGNED MULTIPLIER accumulator vhdl code for 8-bit adder Ya14
1995 - FE8B

Abstract: a988
Text: system stack to be efficiently extended using software stack pointer operations. When a 40-bit , instead of the full 40-bit accumulator (A or B). This limiting feature allows block floating point , . When a 40-bit accumulator (A or B) is specified as a destination operand D, any 16- bit source data to , registers are source operands to be moved into a 40-bit accumulator, they are first zero extended to form a , Data ALU registers. When a 40-bit accumulator (A or B) is specified as a source operand S, the


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