4194304-WORD
Abstract: dram 88 pin dram module
Text: 36-bit /. 710 /HB56E436 Series 4194304-word x 36-bit DRAM Module HB56D836 Series 8388608-word x 36-bit DRAM Module.732 HB56D436 Series 4194304-word x 36-bit DRAM Module.745 HB56G236 Series 2097152-word x 36-bit DRAM Module.757 HB56D236 Series 2097152-word x 36-bit DRAM Module. 776 HB56G136 Series 1048576-word x 36-bit DRAM Module
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2010 - MCP8641
Abstract: 0x00000000F EF80 F840 MPC8641
Text: 36-Bit Physical Addressing in U-Boot and Linux Many of Freescale Semiconductor's PowerPC cores, including both the e600 and e500v2 processor families and their derivatives, provide support for 36-bit , explains how to enable and utilize 36-bit physical addressing. In particular, it describes the 36-bit , Utilizing 36-Bit Physical Addressing in U-Boot . . . . 7 36-Bit Addressing in the Device Tree . . . . . . . . . . . 10 Enabling and Utilizing 36-Bit Addressing in Linux . 12 Understanding Addressing 1
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AN4064
36-Bit
e500v2
36-bit
e500associated
MCP8641
0x00000000F
EF80
F840
MPC8641
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1995 - 4 bit dynamic ram
Abstract: 4170A 16 bit static RAM 16 BIT WORD STATIC RAM Dynamic RAM HB56B48 mask ram HM51 HM512200B HM514405C
Text: . 1050 HB56G25636 Series 262144-word ! 36-bit RAM Module . 1057 HB56G51236 Series 524288-word ! 36-bit RAM Module . 1063 HB56D136 Series 1048576-word ! 36-bit RAM Module . 1069 HB56D136BW/SBW Series 1048576-word ! 36-bit RAM Module . 1079 HB56D236BW/SBW Series 2097152-word ! 36-bit RAM Module
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2008 - micro usb mhl adapter
Abstract: sil5744 SII9013 SIL5723 SiI7172 SiI9287 SII1364 SiI3811A SiI7189 SII9125
Text: HDMI: up to 1080p/60, UXGA HDMI: 24/30/ 36-bit MHL: up to 1080i/60 and @ 1080p/60 1080p/30, SXGA MHL , HDTVs and projection HDTVs 4/1 with MHLTM Technology 1080p@60Hz or 1080i@120Hz with 36-bit , /1 with MHL Technology and InstaPortTM Technology 1080p@60Hz or 1080i@120Hz with 36-bit color , HDTVs 4 HDMI ports with MHL and InstaPort 1080p@60Hz or 720p/1080i@120Hz with 36-bit color depth for HDMI or 1080p@30Hz or 720p/1080i@60Hz with 24- bit color depth with MHL 24/30/ 36-bit
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SiI1392
-1080p
165MHz
144-pin
CP9233
SiI9002
1080i,
1080p
12-bit
48-pin
micro usb mhl adapter
sil5744
SII9013
SIL5723
SiI7172
SiI9287
SII1364
SiI3811A
SiI7189
SII9125
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1996 - 00FF
Abstract: A-31 DSP56800 dsp56800 instruction opcode MR1211
Text: to execution, the 36-bit A accumulator contains the value $F:FFFF:FFF2. Since this is a negative , expressed using the standard 36-bit , fixed-point, two's-complement data representation. Data limiting does , the result in the destination accumulator. Long words (32 bits) may be added to the ( 36-bit , $2000:8000, and the 36-bit accumulator contains the value $0:2000:8000. In addition, C is set to one , to the 36-bit accumulator. In addition, C is added into the LSB of this 36-bit addition. The 36-bit
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36-bit
16-bit
16-bit
DSP56800
00FF
A-31
dsp56800 instruction opcode
MR1211
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2010 - stm32f100
Abstract: STM32F100 BOOT PIN STM32F100 family ST10F273 programmer schematic STM32VLDISCOVERY STR9-DK/RAIS STM8S20 PROGRAMMER FOR STM32F103 STM32F107* Micrium STM32F100C6
Text: size code 6 T 4 MCU - Typical designations and part number suffixes 8-, 16- and 32- bit , : SGMICRO0210 STM32 - 32- bit microcontroller families Program memory Part number Type Size Flash ROM (Kbytes) Data RAM E²PROM (bytes) (bytes) Timer functions A/D inputs 12 or 16- bit (IC/OC/PWM) STM32F - 32- bit ARM Cortex MCUs 16 4K - STM32F100C6 l 32 4K - 10x12- bit STM32F100C8 l 64 8K - 10x12- bit l 128 8K - 10x12- bit l
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STM32
10x10)
14x14)
ST7MDT10-8/DVP
stm32f100
STM32F100 BOOT PIN
STM32F100 family
ST10F273 programmer schematic
STM32VLDISCOVERY
STR9-DK/RAIS
STM8S20
PROGRAMMER FOR STM32F103
STM32F107* Micrium
STM32F100C6
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2009 - STM32W108
Abstract: stm32f103 DAC STM8L151 PROGRAMMER FOR STM32F103 stm32f107 stm32f103 spi stm32f105 STM32 PWM output developer kit ST10F273 programmer schematic STM32-PRIMER2
Text: size code 6 T 4 MCU - Typical designations and part number suffixes 8-, 16- and 32- bit , : SGMICRO0909 STM32 - 32- bit microcontroller families Program memory Part number Type Size Flash , (high 12 or 16- bit Serial interface 8- bit (IC/OC/ levels current²) (IC/OC/ Others PWM) PWM) STM32F101 Access line - 36 MHz CPU 2x16- bit 26(26) (8/8/8) 2xWDG, 1xSPI, 1xI²C, 2x16- bit 24- bit down 2xUSART (IrDA, ISO 26(26) (8/8/8) counter 7816) 3x16- bit 26(26) (12/12/12) 2x16- bit 36(36) 2xWDG
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STM32
10x10)
14x14)
32-bit
SGMICRO0909
STM32W108
stm32f103 DAC
STM8L151
PROGRAMMER FOR STM32F103
stm32f107
stm32f103 spi
stm32f105
STM32 PWM output developer kit
ST10F273 programmer schematic
STM32-PRIMER2
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2009 - SiI7172
Abstract: sil5744 SII9233 SII9125 SiI9233A SII9013 SIL5723 SiI7189 SiI9022A sil9002
Text: 1.1 HDMI®: 1080p@60Hz or 1080i@ Support 120Hz with 36-bit color depth; Mobile: 1080p@30Hz or 720p , ® : 1080p@60Hz or 1080i@ 120Hz with 36-bit color depth; HDCP 1.1 Support Adaptive equalizer and DPLL for , InstaPortTM technology HDMI®: 1080p@60Hz or 1080i@ 120Hz with 36-bit color depth; HDCP 1.1 Support , InstaPortTM technology HDMI®: 1080p@60Hz or 720p/1080i@120Hz with 36-bit color depth 24/30/ 36-bit , HDTVs, front and rear projection HDTVs 2 225 Up to 1080p@60Hz or 720p/1080i@120Hz with 36-bit
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SiI9181A
480i/p,
1080i/p
225MHz
56-pin
CP9181AHDMI
SiI9185A
SiI7172
sil5744
SII9233
SII9125
SiI9233A
SII9013
SIL5723
SiI7189
SiI9022A
sil9002
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1996 - 243191
Abstract: AP-485 "page attribute table" pat 243190 partition look-aside table
Text: owners. TABLE OF CONTENTS PAGE CHAPTER 3 PROTECTED MODE MEMORY MANAGEMENT 3.1. 36-BIT PAGE , . Description of the 36-bit PSE Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 , . 3.1. 36-BIT PAGE SIZE EXTENSION (PSE) The 36-bit PSE extends 36-bit physical address support to , ' physical address extension (PAE) feature provides generic access to a 36-bit physical address space, but , translation. For P6 family processors that support the 36-bit PSE feature, the virtual memory architecture is
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2010 - 5SGX
Abstract: 16 bit multiplier 16-bit adder COMPRESSOR PLUG carry select adder 16 bit using fast adders
Text: Mode 18 × 18 Multiplier Summed with 36-Bit input 188 564 376 376 188 188 376 , Sum of 2 Square 1 Yes (1) No Yes Yes 18 × 18 Multiplication Summed with 36-Bit , Summed with 36-Bit Input Mode" on page 319 "Systolic FIR Mode" on page 320 Stratix V Device , Independent Multiplier Mode Mult_H 36-Bit Multiplier You can efficiently construct an individual 36-bit , four 18 × 18 multipliers, as shown in Figure 39. The 36-bit multiplier is useful for applications
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SV51004-1
5SGX
16 bit multiplier
16-bit adder
COMPRESSOR PLUG
carry select adder 16 bit using fast adders
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2005 - MN103G57G
Abstract: MN103SF mn101cf95 MN101CF95G MN101CF91D mn103002
Text: ¢ AM1 (MN101) 8- bit Single-chip Microcomputers Series Specifications Type ADC Built-in Type , MN101C28D MN101C28F MN101C28L MN101C51F ROM RAM (× 8- bit ) (× 8- bit ) 4K 8K 16 K 16 K 24 K 24 K 32 K 32 K , 5.5 2.0 to 5.5 4.5 to 5.5 2.0 to 5.5 4.5 to 5.5 2.0 to 5.5 7 12*4 11 14 17 18 8- bit × 2 8- bit × 3 16- bit × 1 8- bit × 3 16- bit × 1 8- bit × 3 16- bit × 1 8- bit × 5 16- bit × 1 8- bit × 5 16- bit × 1 Serial , 24 - - 70 0.1 125 4.5 to 5.5 2.0 to 5.5 18 8- bit × 5 16- bit × 1
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MN101)
MN101C273
MN101C425
MN101C427
MN101C457
MN101C539
MN101C309
MN101C30A
MN101C28A
MN101C28C
MN103G57G
MN103SF
mn101cf95
MN101CF95G
MN101CF91D
mn103002
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Not Available
Abstract: No abstract text available
Text: both ports, "36- bit to 36-bit" buffering is also available. A very important feature of the Q S725420A , . Bi-directional operation is also available when the full width of both ports is used (e.g., 36-bit to 36-bit , -00030-00 JULY 17, 1995 AN-30: USING THE QS725420A FOR DATABUS FUNNELING FIGURE 2a. 36-BIT TO 9- BIT , FUNNELING FIGURE 2b. 36-BIT TO 9- BIT CONVENTIONAL FUNNELING WRITE AND READ TIMING DIAGRAM R EAD C YCLES , the four 9-bit-wide FIFOs is used to represent the entire 36-bit word, there is no way to ensure that
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AN-30:
QS725420A
S725420A
32-bit,
18-bit
36-bit,
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2005 - Not Available
Abstract: No abstract text available
Text: ), 71P74804 (1M x 18- Bit ) 71P74604 (512K x 36-Bit ) 18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range , ) 71P74604 (512K x 36-Bit ) Advance Information IDT71P74204 (2M x 8- Bit ), 71P74104 (2M x 9- Bit ), 71P74804 (1M x 18- Bit ) 71P74604 (512K x 36-Bit ) 18 Mb QDR II SRAM Burst of 4 Commercial Temperature Range 18 Mb , ), 71P74104 (2M x 9- Bit ), 71P74804 (1M x 18- Bit ) 71P74604 (512K x 36-Bit ) 18 Mb QDR II SRAM Burst of 4 , (1M x 18- Bit ) 71P74604 (512K x 36-Bit ) Advance Information IDT71P74204 (2M x 8- Bit ), 71P74104 (2M x 9- Bit
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IDT71P74204
IDT71P74104
IDT71P74804
IDT71P74604
IDT71P74204
71P74104
71P74804
71P74604
36-Bit)
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2008 - SII9125
Abstract: rgb to hdmi 720p SiI9127 SiI9287 SiI9181 RGB to YCbCr converter SII9223 dlp 1080p HDMI to vga SiI9185
Text: 4/1 with MHLTM Technology 1080p@60Hz or 1080i@120Hz with 36-bit color depth for HDMI, or , with MHL Technology and InstaPortTM Technology 1080p@60Hz or 1080i@120Hz with 36-bit color depth , with 36-bit color depth for HDMI or 1080p@30Hz or 720p/1080i@60Hz with 24- bit color depth with MHL 24/30/ 36-bit RGB/YCbCr 4:4:4, 16/20/24- bit YCbCr 4:2:2, 8/10/12- bit YCbCr 4:2:2 4x12- bit ADC , HDTV 2 225 Up to 1080p@60Hz or 720p/1080i@120Hz with 36-bit color depth 24/30/ 36-bit
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SiI9181
1080i,
1080p
144-pin
CP9223HDMI
SII9125
rgb to hdmi 720p
SiI9127
SiI9287
RGB to YCbCr converter
SII9223
dlp 1080p
HDMI to vga
SiI9185
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1996 - AA0034
Abstract: AA0035 DSP56800 8000-Maximum "saturation arithmetic"
Text: Shifter MUX Rounding Constant 36-bit Accumulator Shifter + DSP56800 Family Manual 3-1 , programming model is shown in Figure 3-2. In the programming model, accumulator "A" refers to the entire 36-bit , significant, and least significant portions of the 36-bit accumulator, respectively. The instruction has the , Architecture CGDB XDB2 X0 Y0 Y1 A1 or B1 Optional Invert MUX 16- Bit Barrel Shifter x 36-bit , 36-bit data ALU accumulator registers can be accessed either as a 36-bit register (A or B) or as by
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36-bit
DSP56800
ARITHMETIC3-15
XX0100
1110XX.
XX0101
AA0050
AA0034
AA0035
8000-Maximum
"saturation arithmetic"
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1996 - A988
Abstract: DSP56800 FE8B SR-0005
Text: product in the specified 36-bit destination accumulator (D). The "-" sign option is used to negate the , contains the value $4000 (0.5), the 16- bit Y1 register contains the value $F456 (-0.0911255), and the 36-bit , B result See 16- bit Destinations on page 3-34 for cases with X0, Y0, or Y1 as D. See 36-bit , the result using the specified rounding, and store it in the specified 36-bit destination accumulator , contains the value $4000 (0.5), the 16- bit Y1 register contains the value $F456 (-0.0911255), and the 36-bit
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16-bit
36-bit
DSP56800
A988
FE8B
SR-0005
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1999 - GE-4
Abstract: TxIN10 C365 C385 C387 DS90C365 DS90C385 DS90C387 DS90CF384A DS90CF388
Text: 36-bit Transmitter Input Data Pin 24- bit 2Tx (C385) 18- bit 2Tx (C365) Receiver Output , Signal 48- bit 1Rx (CF388) 36-bit 48- bit RE0 Txin27 R16 Rxout27 R16 RE0 , . Dual Pixel per Clock Input Application (Continued) VGA - TFT Data Signal 48- bit LSB 36-bit , (CF388) RO0 Txin27 R26 Rxout27 R26 RO1 Txin5 R27 Rxout5 36-bit R27 48- bit , ) 48- bit 1Rx (CF388) R0 R16 R16 R1 LSB 18- bit R17 TFT Panel Data Signal 36-bit
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DS90C387/DS90CF388
18-bit
24-bit
18-bit
AN-1127
GE-4
TxIN10
C365
C385
C387
DS90C365
DS90C385
DS90C387
DS90CF384A
DS90CF388
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2009 - shinano stepper motor
Abstract: microstepping L6203 L298N BTB16-600CW UNIVERSAL MOTOR SPEED CONTROL CIRCUIT zoo607ma fast diode transil 247 T1635H-6T L6393 PMSM stm32 L297D
Text: Motor control Selection guide January 2009 www.st.com Contents Microcontrollers 8- bit microcontroller families 32- bit microcontroller familes Development tools 4 4 7 15 Power Power , Microcontrollers 8- bit microcontroller families Part numbers Program Data RAM Flash memory EEPROM (bytes) (Kbytes) (bytes) A/D inputs Timer functions 12 or 16- bit 8- bit Others {IC/OC/PWM} {IC/OC/PWM , pins STM8S - 8- bit microcontrollers STM8S207K6 · 32 2K 1K 7x10- bit 3x16- bit (8/8
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32-bit
PowerSO-10,
Max247
SGMOTOR1008
shinano stepper motor
microstepping L6203
L298N
BTB16-600CW UNIVERSAL MOTOR SPEED CONTROL CIRCUIT
zoo607ma
fast diode transil 247
T1635H-6T
L6393
PMSM stm32
L297D
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2013 - SDI-12 circuit
Abstract: No abstract text available
Text: ) Low = SDI data are not output from SDO. GSLAT Signal (Internal in 1st Device) 36-Bit GS Data , (1) ON tD1 (1) OUTn on-time changes, depending on the data in the 36-bit GS data latch , 36-Bit GS Data Latch 0 Internal Oscillator 12 MHz reset 35 GS Clock Counter 36 12 , on when the GS count is '1', except when OUTn are programed to GS data '0' in the 36-bit GS data , written to the 36-bit GS data latch. Afterwards, the GS counter begins incrementing and PWM control is
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TLC5973
SBVS225
12-Bit,
12-Bit
SDI-12 circuit
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2000 - DIP40
Abstract: CSP4 1X16 820C 840C 880C PLCC44 1x16-Bit pwm generator SPI interface DIP28
Text: N COP ROM/OTP 8- Bit Microcontroller Quick Reference Guide - 3/22/00 RAM A/D Converter , ; programmable I/Os; Timer with 1x 16- Bit Capture/Autoreload register 912C 768/4k 64 1x16- Bit Multi Function _ MICROWIRETM max.16 820C 1k/4k 64 1x16- Bit Multi Function _ , 128 1x16- Bit Multi Function _ MICROWIRETM max.16/24 DIP20/SO20/DIP28/SO28 commercial, industrial, automotive 880C 4k/4k 128 1x16- Bit Multi Function _ MICROWIRETM max.16/24/36
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DIP20/SO20
16-Bit
768/4k
1x16-Bit
DIP20/SO20/DIP28/SO28
3x16-Bit
DIP40
CSP4
1X16
820C
840C
880C
PLCC44
pwm generator SPI interface
DIP28
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1999 - ds90C364
Abstract: rgb 18 bit to lvds C365 C385 C387 DS90C365 DS90C385 DS90C387 DS90CF384A DS90CF388
Text: Signal 48- bit LSB 36-bit Transmitter Input Data Pin 24- bit 2Tx (C385) 18- bit 2Tx (C365 , R17 Rxout5 36-bit R17 48- bit RO0 RO1 RO2 RO0 Txin0 Txin0 R10 Rxout0 , LSB 36-bit Transmitter Input Data Pin 24- bit 2Tx (C385) 18- bit 2Tx (C365) Receiver , Signal 48- bit 1Rx (CF388) 36-bit 48- bit RE0 Txin27 R26 Rxout27 R26 RE0 , R16 R16 R1 LSB 18- bit R17 TFT Panel Data Signal 36-bit R17 48- bit RO0 RO1
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DS90C387/DS90CF388
18-bit
24-bit
18-bit
AN-1127
ds90C364
rgb 18 bit to lvds
C365
C385
C387
DS90C365
DS90C385
DS90C387
DS90CF384A
DS90CF388
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1997 - TQFP 132 PACKAGE
Abstract: HIT 7070
Text: IDT INTRODUCES NEW FIFOS TO EXPAND 36-BIT SyncFIFOTM FAMILY Bus-Matching Features Simplify Interface , Bus-Matching, Bidirectional Bus-Matching and TripleBus families to extend its 36-bit Synchronous FIFO lineup , based on narrower buses. "The 36-bit SyncFIFO enables our customers to significantly increase bandwidth , 's Industry-Leading 36-Bit SyncFIFO Family The new FIFOs add to IDT's family of high-speed, low-power synchronous (clocked) 36-bit FIFO memories. The SyncFIFOs support clock frequencies up to 67 MHz and deliver
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36-BIT
120-pin
132-pin
128-pin
TQFP 132 PACKAGE
HIT 7070
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2009 - LQFP64 package
Abstract: dali schematic "32-Bit Microcontrollers" stm32f105 bga 8X16 ST10F273 programmer schematic STM32F10x USB HOST STM32F10x ST7DALI-eval STM3210E
Text: size code 6 B 2 MCU - Typical designations and part number suffixes 8-, 16- and 32- bit , information on ST products and solutions, visit www.st.com www.st.com/mcu Order code: SGMICRO0409 32- bit , E2PROM (bytes) (bytes) Timer functions A/D inputs 12 or 16- bit (IC/OC/ PWM) 8- bit (IC/OC , levels Supply voltage (V) QFN36 QFN36 Special features STM32 (ARM CortexTM-M3) - 32- bit microcontrollers STM32F101T4 36 STM32F101T6 pins STM32F101T8 l 16 32 4K 6K 10x12- bit 10x12- bit
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STM32
10x10)
14x14)
32-bit
SGMICRO0409
LQFP64 package
dali schematic
"32-Bit Microcontrollers"
stm32f105
bga 8X16
ST10F273 programmer schematic
STM32F10x USB HOST
STM32F10x
ST7DALI-eval
STM3210E
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2006 - MC13783
Abstract: No abstract text available
Text: audio. Bit settings designated as "X" are "don't care" or depend on the specific intended application , SPI sequence. However, the step in which the bit is programmed is still important. The actual value , Audio Shutdown Sequence Register Bit # Bit Name Bit Value 1 36 1 BIASEN 1 , (continued) Sequence Register Bit # Bit Name Bit Value 6 SW 7 37 WAIT WAIT , if the fast bias is used. Table 2 provides the bit settings and WAIT time changes when using the
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AN3261
MC13783
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Not Available
Abstract: No abstract text available
Text: Dynamic RAM 5 V E D O . 151 4 M x 36-Bit Dynamic RAM 5 V .161 4 M x 36-Bit Dynamic RAM 5 V E D O. 171 8 M x 36-Bit Dynamic RAM 5 V . 181 8 M x 36-Bit Dynamic RAM 5 V EDO , -50/-60/-70 322035S/GS -50/-60/-70 1 M x 32- Bit Dynamic RAM 5 V .41 1 M x 32- Bit Dynamic RAM 5 V .51 1 M x 32- Bit
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B116-H6557-G3-X-7600,
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