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MSP430F5517IPN Texas Instruments 25 MHz MCU with Integrated USB Phy, 96KB Flash, 6KB RAM, 32BIT HW Multiplier 80-LQFP -40 to 85
MSP430F5517IPNR Texas Instruments 25 MHz MCU with Integrated USB Phy, 96KB Flash, 6KB RAM, 32BIT HW Multiplier 80-LQFP -40 to 85
MSP430F5519IPN Texas Instruments 25 MHz MCU with Integrated USB Phy, 128KB Flash, 8KB RAM, 32BIT HW Multiplier 80-LQFP -40 to 85
MSP430F5513IRGCR Texas Instruments 25 MHz MCU with Integrated USB Phy, 32KB Flash, 4KB RAM, 32BIT HW Multiplier 64-VQFN -40 to 85
MSP430F5519IPNR Texas Instruments 25 MHz MCU with Integrated USB Phy, 128KB Flash, 8KB RAM, 32BIT HW Multiplier 80-LQFP -40 to 85
MSP430F5513IZQE Texas Instruments 25 MHz MCU with Integrated USB Phy, 32KB Flash, 4KB RAM, 32BIT HW Multiplier 80-BGA MICROSTAR JUNIOR -40 to 85
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32-bit datasheet (1)

Part Manufacturer Description Type PDF
32-Bit Logic Families in LFBGA Packages NXP Semiconductors ANLFBGA 32-Bit Logic Families in Low-profile Fine-pitch Ball Grid Array (LFBGA) Packages Original PDF

32-bit Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
68b50

Abstract: 68b09 68B21 Motorola 68A09 motorola 6809 8 bit Instruction set 68hc811e2 6802 processor motorola 68hc000-10 68A21 68A50
Text: Integrated Circuits 8- BIT MICROPROCESSORS & MICROCONTROLLERS 32-BIT CONTROLLERS AND PERIPHERALS MIL-STD-883C 8- Bit Microprocessors, 32-Bit Controllers & Microcontrollers 883C Package Type and Lead Finish , MICROPROCESSORS & MICROCONTROLLERS 32-BIT CONTROLLERS AND PERIPHERALS MIL-STD-883C 32-Bit Controllers & , 68332 IB IB 32-Bit Microcontroller 32-Bit Microcontroller 132 132 4Q90 4Q90 Data Communications & , & MICROCONTROLLERS 32-BIT CONTROLLERS AND PERIPHERALS Standard Military Drawings (SMD) 8- Bit


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PDF 32-BIT MIL-STD-883C 68A09 68B09 68A21 68B21 68b50 Motorola 68A09 motorola 6809 8 bit Instruction set 68hc811e2 6802 processor motorola 68hc000-10 68A50
1998 - register file

Abstract: ADSP-2100 ADSP-21000 ADSP-21160 RND32
Text: the typical data width supported by the ADSP-21160 architecture is 32-bits , the 64- bit DM and PM , precision floating-point data 32-bit floating-point data 16- bit short word data The ADSP-21160s external memory interface accommodates the following word types: 48- bit instructions 32-bit , , comprised of two consecutive 32-bit data words 48- bit accesses, for instruction fetches only 40- bit data word accesses 5-2 ADSP-21160 SHARC Technical Specification, Rev 3.0 'DWD$FFHVVHV 32-bit


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PDF ADSP-21160s 64-bit ADSP-21160 32-bits, 40-bit register file ADSP-2100 ADSP-21000 RND32
1996 - 7 bit hamming code

Abstract: FCT245 IDT39C60 32-bit microprocessor architecture IDT49C460 IDT49C465 IDT49C466 IDT74FCT244
Text: PROTECTING YOUR DATA WITH THE IDT49C465 32-BIT Flow-thruEDCTM UNIT APPLICATION NOTE AN-64 PROTECTING YOUR DATA WITH THE IDT49C465 32-BIT Flow-thruEDCTM UNIT APPLICATION NOTE AN , Error-Free Memories With the advent of high-performance 32-bit RISC and CISC microprocessors, general , Controller /WR Check Bit Memory Main Memory PROTECTING YOUR DATA WITH THE IDT49C465 32-BIT Flow-thruEDCTM UNIT APPLICATION NOTE AN-64 PROTECTING YOUR DATA WITH THE IDT49C465 32-BIT Flow-thruEDCTM


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PDF IDT49C465 32-BIT AN-64 64-bit 7 bit hamming code FCT245 IDT39C60 32-bit microprocessor architecture IDT49C460 IDT49C465 IDT49C466 IDT74FCT244
KU80386EXTC33

Abstract: TN80C188EB20 FA80386EXTC33 TS80C188EB-20 KU80386EXTC25 TS80C188EC20 FA80386EXTB25 A80486DX4WB100 386SX TA80C186XL20
Text: Enhanced MPU, 3V, Extended Temp.100-MQFP 16MHz, 32-Bit , 386DX Processor, 5.0V.132-PGA 20MHz, 32-Bit , 386DX Processor, 5.0V.132-PGA 25MHz, 32-Bit , 386DX Processor, 5.0V.132-PGA 33MHz, 32-Bit , 386DX Processor, 5.0V.132-PGA 20MHz, 32-Bit , 386DX Processor, 5.0V .132-QFP 25MHz, 32-Bit , 386DX Processor, 5.0V .132-QFP 33MHz, 32-Bit , 386DX Processor, 5.0V


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PDF N80C186XL20 803140-ND N80C186XL25 803256-ND N80C188XL12 N80C188XL20 R80C186XL20 R80C186XL25 S80C186XL12 803698-ND KU80386EXTC33 TN80C188EB20 FA80386EXTC33 TS80C188EB-20 KU80386EXTC25 TS80C188EC20 FA80386EXTB25 A80486DX4WB100 386SX TA80C186XL20
2013 - IVOR33

Abstract: No abstract text available
Text: and 32-bit Instruction Length Decode Algorithm by: Pavel Bohacik Contents 1 Introduction , MPC56xx 32-bit microcontroller family built on Power Architecture ® technology provides a mechanism by , .2 4 Book E or VLE instruction decoding.2 5 Decoding 16- bit or 32-bit , use both variable length encoding (VLE) 16- bit and 32-bit instructions and Book E 32-bit instructions , machine check interrupt. An increment of 4 bytes is required for Book E instructions and VLE 32-bit


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PDF AN4648 16-bit 32-bit MPC56xx IVOR33
82358

Abstract: No abstract text available
Text: Cycles . 1-309 Figure 3-3 Host Master to 32-Bit EISA Memory I/O Slave Standard R ead/W rite Cycles . 1-310 Figure 3-4 Host Master to 32-Bit EISA Memory Slave Two Standard Read C y c le s . 1-311 Figure 3-5 Host M aster to 32-Bit EISA Memory Slave Locked , 82358 [PfôiyRülMfôY PAGE T I M I N G D I A G R A M L I S T (Continued) Figure 3-12 32-Bit EISA M aster to Host Memory Slave Standard W rite/R ead Cycles .1-319 Figure 3-13 32-Bit


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PDF 16-Bit 32-Bit 82358
2001 - AN601

Abstract: DIV32 DS80C390 IEEE754
Text: Application Note 601 Accelerating 16/ 32-Bit Math Operations with the DS80C390 www.maxim-ic.com , to applications doing intensive 16- bit math is the inclusion of dedicated hardware for 16/ 32-bit , fashion through the MA, MB, and MC registers. The MA register allows transfer of 32-bit data to/from the , Carry Bit Clear MA, MB, and MC 16- bit multiplicand 16- bit dividend 32-bit dividend 32-bit data 32-bit data 32-bit product 16- bit quotient 32-bit quotient 32-bit mantissa 32-bit shifted


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PDF 16/32-Bit DS80C390 16-bit DS80C390 40Mov 40Mhz AN601 DIV32 IEEE754
2005 - PPC970

Abstract: PowerPC 970 register set ppc970 data PowerPC 970 64-BIT 970fx Introduction to 64-bit computing and PowerPC 970xx Processors
Text: computing and discuss the advantages of a 64- bit operating system environment. Designed for 32-bit and 64- bit , PowerPC 32-bit mode at full speed. 970xx processors use the same data paths and execution units for both 32-bit and 64- bit instructions. The entire cache and bus are used in 32-bit mode. There are no limitations or reduced performance situations due to running in 32-bit mode. The 32-bit and 64- bit functional units are not separated nor are 32-bit applications executed in a "compatibility" or "emulation" mode


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PDF 64-bit 970xx 970xx 64-bit 32-bit PPC970 PowerPC 970 register set ppc970 data PowerPC 970 970fx Introduction to 64-bit computing and PowerPC 970xx Processors
Hitachi DSAUTAZ005

Abstract: No abstract text available
Text: (channel) Supply Voltage Address Space 32-bit Timer 16- bit Timer 8- bit Timer PWM Timer Watch Dog , DMAC(channel) Supply Voltage Address Space 32-bit Timer 16- bit Timer 8- bit Timer PWM Timer , ) TPC DMAC(channel) Supply Voltage Address Space 32-bit Timer 16- bit Timer 8- bit Timer PWM , Data Bus ITU/IPU (channel) TPC DMAC(channel) Supply Voltage Address Space 32-bit Timer , ) TPC DMAC(channel) Supply Voltage Address Space 32-bit Timer 16- bit Timer 8- bit Timer PWM


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PDF 32-bit 16-bit H8/300H H8/3037 H8/3008 H8/3061 H8/3036 Hitachi DSAUTAZ005
x86 addressing mode

Abstract: 32-bit microprocessor architecture intel x86 processor architecture x86 processor architecture intel x86-64 gprs abstract interrupts of x86 microprocessor how to define amd athlon 64 app abstract
Text: for many more years. Existing 32-bit environments and applications will continue to serve a majority , from 32-bit efficient and inexpensive. Unfortunately, the 64- bit solutions proposed by some processor , to 64- bit environments gradually, while continuing to run 32-bit applications without incurring , x86 compatibility and performance for their existing 32-bit installed base. · Platform suppliers , costs of providing technical support for two ( 32-bit and 64- bit ) systems. · Operating system and


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PDF X86-64TM 64-bit x86-64 x86 addressing mode 32-bit microprocessor architecture intel x86 processor architecture x86 processor architecture intel x86-64 gprs abstract interrupts of x86 microprocessor how to define amd athlon 64 app abstract
2002 - MB89135L

Abstract: MB89P637 MB89133A MB89131 MB89125A MB89123A MB89121 FR30 MB89P133A MB89XXX
Text: Entire Site Site map Support Microcontrollers F2MC 8 Bit Series 16 Bit Series FR 32-Bit , 3 4 128 (32) 8 Power- Pin Saving Count Modes 2 x 8 bit 11 or 11 1 x 16 bit 3 2 X 8 bit 3 or on-chip STOP 256 11 1 x 16 bit Remote , 16 bit 12 bit CLOCK MB89146 130/A 3 MB89144 120/A 24 768 Programmable , Features 36 1x8 bit 1x8 bit Yes 4x8 bit (A-Version with SLEEP on-chip STOP


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PDF 32-Bit MB89xxx MB89121 MB89123A MB89125A MB89131 MB89P131 MB89P985 MB89997 MB90Pxxx MB89135L MB89P637 MB89133A MB89131 MB89125A MB89123A MB89121 FR30 MB89P133A MB89XXX
4194304-WORD

Abstract: dram 88 pin dram module
Text: 4194304-word x 32-bit DRAM Module.796 HB56TW433D Series 4194304-word x 32-bit DRAM Module. 809 HB56AW232D Series 2097152-word x 32-bit DRAM Module. 822 HB56TW132D Series 1048576-word x 32-bit DRAM Module. 834 [72-pin SIMM] HB56U832 Series 8388608-word x 32-bit DRAM Module. 836 HB56A832 Series 8388608-word x 32-bit DRAM Module. 848 HB56U432 Series 4194304


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PDF
2007 - TIM12

Abstract: TS timer ARM926EJ-S C6000 TMS320C6000 PSC34 CLKSRC34 TINT34
Text: . 10 Dual 32-Bit Timers Chained Mode Block Diagram . 12 Dual 32-Bit Timers Chained Mode Example . 12 Dual 32-Bit Timers Unchained Mode Block Diagram . 14 Dual 32-Bit Timers Unchained Mode Example . 15 32-Bit Timer Counter Overflow Example


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PDF TMS320DM646x 64-Bit TIM12 TS timer ARM926EJ-S C6000 TMS320C6000 PSC34 CLKSRC34 TINT34
Not Available

Abstract: No abstract text available
Text: -50/-60/-70 322035S/GS -50/-60/-70 1 M x 32-Bit Dynamic RAM 5 V .41 1 M x 32-Bit Dynamic RAM 5 V .51 1 M x 32-Bit Dynamic RAM 5 V EDO. 61 2 2 2 2 2 M M M M M x 32-Bit x 32-Bit x 32-Bit x 32-Bit x 32-Bit Dynamic Dynamic Dynamic Dynamic Dynamic RAM RAM RAM RAM RAM 5 5 5 5 5 V V , (L) -50/-60 HYM 324000GD -50/-60 HYM 328000GD -50/-60 HYM 328020GD -50/-60 4 M x 32-Bit Dynamic


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PDF B116-H6557-G3-X-7600,
2007 - SPRUE26

Abstract: ARM926EJ-S C6000 TIM12 TDDR34 64-Bit Microcontrollers PSC34
Text: . 10 Dual 32-Bit Timers Chained Mode Block Diagram . 12 Dual 32-Bit Timers Chained Mode Example . 12 Dual 32-Bit Timers Unchained Mode Block Diagram . 14 Dual 32-Bit Timers Unchained Mode Example . 15 32-Bit Timer Counter Overflow Example


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PDF TMS320DM644x 64-Bit SPRUE26 SPRUE26 ARM926EJ-S C6000 TIM12 TDDR34 64-Bit Microcontrollers PSC34
2010 - MX25L25635E

Abstract: MX25L256 mx25l25635 mxic MX25L25 MXIC serial Flash macronix an053
Text: . The only difference is that the address length must be increased to 32-bits. To exit the 32-bit , .2 . 2. Two Address Modes: 24- bit Address Mode and 32-bit Adress Mode.3 Figure 1. 32-bit Address Protocol , Flash Application in System Reset 1. Introduction MX25L25635E provides 24- bit and 32-bit address modes by command definition. Once the device enters 32-bit address mode by B7 command, command E9 or


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PDF MX25L25635E 256Mb MX25L25635E 24-bit 32-bit MX25L256 mx25l25635 mxic MX25L25 MXIC serial Flash macronix an053
1995 - 4170A

Abstract: 4 bit dynamic ram hitachi ic HM514405C HM512200B HM51 mask ram HB56B48 Dynamic RAM 16 BIT WORD STATIC RAM
Text: RAM Module HB56G25632 Series HB56G51232 Series 524288-word ! 32-bit RAM Module . 979 HB56A140BR Series 2 262144-word ! 32-bit RAM Module , 992 HB56A432 Series 4194304-word ! 32-bit RAM Module . 999 HB56T432D Series 4194304-word ! 32-bit RAM Module . 1006 HB56TW432D Series 4194304-word ! 32-bit RAM Module


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PDF
2004 - 32-Bit Microcontrollers

Abstract: Microcontrollers ARM7 32 bit processor semico AT91SAM7S "32-Bit Microcontrollers" CMOS Single Chip 32-Bit Microcontrollers
Text: Facilitating the Migration from 8- bit to 32-bit Microcontrollers By Jacko Wilbrink, ARM Product , in order to reduce the total effort required. This paper describes how Atmel's Smart ARM 32-bit RISC , 32-BIT MICROCONTROLLERS Table of Contents The move from 8- bit to 32-bit microcontrollers is in , . 8 2 3323A-ATARM-10/04 FACILITATING THE MIGRATION FROM 8- BIT TO 32-BIT MICROCONTROLLERS The move from 8- bit to 32-bit microcontrollers is in progress The market research company, Semico


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PDF 32-bit 323A-ATARM-10/04 32-Bit Microcontrollers Microcontrollers ARM7 32 bit processor semico AT91SAM7S "32-Bit Microcontrollers" CMOS Single Chip 32-Bit Microcontrollers
2004 - 4-bit even parity checker circuit diagram

Abstract: BAR53 4-bit parity/generator checker design S 1854 PCI-MT64-XP-N2 PCI-MT32-XP-N2 PCI-MT32-XP-N1 BAR43 BAR13 BUS BAR specification
Text: available in a number of configurations covering 32-bit PCI, 64- bit PCI, 32-bit local bus, 64- bit local bus , generating both the 32-bit and 64- bit data transaction on the PCI bus. For systems with address maps larger , signals for both the 32-bit and 64- bit PCI applications and additional signals including interrupts , Signals l_ad_in[31:0] in Lower 32-bit Local multiplexed address/data input l_ad_in[63:32]1 in Upper 32-bit Local multiplexed address/data input l_data_out[31:0] out Lower 32-bit Local data


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PDF 32/64-Bit 32/64-Bit 64-Bit 66MHz 32-bit 64-bit) 32-Bit PCI-T32-5X-N2 LC5768MV-5F484C 4-bit even parity checker circuit diagram BAR53 4-bit parity/generator checker design S 1854 PCI-MT64-XP-N2 PCI-MT32-XP-N2 PCI-MT32-XP-N1 BAR43 BAR13 BUS BAR specification
2000 - Map 6808

Abstract: MAP 6810 motorola 6810 memory 6C46 6058 S INSTRUCTION SET motorola 6800 M/triac TB 137 600e QADC64 MPC556 MPC555
Text: set in the TPUMCR3 register. This register cannot be accessed with a 32-bit read. It can only be accessed with an 8- or 16- bit read. 2. Some TPU registers can only be read or written with 16- or 32-bit , 32 S MSR S MSR Machine State Register. See Table 3-12 for bit descriptions SPR 1 U XER Integer Exception Register. See Table 3-10 for bit descriptions 32 U SPR 8 U LR Link Register. See 3.7.6 Link Register (LR) for bit descriptions. 32 U SPR 9


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PDF MPC555 MPC556 QADC64 MPC556 Map 6808 MAP 6810 motorola 6810 memory 6C46 6058 S INSTRUCTION SET motorola 6800 M/triac TB 137 600e QADC64
1998 - 32Kx16bit

Abstract: 00000x7 00000x4
Text: store a maximum of 42.67K words, and a 2-Mbit block that contains 32-bit data words can store a maximum , data storage memory is also provided through the external port. 32-bit memory words are used for , supplies 32-bit PM bus addresses for instruction fetches. The DAGs supply 32-bit addresses for data loads and stores. The two data address generators allow indirect addressing of data. DAG1 supplies 32-bit addresses over the DM bus. DAG2 supplies 32-bit addresses for PM bus data accesses. The two DAGs can


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PDF ADSP-21160 ADSP-21160, 48-bit 32-bit 32-bit 16-bit ADSP-21160s 32Kx16bit 00000x7 00000x4
Not Available

Abstract: No abstract text available
Text: Family TMS320F28020 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F280200 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F28021 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F28022 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F280220 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F28023 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F280230 Piccolo Microcontroller C2000™ 32-bit Real-time MCUs TMS320F28026 Piccolo


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PDF TMS320F28069 TMDXCNCD28069ISO TMDXCNCD28069ISO C2000 TMS320F28062 C2000â 32-bit TMS320F28063
2002 - Not Available

Abstract: No abstract text available
Text: Application Note 601 Accelerating 16/ 32-Bit Math Operations with the DS80C390 www.maxim-ic.com , applications doing intensive 16- bit math is the inclusion of dedicated hardware for 16/ 32-bit math acceleration , the MA, MB, and MC registers. The MA register allows transfer of 32-bit data to/from the accelerator , attempt Carry Bit Clear MA, MB, and MC 32-bit product 16- bit quotient 32-bit quotient 32-bit mantissa 32-bit , multiplicand 16- bit dividend 32-bit dividend 32-bit data 32-bit data 16- bit multiplier 16- bit divisor 40- bit


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PDF 16/32-Bit DS80C390 16-bit DS80C390 40MHz AN601 40Mhz
1994 - ds5 2502

Abstract: DS5 2502 MARK mc68150 motorola PD23-PD16
Text: MC68150/D DATA SHEET NOT RECOMMENDED FOR NEW DESIGNS 32Bit to 32/16/8Bit 32-Bit to 32/16/8- Bit , allow the 32-bit MC68/LC/EC040 bus, or other 16- to 32-bit processors, to communicate bi-directionally , used to separate a 32-bit "Fast Bus" and an 8-, 16-, or 32-bit "Slow Bus". (See Figure 3) Features , peripheral transfer acknowledge signals (DSACK1, DSACK0) and the peripheral data bus (PD31-PD16). If a 32-bit , of the processor. The transceivers are enabled only when making an access to a 32-bit port. The


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PDF MC68150/D 32Bit 32/16/8Bit 32-Bit 32/16/8-Bit MC68150 MC68/LC/EC040 68/EC040 ds5 2502 DS5 2502 MARK mc68150 motorola PD23-PD16
1995 - solar wind hybrid controller

Abstract: TMDXDOCKH52C1 32-BIT H52C1 C2000TM microcontroller docking station united states 2011 CONTROLSUITE F28M35E20C
Text: Devices (30) Name Concerto Microcontroller Product Family C2000TM 32-bit Real-time MCUs http , Microcontroller Concerto Microcontroller Concerto Microcontroller C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs C2000TM 32-bit Real-time MCUs


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PDF H52C1 TMDXDOCKH52C1 TMDXDOCKH52C1 C2000 com/tool/tmdxdockh52c1 solar wind hybrid controller 32-BIT C2000TM microcontroller docking station united states 2011 CONTROLSUITE F28M35E20C
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