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3125Gbps Datasheets Context Search

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2004 - PS5570

Abstract: MAX3803 MAX3803UBP-T
Text: 19-2699; Rev 1; 6/04 DC-Coupled, UCSP 3.125Gbps Equalizer The MAX3803 equalizer automatically , Description MAX3803 DC-Coupled, UCSP 3.125Gbps Equalizer ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC , 100 ps ps DC-Coupled, UCSP 3.125Gbps Equalizer (Typical values are at +3.3V and at TA = , Deterministic Jitter Output ( 3.125Gbps , CJTPAT) (Notes 2, 7) 0.09 0in, 6-mil FR4 UNITS Random , and C in Figure 1. Evaluated at 3.125Gbps with CJTPAT. Note 1: Note 2: Note 3: Note 4


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PDF 125Gbps MAX3803 160mW MAX3803 PS5570 MAX3803UBP-T
2001 - 30AWG

Abstract: MAX3981 MAX3981UGH 04 equalizer madison cable 30AWG
Text: 21-2178; Rev 0; 11/01 3.125Gbps XAUI Quad Cable Equalizer Features o Four Differential Digital Data "Lanes" at 3.125Gbps o Span 10m (33ft) of Twin-Axial Cable o Receiver Equalization Reduces , 3.3V Supply o Signal Detect Applications IEEE­802.3ae XAUI Interface ( 3.125Gbps ) Ordering , SWITCH CARD LINE CARD PMD Rx MAC Tx 4 Rx SWITCH 4 Tx IN 4 x 3.125Gbps , four "lanes" of digital NRZ data at a data rate of 3.125Gbps in one package. It is tailor-made for


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PDF 125Gbps 125Gbps 175mW 125Gbps) MAX3981UGH 10GbE MAX3981 30AWG MAX3981 MAX3981UGH 04 equalizer madison cable 30AWG
2003 - Not Available

Abstract: No abstract text available
Text: 21-2178; Rev 1; 5/03 3.125Gbps XAUI Quad Cable Equalizer General Description The MAX3981 quad , data rate of 3.125Gbps in one package. It is tailor-made for 10Gigabit Ethernet applications that , Digital Data "Lanes" at 3.125Gbps Span 10m (33ft) of Twin-Axial Cable Receiver Equalization Reduces , Supply Signal Detect MAX3981 Applications IEEE­802.3ae XAUI Interface ( 3.125Gbps ) InfiniBand , SWITCH CARD PMD MAC SWITCH Rx Tx 4 Rx Tx 4 x 3.125Gbps 4 IN MAX3981


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PDF 125Gbps MAX3981 10Gigabit IEEE-802 44-pin 700mW
2004 - MAX3980

Abstract: MAX3980UGH EQUALIZER
Text: 19-2153; Rev 1; 5/03 KIT ATION EVALU LE B AVAILA 3.125Gbps XAUI Quad Equalizer Features , digital NRZ data at a 3.125Gbps data rate in one package. It is tailor-made for 10-Gigabit Ethernet , 3.125Gbps o Spans 40in (1.0m) of FR4 PC Board o Receiver Equalization Reduces Intersymbol Interference , Signal Detect Applications Ordering Information IEEE-802.3ae XAUI Interface ( 3.125Gbps ) PART , IN 4 x 3.125Gbps +3.3V SUPPLY 4x 3.125Gbps 10GbE Tx Rx 4 Tx Rx 4 OUT


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PDF 125Gbps MAX3980 10-Gigabit 10GbE) IEEE-802 44-pin MAX3980UGH EQUALIZER
2003 - tensolite

Abstract: QFN 48L
Text: 21-2178; Rev 1; 5/03 3.125Gbps XAUI Quad Cable Equalizer The MAX3981 quad equalizer provides compensation for transmission medium losses for four "lanes" of digital NRZ data at a data rate of 3.125Gbps , 700mW at 3.3V or 175mW per channel. Features Four Differential Digital Data "Lanes" at 3.125Gbps , Applications Ordering Information IEEE­802.3ae XAUI Interface ( 3.125Gbps ) PART TEMP RANGE , MAC Tx 4 Rx SWITCH 4 Tx IN 4 x 3.125Gbps 3.3V SUPPLY 10GbE Tx Rx


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PDF 125Gbps MAX3981 10Gigabit IEEE-802 44-pin 700mW tensolite QFN 48L
2005 - equalizer diagram and function

Abstract: No abstract text available
Text: 19-2153; Rev 2; 1/05 KIT ATION EVALU BLE AVAILA 3.125Gbps XAUI Quad Equalizer Features , digital NRZ data at a 3.125Gbps data rate in one package. It is tailor-made for 10-Gigabit Ethernet , 3.125Gbps Spans 40in (1.0m) of FR4 PC Board Receiver Equalization Reduces Intersymbol Interference (ISI , Applications Ordering Information IEEE-802.3ae XAUI Interface ( 3.125Gbps ) TEMP RANGE PART , MAC SWITCH 40in (1.0m) Rx Tx 4 Rx 4 Tx IN 4 x 3.125Gbps +3.3V SUPPLY


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PDF 125Gbps MAX3980 10-Gigabit 10GbE) IEEE-802 44-pin equalizer diagram and function
2007 - PRBS7

Abstract: hdmi cable AN-1187 DS38EP100 6nc2
Text: Unequalized Signal (40in FR4, 3.125Gbps , PRBS7) www.national.com/jpn/ DS38EP100 - DS38EP100 - ( ) FIGURE 9. Equalized Signal (40in FR4, 3.125Gbps , PRBS7) FIGURE 12. Equalized Signal (40in FR4, 3.8Gbps, PRBS7) FIGURE 10. Equalized Signal (Zoom) (40in FR4, 3.125Gbps , , 5Gbps, PRBS7) FIGURE 20. Unequalized Signal (34in Tyco XAUI Backplane, 3.125Gbps , PRBS7) 11 , . Equalized Signal (34in Tyco XAUI Backplane, 3.125Gbps , PRBS7) FIGURE 24. Equalized Signal (5m 28AWG HDMI


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PDF DS38EP100 ds202065 8b/10b DS300292-03-JP DS38EP100 24AWG PRBS7 hdmi cable AN-1187 6nc2
2010 - DS25CP102

Abstract: DS25CP102TSQ
Text: DS25CP102 / 3.125Gbps 2 × 2 LVDS DS25CP102 FR-4 3.125Gbps 2 × 2 LVDS ( ) DC 3.125Gbps CML LVPECL DC , Semiconductor Corporation DS300080-04-JP 1 DS25CP102 / 3.125Gbps 2 × 2 LVDS 2009 3 , -4 3.125Gbps 2 × 2 LVDS TABLE 1. Switch Configuration Truth Table TABLE 2. Output Enable Truth , www.national.com/jpn/ DS25CP102 / 3.125Gbps 2 × 2 LVDS National Semiconductor


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PDF DS25CP102 125Gbps 125Gbps LLP-16 OC-48/STM-16 DS300080-04-JP DS25CP102 DS25CP102TSQ
2002 - 10G CDR

Abstract: IEE802
Text: 3.125Gbps x4 Parallel Transceiver Macro for XAUI (0.11µm) Transmitter Receiver n=3 . , 3.125Gbps 17 17 4 4:1 MUX RXVTT n=0 Transmitter Unit . TXOPn TXONn TMR , REF_CLK 156MHz v Features · 3.125Gbps x 4 channel unidirectional data transfer rate for 10G , (IEEE 802.3) 3.125Gbps x4 Parallel Transceiver v Description The Fujitsu's XAUI macro is for , °C. · Any backplane line for 3.125Gbps x4 data rate v Deliverables The Fujitsu value-added XAUI


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PDF 125Gbps 781MHz 125Gbp 16DEMUX 125Gbps ASIC-FS-20947-9/2002 10G CDR IEE802
2001 - OUT141

Abstract: Teradyne connector 1050 equalizer diagram and function
Text: 19-2153; Rev 0; 9/01 KIT ATION EVALU E L B A AVAIL 3.125Gbps XAUI Quad Equalizer General Description Features Four Differential Digital Data "Lanes" at 3.125Gbps Spans 40in (1.0m) of FR4 PC Board , compensation for transmission medium losses for four "lanes" of digital NRZ data at a 3.125Gbps data rate in , 175mW per channel. Applications IEEE-802.3ae XAUI Interface ( 3.125Gbps ) InfiniBand (2.5Gbps) PART , 40in (1.0m) Rx Tx 4 Rx Tx 4 x 3.125Gbps 10GbE 4x 3.125Gbps 4 4 +3.3V SUPPLY 4 IN OUT 4 Rx SWITCH SWITCH


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PDF 125Gbps 125Gbps 175mW MAX3980 MAX3980 10-Gigabit 10GbE) IEEE-802 OUT141 Teradyne connector 1050 equalizer diagram and function
2001 - Not Available

Abstract: No abstract text available
Text: 21-2178; Rev 0; 11/01 3.125Gbps XAUI Quad Cable Equalizer General Description The MAX3981 quad , data rate of 3.125Gbps in one package. It is tailor-made for 10Gigabit Ethernet applications that , Digital Data "Lanes" at 3.125Gbps Span 10m (33ft) of Twin-Axial Cable Receiver Equalization Reduces , Supply Signal Detect MAX3981 Applications IEEE­802.3ae XAUI Interface ( 3.125Gbps ) InfiniBand , SWITCH CARD PMD MAC SWITCH Rx Tx 4 Rx Tx 4 x 3.125Gbps 4 IN MAX3981


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PDF 125Gbps MAX3981 10Gigabit IEEE-802 44-pin 700mW
1999 - OC192

Abstract: rsc Encoder Rambus ASIC Cell
Text: Advance Information ® Quad 3.125Gbps Rambus SerDes Cell RAMBUS Overview The Rambus , RSC contains four transmit and four receive channels. Data rates of either 2.5Gbps or 3.125Gbps are , supports OC192 line card s 2.5Gpbs to 3.125Gbps data rate per channel s 250MHz to 312.5MHz , RX channel Document DL-00xx Version 0.1 Page 1 Quad 3.125Gbps Rambus SerDes Cell , 3.125Gbps Verification RXCLK - 90deg 312.5Mhz RXCLK RX-Channel Test Mode REF_CLK


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PDF 125Gbps 8B/10B 25Gbps 20Gbps 8B/10B 10Gbps OC192) DL-00xx, DL-00xx OC192 rsc Encoder Rambus ASIC Cell
2002 - Not Available

Abstract: No abstract text available
Text: Stratix GX.qxd 03.3.6 1:23 PM 1 Stratix GX 3.125Gbps October 2002 Stratix GX.qxd 03.3.7 4:16 PM 2 3.125Gbps Data Recovery Stratix GX DPA Stratix TM , .125Gbps 3.125Gbps 4 1 Stratix GX FPGA40 8B/10B 3.125Gbps Stratix GXI/O 8B/10B Stratix GX1.5V PCML DPADynamic Phase Alignment 1Gbps VOD 3.125Gbps2 Stratix GXStratix , - Stratix GX In Self-Test 3.125Gbps CDRClock Stratix GX 3.125Gbps 8B/10B10XAUI


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PDF 125Gbps 25Gbps GX622Mbps3 FPGA40 8B/10B
2008 - fr-4 dielectric constant 4.4

Abstract: Teradyne connector 1050 MAX3980 MAX3980UGH EQUALIZER
Text: 19-2153; Rev 3; 12/08 KIT ATION EVALU BLE AVAILA 3.125Gbps XAUI Quad Equalizer Features , digital NRZ data at a 3.125Gbps data rate in one package. It is tailor-made for 10-Gigabit Ethernet , 3.125Gbps Spans 40in (1.0m) of FR-4 PC Board Receiver Equalization Reduces Intersymbol Interference , -802.3ae XAUI Interface ( 3.125Gbps ) TEMP RANGE MAX3980UGH Applications 0°C to +85°C 44 TQFN-EP , BACKPLANE PMD MAC SWITCH 40in (1.0m) Rx Tx 4 Rx 4 Tx IN 4 x 3.125Gbps


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PDF 125Gbps MAX3980 10-Gigabit 10GbE) IEEE-802 44-pin fr-4 dielectric constant 4.4 Teradyne connector 1050 MAX3980UGH EQUALIZER
2008 - equalizer circuit diagram

Abstract: equalizer diagram and function IC ax 2008 circuit diagram 30AWG MAX3981 MAX3981UGH madison cable 30AWG twinaxial madison cable 28AWG
Text: 19-2178; Rev 2; 12/08 3.125Gbps XAUI Quad Cable Equalizer Features The MAX3981 quad , data rate of 3.125Gbps in one package. It is tailor-made for 10Gigabit Ethernet applications that , "Lanes" at 3.125Gbps Span 10m (33ft) of Twin-Axial Cable Receiver Equalization Reduces Intersymbol , Signal Detect Ordering Information PART IEEE­802.3ae XAUI Interface ( 3.125Gbps ) TEMP RANGE , LINE CARD PMD Rx MAC Tx 4 Rx SWITCH 4 Tx IN 4 x 3.125Gbps 3.3V


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PDF 125Gbps MAX3981 10Gigabit IEEE-802 44-pin 700mW equalizer circuit diagram equalizer diagram and function IC ax 2008 circuit diagram 30AWG MAX3981UGH madison cable 30AWG twinaxial madison cable 28AWG
2002 - PLL in RTL

Abstract: IEE802 10G CDR
Text: 3.125Gbps x4 Parallel Transceiver Macro for XAUI (0.18µm) Transmitter Receiver n=3 . , 3.125Gbps 17 17 4 4:1 MUX RXVTT n=0 Transmitter Unit . TXOPn TXONn TMR , REF_CLK 156MHz L Features · 3.125Gbps x 4 channel unidirectional data transfer rate for 10G , preemphasis · Pre-emphasis based Tx equalization allows up to 12dB high frequency loss 3.125Gbps x4 , , 3.3V±0.30V and junction temperature of -40°C~125°C. · Any backplane line for 3.125Gbps x4 data rate L


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PDF 125Gbps 781MHz 125Gbp 16DEMUX 125Gbps ASIC-FS-20921-3/2002 PLL in RTL IEE802 10G CDR
2007 - PCL-FR-370

Abstract: DS25BR100 DS25BR110 DS25BR120 DS25BR150 JESD22-A114C JESD-22-a114-c
Text: DS25BR100 ds201791 27120 20060111 DS25BR100 3.125Gbps LVDS / DS25BR100 / 3.125Gbps LVDS DS25BR100 FR-4 1 3.125Gbps LVDS DC 3.125Gbps ISI DS25BR100 (PE) (EQ , -4 20070405 © National Semiconductor Corporation DS201791-04-JP 1 DS25BR100 / 3.125Gbps LVDS , 135-0042 2-17-16 / TEL.(03)5639-7300 www.national.com/jpn/ DS25BR100 / 3.125Gbps


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PDF DS25BR100 ds201791 125Gbps 125Gbps PCL-FR-370 DS25BR100 DS25BR110 DS25BR120 DS25BR150 JESD22-A114C JESD-22-a114-c
2007 - DS25BR100

Abstract: DS25BR110 DS25BR120 DS25BR150
Text: DS25BR100 ds201791 27120 20060111 DS25BR100 3.125Gbps LVDS / DS25BR100 / 3.125Gbps LVDS DS25BR100 FR-4 1 3.125Gbps LVDS DC 3.125Gbps ISI DS25BR100 (PE) (EQ , -4 20070405 © National Semiconductor Corporation DS201791-04-JP 1 DS25BR100 / 3.125Gbps LVDS , 135-0042 2-17-16 / TEL.(03)5639-7300 www.national.com/jpn/ DS25BR100 / 3.125Gbps


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PDF DS25BR100 ds201791 125Gbps 125Gbps DS25BR100 DS25BR110 DS25BR120 DS25BR150
2003 - PS5570

Abstract: MAX3803 MAX3803UBP-T
Text: 19-2699; Rev 0; 2/03 DC-Coupled, UCSP 3.125Gbps Equalizer Features o DC-Coupled Input and , operates from 0°C to +85°C and consumes 160mW at +3.3V. MAX3803 DC-Coupled, UCSP 3.125Gbps Equalizer , mVP-P V 57.5 10 40 dB 100 ps ps DC-Coupled, UCSP 3.125Gbps , 3 UI 0.15 0in, 6-mil FR4 Residual Deterministic Jitter Output ( 3.125Gbps , CJTPAT , 3.125Gbps with CJTPAT. Note 1: Note 2: Note 3: Note 4


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PDF 125Gbps 28AWG MAX3803UBP-T MAX3803 PS5570 MAX3803 MAX3803UBP-T
2001 - MAX3980

Abstract: MAX3980UGH Teradyne EQUALIZER
Text: 19-2153; Rev 0; 9/01 KIT ATION EVALU ABLE AVAIL 3.125Gbps XAUI Quad Equalizer Features o Four Differential Digital Data "Lanes" at 3.125Gbps o Spans 40in (1.0m) of FR4 PC Board o , -802.3ae XAUI Interface ( 3.125Gbps ) PART InfiniBand (2.5Gbps) TEMP. RANGE MAX3980UGH PIN-PACKAGE , (1.0m) Rx Tx 4 Rx 4 Tx IN 4 x 3.125Gbps +3.3V SUPPLY 4x 3.125Gbps 10GbE , of digital NRZ data at a 3.125Gbps data rate in one package. It is tailor-made for 10


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PDF 125Gbps 125Gbps 175mW IEEE-802 125Gbps) MAX3980UGH MAX3980 MAX3980 MAX3980UGH Teradyne EQUALIZER
2001 - laser diode chip for 10GbE

Abstract: LXT34001 LXT37002 LXT37003 DFB laser drivers photodiode encoder 32pin 10Gbps Laser Driver avalanche photodiode 10Gbps
Text: product brief Intel® 3.125Gbps Physical Medium Dependent Chipset Intel® LXT37002 Vertical , , Intel has developed the 3.125Gbps Physical Medium Dependent chipset for optical networking, providing high-performance transmit and receive amplifiers in a low-cost/low-power CMOS process. The Intel® 3.125Gbps , , low-cost chipset. With performance up to 3.125Gbps , the Physical Medium Dependent components may be used , Up to 3.125Gbps operation · Single 3.3V power supply · Input sensitivity of better than 8mV ·


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PDF 125Gbps LXT37002 LXT37003 LXT34001 LXT33002 OC-48 125Gbies USA/0701/5K/MGS/DC laser diode chip for 10GbE DFB laser drivers photodiode encoder 32pin 10Gbps Laser Driver avalanche photodiode 10Gbps
2009 - JESD22-A114-C

Abstract: K28-5 JESD22-C101-C JESD22-A114C JESD22-C101C JESD-22-a114-c DS25BR150TSD DS25BR150 DS25BR120 DS25BR110
Text: DS25BR150 3.125Gbps LVDS DS25BR150 ds201791 27120 20070105 DS25BR150 1 3.125Gbps LVDS DC 3.125Gbps DS25BR150 / IO LVDS DS25BR110 4 DS25BR120 4 DS25BR100 , DS25BR150 3.125Gbps LVDS 2007 11 DS25BR150 NC 1 , Recommendations) DS25BR150 DS25BR150 3.125Gbps LVDS


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PDF DS25BR150 125Gbps ds201791 125Gbps DS25BR110 DS25BR120 JESD22-A114-C K28-5 JESD22-C101-C JESD22-A114C JESD22-C101C JESD-22-a114-c DS25BR150TSD DS25BR150 DS25BR120 DS25BR110
2002 - fujitsu lvds standard

Abstract: 125g56ghz
Text: 3.125Gbps Parallel CDR Transceiver (0.11µm) Process Technology Transmitter Receiver n , 1.56Gbps - 2.5Gbps to 3.125Gbps · Independent dual loop PLL based CDR on each Rx channel · Scalable , frequency loss 3.125Gbps Parallel CDR Transceiver (0.18µm) v Description Fujitsu's parallel , temperature of 0°C ~ 125°C. The 3.125Gbps Parallel Transceiver Macro is fabricated in Fujitsu's standard , backplanes and line card to switch fabric interface · Any backplane link for 2.5 ~ 3.125Gbps data rate v


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PDF 125Gbps 125Gbp 16DEMUX 781MHz 125Gbps ASIC-FS-20948-9/2002 fujitsu lvds standard 125g56ghz
2005 - 210144

Abstract: No abstract text available
Text: 19-2153; Rev 2; 1/05 KIT ATION EVALU E L B AVAILA 3.125Gbps XAUI Quad Equalizer General Description Features Four Differential Digital Data "Lanes" at 3.125Gbps Spans 40in (1.0m) of FR4 PC Board , compensation for transmission medium losses for four "lanes" of digital NRZ data at a 3.125Gbps data rate in , 175mW per channel. Applications IEEE-802.3ae XAUI Interface ( 3.125Gbps ) InfiniBand (2.5Gbps) PART , . Typical Application Circuit LINE CARD PC BOARD BACKPLANE PMD MAC 40in (1.0m) Rx Tx 4 Rx Tx 4 x 3.125Gbps


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PDF 125Gbps 125Gbps 175mW MAX3980 MAX3980 10-Gigabit 10GbE) IEEE-802 G4477-1* 210144
2002 - Not Available

Abstract: No abstract text available
Text: ® Stratix GX The Low-Risk Path to 3.125-Gbps Transceiver Applications October 2002 The Low-Risk Path to 3.125-Gbps Tranceiver Applications Today's high-speed applications need a reliable data , 's second-generation transceiver technology and provide a low-risk path to 3.125-Gbps transceiver applications. Stratix GX FPGAs integrate a highly optimized 3.125-Gbps transceiver that includes customer-defined , ) technology to receive and transmit high-speed serial data streams for easy-to-use access to 3.125-Gbps


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PDF 125-Gbps 125-Gbps 40-inch 8B/10B
Supplyframe Tracking Pixel