The Datasheet Archive

264-byte, Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - sram 2112

Abstract: 001H 106H NXSF014B-0699 SFAN-02
Text: ­ High-density, low-voltage & power, cost-effective ­ Small 264- byte sectors ­ 10K/100K write cycles, ten years data retention · On-chip Serial SRAM ­ Dual 264- byte Read/Write SRAM buffers ­ Use , byte-addressable. That is, each sector is individually addressable and each byte within a sector is individually addressable. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data can be read directly from a sector in the Flash


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PDF NX25F011A NX25F041A 264-byte 10K/100K NXSF014B-0699 sram 2112 001H 106H NXSF014B-0699 SFAN-02
1998 - sram 2112

Abstract: 001H 106H NXSF014B-0699
Text: ­ High-density, low-voltage & power, cost-effective ­ Small 264- byte sectors ­ 10K/100K write cycles, ten years data retention · On-chip Serial SRAM ­ Dual 264- byte Read/Write SRAM buffers ­ Use , sector is individually addressable and each byte within a sector is individually addressable. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte , ] 25F041 S[10:0] Sector 511 1FFH Sector 2047 7FFH Byte 0 000H Byte1 001H Byte 2-261


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PDF NX25F011A NX25F041A 264-byte 10K/100K NXSF014B-0699 sram 2112 001H 106H NXSF014B-0699
1998 - sram 2112

Abstract: TSOP 28 SPI memory Package flash 25F021 001H pb sram sf001
Text: Small 264- byte sectors ­ 10K/100K write cycles, ten years data retention · On-chip Serial SRAM ­ Dual 264- byte Read/Write SRAM buffers ­ Use in conjunction with or independent of Flash ­ Off-loads , byte within a sector is individually addressable. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data can be , ] 25F041 S[10:0] Sector 511 1FFH Sector 1023 3FFH Sector 2047 7FFH Byte 0 000H Byte1


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PDF IS25F011A IS25F021A IS25F041A 264-byte 10K/100K IS25F041A-5V-R sram 2112 TSOP 28 SPI memory Package flash 25F021 001H pb sram sf001
25F041

Abstract: 25F021 D61D5
Text: transistor EEPROM memory - High-density, low-voltage/power, cost-effective - Small 264- byte sectors - 10K , popular microcontrollers - Clock operation as fast as 16MHz On-chip Serial SRAM - Dual 264- byte read , :0] Sector 1023 3 FF h Sector 1022 3 FE h 25F041 Byte Address: B[8:0] S[10:0] Sector 2047 7FF h ByteO 000» Byte 0 000 h Byte 1 001 » Byte 1 001 » Byte 2 - 261 002» -1 0 5 » Byte 2 - 261 002» - 105» · · · Byte 262 106» Byte 262 106» Byte 263 107» Byte 263 107h Sector 2046 7FE


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PDF IS25F011A IS25F021A IS25F041A 264-byte 10K/100K 16MHz PK13197T28 25F041 25F021 D61D5
1998 - 25F041A

Abstract: NEXCOM
Text: , cost-effective - Small 264- byte sectors - 10K/100K write cycles, 10 years data retention n On-chip Serial SRAM - Dual 264- byte read/write SRAM buffers - Use in conjunction with or independent of Flash - , , each sector is individually addressable and each byte within a sector is individually addressable. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data can be read directly from a sector in the flash memory


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PDF IS25F011A IS25F021A IS25F041A 16MHz 264-byte 10K/100K 25F041A NEXCOM
Not Available

Abstract: No abstract text available
Text: , low-voltage/power, cost-effective - Small 264- byte sectors - 10K/100K write cycles, ten years data retention · On-chip Serial SRAM - Dual 264- byte Read/Write SRAM buffers - Use in conjunction with or , , and IS25F041A is byte-addressable. That is, each sector is individually addressable and each byte within a sector is individually addressable. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data can be read


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PDF IS25F011A IS25F021A IS25F041A 264-byte 10K/100K IS25F041A-3V-R IS25F041A-5V-R 28-pin,
Not Available

Abstract: No abstract text available
Text: /power, cost-effective - Small 264- byte sectors - 10K/100K write cycles, ten years data retention â , SRAM - Dual 264- byte Read/Write SRAM buffers - Use in conjunction with or independent of Flash - , and each byte within a sector is individually addressable. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data , 000H Sector 0 000H Byte Address: B[8:0] ii Byte 0 000H Bytel 001H Byte 2-261


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PDF IS25F011A IS25F021A IS25F041A 264-byte 10K/100K PK13197T28
1998 - 12-bytes

Abstract: SFAN-02 IS25F080A "IS26F041A" checksum algorithm CRC
Text: Figure 2. Device Information Sector (DIS) Format 4 SYNC: ( Byte 0) The first byte of the DIS is the Sync byte . Similar to the Tag/Sync bytes of the main array this location has a value of "C9H". The Sync byte can be used as a sync-detect to verify that the instruction sequence is clocked into the , as well. Immediately following the first Sync location are byte locations 1-43, which are reserved , given application. The field is 12-bytes long and starts at byte offset 44. The first byte of the


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PDF SFAN-02 SF009-1B 16-bit 12-bytes SFAN-02 IS25F080A "IS26F041A" checksum algorithm CRC
1998 - 001H

Abstract: NX25F011B NX25F021B NX25F041B NXSF016C-0600 CF15-CF9
Text: · 0.35µ NexFlash Memory Technology ­ 1M/2M/4M-bit with 512/1024/2048 sectors ­ Small 264- byte , Optional 8KB (32 sector) block erase for faster programming · On-chip Serial SRAM ­ Single 264- byte , is byte-addressable for read operations. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data can be read , S[10:0] Sector 511 1FFH Sector 1023 3FFH Sector 2047 7FFH Byte 0 000H Byte1 001H


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PDF NX25F011B NX25F021B NX25F041B 264-byte NX25F021B-3S* NX25F021B-5V* 28-pin, NX25F021B-5S* NX25F041B-3V* 001H NX25F011B NX25F021B NX25F041B NXSF016C-0600 CF15-CF9
2001 - NX25F021B-5V

Abstract: 001H NX25F011B NX25F021B NX25F041B NXSF016F-1201
Text: . · 0.35µ NexFlash Memory Technology ­ 1M/2M/4M-bit with 512/1024/2048 sectors ­ Small 264- byte , MHz · On-chip Serial SRAM ­ Single 264- byte Read/Write SRAM buffer ­ Use in conjunction with or , operations. This allows a single byte , or specified sequence of bytes, to be read without having to clock an entire 264- byte sector out of the device. Data can be read directly from a sector in the Flash , 64 Sector 2047 7FFH Byte 0 000H Byte1 001H Byte 2-261 002H-105H Byte 262 106H


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PDF NX25F011B, NX25F021B, NX25F041B NXSF016F-1201 NX25F011B NX25F021B NX25F021B-3S* NX25F021B-5V* 28-pin, NX25F021B-5V 001H NX25F011B NX25F021B NX25F041B NXSF016F-1201
2004 - toshiba nand tc58

Abstract: toshiba Nand flash toshiba Nand part numbering tc58 flash TOSHIBA TC58 cmos memory -NAND Toshiba NAND samsung tc58 NAND256-A TOSHIBA part numbering VFBGA63
Text: Byte / 264 Word Page) NAND Flash memory, to replace an equivalent Toshiba memory, in a application , , NAND256-A, NAND512-A, NAND01G-A, 528 Byte / 264 Word Page datasheet. INTRODUCTION The ST NAND Flash 528 Byte / 264 Word Page is a family of non-volatile Flash memories that uses NAND cell technology. The , . They are fully compatible with the Toshiba 528 Byte /264 Word Page family of NAND Flash memories and can be used to replace them in any application. Table 1. and Table 2., list the NAND 528 Byte /264


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PDF AN1839 NAND128-A, NAND256-A, NAND512-A, NAND01G-A, 128Mbits toshiba nand tc58 toshiba Nand flash toshiba Nand part numbering tc58 flash TOSHIBA TC58 cmos memory -NAND Toshiba NAND samsung tc58 NAND256-A TOSHIBA part numbering VFBGA63
2008 - AT45DB041D-SU

Abstract: AT45DB041D-SU 852 VDFN PA10 AT45DB041D JEP106 AT45DB041D-SSU-SL955 atmel 0810 AT45DB041D-SSU
Text: Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte Device Identifier , , as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily , required to designate a byte address within a buffer. Main memory addressing is referenced using the , page address and BA8 - BA0 denotes the 9 address bits required to designate a byte address within the , a byte address within a buffer. Main memory addressing is referenced using the terminology A18 - A0


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PDF 3595L AT45DB041D-SU AT45DB041D-SU 852 VDFN PA10 AT45DB041D JEP106 AT45DB041D-SSU-SL955 atmel 0810 AT45DB041D-SSU
CO2V

Abstract: No abstract text available
Text: : (256+8) Byte - Block Erase : (4K+128) Byte · M ulti-B lo ck Erase - Status R egister Features · A utom atic Program and Erase - Page Program : (256+8) Byte - Block Erase : (4K+128)B yte - Status R egister C urrent D escription G eneral D escription A program operation program s the 264- byte page In typically 300us (500us/250us)* and an erase operation can be perform ed In typically 6m s on e ither a 4K- byte block o r m ultiple block. New D escription G eneral D escription A program operation program s the 264- byte page in


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PDF SAMSF002 KM29N040T KM29V040T A18/19 528-byte 250us 32000T/R 32000T/R CO2V
2004 - MZ 251

Abstract: mz 73 b Super10 n014 xm 69 rb ST10 176E b3pp mz 251 circuit diagram MZ 197
Text: unpredictable value. In case of byte or word access always write "0" to these locations. These bits could be , for future enhancement. Reading these bits returns "0". In case of byte or word access always write , instruction to express different bit / byte / word fields in different addressing modes. Table 1 : Symbols , )SFR, bit-addressable memory space. Rb Specifies byte direct access to any GPR (RL0, RH0,.RH7 , Specifies word (or lower byte ) direct access to any GPR, (E)SFR. mem Specifies word or byte direct


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PDF Super10 Super10, Super10 SUP10IS MZ 251 mz 73 b n014 xm 69 rb ST10 176E b3pp mz 251 circuit diagram MZ 197
2012 - Not Available

Abstract: No abstract text available
Text: Lockdown for Secure Code and Data Storage – Individual Sector Security: 128- byte Security Register – 64- byte User Programmable Space – Unique 64- byte Device Identifier JEDEC Standard Manufacturer , continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled with a self-contained , the nine address bits required to designate a byte address within a buffer. Main memory addressing is , byte address within the page. For the “Power of 2” binary page size (256-bytes), the Buffer


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PDF 66MHz 256-Bytes 264-Bytes 256-Bytes 256-/264-Bytes/Page) 256-Bytes) 64-Kbytes) 264-Bytes)
2007 - Not Available

Abstract: No abstract text available
Text: Lockdown for Secure Code and Data Storage ­ Individual Sector Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte Device Identifier JEDEC Standard Manufacturer and Device ID , as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled , BEA8 - BFA0 to denote the 9 address bits required to designate a byte address within a buffer. Main , required to designate a byte address within the page. For the "Power of 2" binary page size (256 bytes


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PDF 3595I
2013 - Not Available

Abstract: No abstract text available
Text: Lockdown for Secure Code and Data Storage – Individual Sector Security: 128- byte Security Register – 64- byte User Programmable Space – Unique 64- byte Device Identifier JEDEC Standard Manufacturer , Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte , the terminology BEA8 - BFA0 to denote the nine address bits required to designate a byte address , the nine address bits required to designate a byte address within the page. For the “Power of 2â


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PDF 66MHz 256-Bytes 264-Bytes 256-Bytes 256-/264-Bytes/Page) 256-Bytes) 64-Kbytes) 264-Bytes)
2007 - AT45DB041D

Abstract: JEP106 PA10
Text: Code and Data Storage ­ Individual Sector Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte Device Identifier JEDEC Standard Manufacturer and Device ID Read 100,000 , Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte , / BYTE pin is always driven low, the SI pin should be a "no connect". ­ Input SO Serial , the falling edge of SCK. If the SER/ BYTE pin is always driven low, the SO pin should be a "no connect


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PDF 3595H AT45DB041D JEP106 PA10
2007 - AT45DB041D

Abstract: JEP106 PA10 AT45DB041D-SSU
Text: Code and Data Storage ­ Individual Sector Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte Device Identifier JEDEC Standard Manufacturer and Device ID Read 100,000 , Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte , the terminology BEA8 - BFA0 to denote the 9 address bits required to designate a byte address within , the 9 address bits required to designate a byte address within the page. For the "Power of 2" binary


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PDF 3595K AT45DB041D JEP106 PA10 AT45DB041D-SSU
2014 - Not Available

Abstract: No abstract text available
Text: Lockdown for Secure Code and Data Storage – Individual Sector Security: 128- byte Security Register – 64- byte User Programmable Space – Unique 64- byte Device Identifier JEDEC Standard Manufacturer , reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is , bits required to designate a byte address within a buffer. Main memory addressing is referenced using , designate a page address and BA8 - BA0 denotes the nine address bits required to designate a byte address


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PDF 66MHz 256-Bytes 264-Bytes 256-Bytes 256/264-Bytes/Page) 256-Bytes) 64-Kbytes) 256-/264-Bytes)
2009 - Not Available

Abstract: No abstract text available
Text: for Secure Code and Data Storage – Individual Sector Security: 128- byte Security Register – 64- byte User Programmable Space – Unique 64- byte Device Identifier JEDEC Standard Manufacturer and Device , emulation (bit or byte alterability) is easily handled with a self-contained three step read-modify-write , the terminology BEA8 - BFA0 to denote the 9 address bits required to designate a byte address within , the 9 address bits required to designate a byte address within the page. For the “Power of 2â


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PDF 3595Pâ
2009 - 8S2 8-Lead 0.208 EIAJ

Abstract: AT45DB041D-SSU
Text: Individual Sector Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte , (bit or byte alterability) is easily handled with a self-contained three step read-modify-write , bits required to designate a byte address within a buffer. Main memory addressing is referenced using , designate a page address and BA8 - BA0 denotes the 9 address bits required to designate a byte address , to designate a byte address within a buffer. Main memory addressing is referenced using the


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PDF 3595N 8S2 8-Lead 0.208 EIAJ AT45DB041D-SSU
2009 - AT45DB041D

Abstract: AT45DB041D-MUSL
Text: Individual Sector Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte , (bit or byte alterability) is easily handled with a self-contained three step read-modify-write , bits required to designate a byte address within a buffer. Main memory addressing is referenced using , designate a page address and BA8 - BA0 denotes the 9 address bits required to designate a byte address , to designate a byte address within a buffer. Main memory addressing is referenced using the


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PDF 3595O AT45DB041D AT45DB041D-MUSL
2009 - AT45DB041D

Abstract: JEP106 PA10 AT45DB041D-SSU
Text: Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte Device Identifier , , as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily , required to designate a byte address within a buffer. Main memory addressing is referenced using the , page address and BA8 - BA0 denotes the 9 address bits required to designate a byte address within the , a byte address within a buffer. Main memory addressing is referenced using the terminology A18 - A0


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PDF 3595P AT45DB041D JEP106 PA10 AT45DB041D-SSU
2007 - AT45DB081D

Abstract: JEP106 PA10 PA11
Text: Code and Data Storage ­ Individual Sector Security: 128- byte Security Register ­ 64- byte User Programmable Space ­ Unique 64- byte Device Identifier JEDEC Standard Manufacturer and Device ID Read 100,000 , Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte , datasheet using the terminology BFA8 - BFA0 to denote the 9 address bits required to designate a byte , denotes the 9 address bits required to designate a byte address within the page. For "Power of 2" binary


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PDF 3596F AT45DB081D JEP106 PA10 PA11
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