The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LT1018MJ8/883 Linear Technology LT1018 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military
LT1017MJ8/883 Linear Technology LT1017 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military
LM108AJ8 Linear Technology LM108A - Operational Amplifiers; Package: CERDIP; Pins: 8; Temperature: Military
LT1175CDWF#MILDWF Linear Technology LT1175 - 500mA Negative Low Dropout Micropower Regulator; Pins: 5
LTC1041MJ8/883 Linear Technology LTC1041 - BANG-BANG Controller; Package: CERDIP; Pins: 8; Temperature: Military
LTC2904CDDB#TR Linear Technology LTC2904 - Precision Dual Supply Monitor with Pin-Selectable Thresholds; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C

20B-pin Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
LMX2330

Abstract:
Text: products. There is also the trigger pin , which can be used to trigger the oscilloscope, if one wants to observe the bits being sent to the part. The numbers for the port setup correlate to the specific pin on , cable with a 10- pin header. The relationship between each of these is given in the table below , Application Information Code Loader Operation (version 2.0b) DB25 Bit Position DB25 Connector Pin D0 D1 D2 D3 D4 D5 D6 D7 D8 Not Used N/A 2 3 4 5 6 7 8 9 1 Not Used 18 10- Pin


Original
PDF
VDE 0570/EN 61558

Abstract:
Text: Layout 20B Layout 20A Pin Anschluß Pin blind Kein Pin 8 Connected No Connected No Pin , 0061818 0062424 PIN Sekundär 2 Secundary 2 Rated mA 63 42 28 21 17 14 10 20A 20A


Original
PDF D78609 VDE 0570/EN 61558
FAR-D6

Abstract:
Text: 11 4 12 3 2 1 4-R 0.2 Pin 1 Index 1.5 (1.7max) 5.0 +/- 0.2 12-R 0.2 Side View Top View Bottom View Unit : mm Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Pin name GND GND GND GND Rx GND GND ANT GND GND Tx GND Description Ground Pin Ground Pin Ground Pin Ground Pin Receiver Pin Ground Pin Ground Pin Antenna Pin Ground Pin Ground Pin Transmitter Pin Ground Pin Figure 1 Dimensions and Pin assignment FUJITSU MEDIA DEVICES LIMITED


Original
PDF FAR-D6CZ-1G9600-D1XC 29dBm 50000h FAR-D6 FAR-D6CZ-1G9600-D1XC
2000 - sl 6699

Abstract:
Text: /T5 S4/T4 S3/T3 S2/T2 S1/T1 S0/T0 Pin Assignment Package Dimension (unit : mm) LC866448B/44B , /12B/08B Pin description Pin name VSS1,2 VDD1,2 VP PORT0 P00 to P07 I/O I/O Power pin (+) *1 Function description Power pin (-) Short-circuit VSS1 to VSS2. Refer to Notes Power pin (+) for the VFD , ·Input/output can be specified in a bit unit ·Other pin functions P10 SIO0 data output P11 SIO0 data , pin functions P70 : INT0 input/HOLD release/N-channel Tr. output for watchdog timer P71 : INT1 input


Original
PDF /44B/40B/36B/32B/28B/24B/20B/16B/12B/08B /44B/40B/36B/32B/28B/24B/20B/16B/12B/08B /44B/40B/36B/32B/28B/24B/20B/16B/12B/08B) 16-bit 16bit, 14-source 10-vectored sl 6699
2003 - d1g1

Abstract:
Text: .26.2003 Preliminary Reference No. Dimensions and Pin assignment SIDE VIEW BOTTOM VIEW 0.65/-0.15 TOP , 11 12 0.65+/-0.15 3 Pin 1 Index 1.3+/-0.15 1.27 Rx 10 4 Tx 6 4-R0.2 2 1 5.05+/-0.1 1.5 (1.7 Max.) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Pin name , Ground Pin Ground Pin Ground Pin Ground Pin Receiver Pin Ground Pin Ground Pin Antenna Pin Ground Pin Ground Pin Transmitter Pin Ground Pin THE POSSIBILITIES ARE INFINITE FUJITSU MEDIA


Original
PDF FAR-D5CM-881M50-D1G1 824-849MHz 779-804MHz 869-894MHz 1648-1698MHz d1g1
2003 - FAR-D5CM-881M50-D1G1

Abstract:
Text: .26.2003 Reference No. Dimensions and Pin assignment SIDE VIEW BOTTOM VIEW 0.65/-0.15 TOP VIEW ANT 0.6 , +/-0.15 3 Pin 1 Index 1.3+/-0.15 1.27 Rx 10 4 Tx 6 4-R0.2 2 1 5.05+/-0.1 1.5 (1.7 Max.) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Pin name GND GND GND GND Rx GND GND ANT GND GND Tx GND ALL DIMENSIONS IN mm Description Ground Pin Ground Pin Ground Pin Ground Pin Receiver Pin Ground Pin Ground Pin Antenna Pin Ground Pin Ground Pin


Original
PDF FAR-D5CM-881M50-D1G1 824-849MHz 779-804MHz 869-894MHz 1648-1698MHz 2472-25AR-D5CM-881M50-D1G1 FAR-D5CM-881M50-D1G1
PAL 011a

Abstract:
Text: – Flexibility of logic structure ■Package Type: 20- pin 300 mil Plastic DIP (one-shot) 20- pin 300 mil , Delay Time: 55ns (max): Series 20 A 35ns (max): Series 20 B ■Each pin has programmable output , RP - Electronically Programmable Logic - Input Pin Count - Registered Output Polarity* P = Programmable Polarity - Output Pin Count - Programming Voltage A = 55ns (21V), B = 35ns (13.5V) ■Package , -o- (Default Path)' H> Output Pin Group II I/O Block Diagram Product Term Input or Feedback


OCR Scan
PDF 16RP8 16RP6, 16RP4) 16RP6 16RP4 20-Pin PAL 011a PAL VIHH programming pulse 16P2 EPL10P8
sl 6699

Abstract:
Text: /36B/32B/28B/24B/20B/16B/12B/08B Pin Assignment QIP80E P00 P01 P02 P03 P04 P05 P06 P07 , .6699-6/21 LC866448B/44B/40B/36B/32B/28B/24B/20B/16B/12B/08B Pin description Pin name VSS1,2 I/O - Function description Option Power pin (-) Short-circuit VSS1 to VSS2. - VDD1,2 - Power pin (+) *1 VP - Power pin (+) for the VFD output pull-down resistor Refer to Notes , unit ·Other pin functions P10 SIO0 data output P11 SIO0 data input/bus input/output P12 SIO0 clock


Original
PDF /44B/40B/36B/32B/28B/24B/20B/16B/12B/08B /44B/40B/36B/32B/28B/24B/20B/16B/12B/08B /44B/40B/36B/32B/28B/24B/20B/16B/12B/08B) 16-bit 16bit, 14-source sl 6699 LC866444B LC866440B LC866436B LC866432B LC866428B LC866424B LC866420B LC866416B LC866412B
SPITZNAGEL D 78609 003

Abstract:
Text: Layout 20B Layout 20A Pin Anschluß Pin blind Kein Pin 8 Connected No Connected No Pin , 0031818 0032424 PIN Sekundär 2 Secundary 2 No Load Volt Rated mA Rated Volt No Load


Original
PDF D78609 SPITZNAGEL D 78609 003 TRAFO SPK D 78609 D-78609 VDE 0570/EN 61558 Trafo SPITZNAGEL D 78609 spitznagel 78609 trafo spk 003 spitznagel 78609 trafo spk
PAL 011a

Abstract:
Text: of logic structure ■Package Type: 20- pin 300 mil Plastic DIP (one-shot) 20- pin 300 mil Ceramic DIP , : 55ns (max): Sériés 20 A 35ns (max): Sériés 20 B ■Each pin has programmable output polarity â , Input Pin Count - Registered Output Polarity* P = Programmable Polarity - Output Pin Court - Programming , -vfv—- 5V Registered Output Combinatoria! Output ( Pin 11) Output tsu ~ - twH - 1.5V tH»- _ 3 ۓK tCLK , Term : 'Status at Delivery (Default Patti)* By-Pass O OR =E> XOR -ix- (Default Path)* H> Output Pin


OCR Scan
PDF 16RP8 16RP6, 16RP4) 16RP6 16RP4 16RP4 20-Pin PAL 011a 16P2 PAL VIHH programming pulse
PAL 011a

Abstract:
Text: protection - Flexibility of logic structure - Package Type: 20- pin 300 mil Plastic DIP (one-shot) 20- pin 300 , – Propagation Delay Time: 55ns (max): Series 20 A 35ns (max): Series 20 B ■Each pin has programmable output , array Part Numbering System EPL 16 RP - Electronically Programmable Logic ■Input Pin Count - Registered Output Polarity* P = Programmable Polarity - Output Pin Count - Programming Voltage A = 55ns (21V , Output Combinatorial " Output ( Pin 11) Output tsu ■- tpD - twM - twL - _yf~ 1.5V "V 1.5V tcLK- 1.5V x


OCR Scan
PDF 16RP8, 16RP6, 16RP4) 16RP8 16RP6 16RP4 16RP4 20-Pin PAL 011a Ricoh Electronics
200-Ohm

Abstract:
Text: Pin Configuration Pin No. 1 2 3 4 5 Symbol IN GND OUT OUT GND Function Unbalanced pin Ground Balanced pin Balanced pin Ground Test Condition 3 Balanced Output 1 Unbalanced Input (50ohm) (200ohm) 2,5 4 1 ~ 5 : Pin No. GND Pb MSL1 Pb-free * Pb Free


Original
PDF GSM850-Rx 50/200ohm) FAR-F5KB-881M50-B4EJ 200-Ohm
Not Available

Abstract:
Text: 0.325 0.25 0.25 0.25 0.25 0.25 <2> IN X DE <3> <3> <2> Unit: mm Pin Configuration Pin No. Symbol Function 1 2 3 4 5 IN GND OUT OUT GND Unbalanced pin Ground Balanced pin Balanced pin Ground Evaluation Circuit Port3 3 Balanced Output (50ohm) (100ohm) Port1 Unbalanced Input (50ohm) 1 2, 5 4 Port2 GND 1 ~ 5 : Pin No. Pb


Original
PDF 50/100ohms) FAR-F5KB-859M00-B4EE
Not Available

Abstract:
Text: Pin Configuration Pin No. 1 2 3 4 5 Symbol IN GND OUT OUT GND Function Unbalanced pin Ground Balanced pin Balanced pin Ground Test Condition 3 Balanced Output 1 Unbalanced Input (50ohm) (200ohm) 2,5 4 1 ~ 5 : Pin No. GND Pb MSL1 Pb-free * Pb Free


Original
PDF GSM850-Rx 50/200ohm) FAR-F5KB-881M50-B4EJ
2006 - Not Available

Abstract:
Text: 1.0typ. x 0.5max index Unit : mm Pin Configuration Pin No. 1 2 3 4 5 Symbol IN GND OUT OUT GND Function Unbalanced pin Ground Balanced pin Balanced pin Ground Test Condition 3 Balanced 1 Output (200ohm) Unbalanced Input (50ohm) 2,5 4 1 ~ 5 : Pin No. GND


Original
PDF GSM850-Rx 50/200ohm) FAR-F5KB-881M50-B4EJ
Not Available

Abstract:
Text: 0.5max. Unit: mm Pin Configuration Pin No. Symbol Function 1 2 3 4 5 IN GND GND OUT GND Unbalanced pin Ground Ground Unbalanced pin Ground Evaluation Circuit Unbalanced Input (50ohm) 1 4 2,3,5 GND Unbalanced Output (50ohm) 1 ~ 5 : Pin No. Pb MSL1


Original
PDF FAR-F6QA-1G5754-H2JC
ASTEC 024l

Abstract:
Text: 048L7046L) -Vin (Case GND 024L/012L) No pin Enable No pin O utput 1 COM Trim E N S IG N S 1. 2. 3. 4. 5. 6. 7. 8. +Vin (Case GND 048LV046L) -Vin (Case GND 024L) No pin Enable O utput 1 COM O utput 2


OCR Scan
PDF 20BSenes 048LV046L) ASTEC 024l
2010 - Not Available

Abstract:
Text: Dimensions Device size: 1.4typ. x 1.0typ. x 0.5max. Unit : mm Pin Configuration Pin No. 1 2 3 4 5 Pin name IN GND GND OUT GND Description Unbalanced pin Ground Ground Unbalanced pin , =18nH (50ohm) 1 ~ 5 : Pin No. MSL1 *Pb Free part Customer Name Standard specifications System


Original
PDF FAR-F6KA-1G5859-D4MS
881-1 nec

Abstract:
Text: Power Gain 1.6 2.3 dB dB 8 12 9 9 10 11 Pout Output Power at Pin = 35, Pin = 33 1.6 2.3 dBm dBm 41 , 13 11 12 Pout Output Power at Pin = +27, Pin = +31 Pin = +29 Pin = +34 1.6 1.6 2.3 2.3 dBm dBm dBm , for -10B, 4A tor -20B O) Rg = 100 O for -10B, 50 Q for -20B . Pout - Pin „„_ 4. tiadd = —-;- , Input Power, Pin (dBm) E 03 13 O £ OJ 3 o o. S- 3 O NE345L-20B OUTPUT POWER AND POWER ADDED , , Pin (dBm) TYPICAL LARGE SIGNAL INPUT/OUTPUT IMPEDANCES (vos = iov) PART NUMBER f = 1.6 GHz f = 2.3


OCR Scan
PDF b4S7414 G001S37 NE345 NE3451600 ofSiOz/SiNs72 S22-S21S12 NE345100 NE3451600 881-1 nec NES1417-20B NE345L-20B sit 16250 cd 17821 LA 7687 a NES1417-10B NE72084 NE345L-10B TS990
FillFactory

Abstract:
Text: .18 8 PIN CONFIGURATION FOR FUGA1000 , register permanently to zero. The S&H is now controlled by pin SHY: 0 = track; 1 = hold. The S&H operation normally requires a short 1-0-1 pulse on SHY. 3. Register control. The validity of the signal in pin SHY is further controlled by a register enable E_SHY. The internal value of SHY is read from pin SHY , incremented by pulsing (1-0-1) the INCR_X. The INCR_X pin is tied to the ADC_CLOCK, so as to auto-increment X


Original
PDF Fuga1000 Fuga1000 FillFactory robot forklift nba1 FUGA1000-M-2 FillFactory cmos sensor BG39 FUGA1000-C1-1 digital color sensor FUGA1000-M-1
1998 - LC864116

Abstract:
Text: Watch Dog dog Timer timer Watch No. 5549-5/20 LC864132B/28B/24B/20B/16B/12B Pin Assignment P10 , PWM0 BL B G R Top veiw No. 5549-6/20 LC864132B/28B/24B/20B/16B/12B Pin Description · Port option can be specified in bit units except the pull-up resistor selection of port 0. Pin Description Table Pin name DVSS CF1 CF2 DVDD RES LC1 LC2 FILT AVDD AVSS CVIN VS HS I R G B BL PWM0 to PWM9 Port 0 P00 to P07 Pin No. 9 10 11 12 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 to 40 I/O - Input Output


Original
PDF LC864132B/28B/24B/20B/16B/12B LC864132B/28B/24B/20B/16B/12B 16-bit 12-source 10-vectored LC864116 lc864132b
Not Available

Abstract:
Text: 'S proprietary MxCMOS 1.2 micron process. · Quadrature outputs · · Completely differential signal path 16 pin DIP and SOL Block Diagram Pin Assignment S INS BQ1 BQ2 BQ3 3 OUT DI FF VSS1 [ OUT NORM 1 16 , -20B Pin Descriptions NAME IN+ INOUT NORM+ OUT NORMOUT DIFF+ OUT DIFFSCLK SDI SLOAD Filter positive , . During read back, 8-bits of data are shifted out the SDO pin on the falling edge of SCLK. SDO should be


OCR Scan
PDF IMP42C455-20B IMP42C455-20B 20MHz 42C455-20B DP8491/2.
PAL 011a

Abstract:
Text: protection ■Flexibility of logic structure ■Package Type: 20- pin 300 mil Plastic DIP (one-shot) 20- pin , – Propagation Delay Time: 55ns (max): Series 20 A 35ns (max): Series 20 B ■Each pin has programmable output , Programmable Logic - Input Pin Count ■Registered Output Polarity* P = Programmable Polarity ■Output Pin Count ■Programming Voltage A = 55ns (21V), B = 35ns (13.5V) ■Package Type D = Ceramic , Output ( Pin 11) Output tsu ~ - twM - •tHi tCLK- twL - \ 1.5 V 1.5V 1.5V ) * U-tro -


OCR Scan
PDF 16RP8 16RP6, 16RP4) 16RP6 16RP4 20-Pin PAL 011a fuse 20A 4V cupl PAL VIHH programming pulse 16P2 16R4* MMI EPL10P8 FT460 pal16h8
LC864132B

Abstract:
Text: /20B/16B/12B Pin Assignment PIO/SOO [ 1 -1 52 ] P0 7 P11/SI0/SB0 [ 2 51 ] P0 6 P12/SCK0 [ 3 50 ] P0 , Top veiw PS No. 5549-6/20 LC864132B/28B/24B/20B/16B/12B Pin Description • Port option can be specified in bit units except the pull-up resistor selection of port 0. Pin Description Table Pin name Pin , LC864132B/28B/24B/20B/16B/12B Continued from preceding page. Pin name Pin No. I/O Function Description , transistor output • At each pin -2 mA Ioph(2) Ports 0, 1 • CMOS output • At each pin -4


OCR Scan
PDF LC864132B/28B/24B/20B/16B/12B 16-bit 12-source 10-vectored LC864132B/28B/24B/20B/16B/12B LC864132B EVA86000 LC864112B LC864116B LC864120B LC864124B LC864128B
2025

Abstract:
Text: 1.0typ. x 0.5max. index Unit : mm Pin Configuration Pin No. Symbol Function 1 2 3 4 5 IN GND GND OUT GND Unbalanced pin Ground Ground Unbalanced pin Ground 1 4


Original
PDF FAR-F6KA-2G0175-D4DR 2010-2025MHz) 2025
Supplyframe Tracking Pixel