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Part Manufacturer Description Datasheet Download Buy Part
SMJ44400-80HMM Texas Instruments 1MX4 FAST PAGE DRAM, 80ns, CDSO20, 0.400 INCH, CERAMIC, SOLCC-26/20
TMS44400-70SD Texas Instruments 1MX4 FAST PAGE DRAM, 70ns, PZIP20, PLASTIC, ZIP-20
TMS44400P-80DGA Texas Instruments 1MX4 FAST PAGE DRAM, 80ns, PDSO20, PLASTIC, TSOP-26/20
TMS44409-60DGA Texas Instruments 1MX4 EDO DRAM, 60ns, PDSO20, PLASTIC, SOP-26/20
TMS44400P-60SD Texas Instruments 1MX4 FAST PAGE DRAM, 60ns, PZIP20, PLASTIC, ZIP-20
TMS44400PDGA-70 Texas Instruments 1MX4 FAST PAGE DRAM, 70ns, PDSO20, PLASTIC, TSOP-26/20
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1MX4ARAM
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2V048

Abstract: DSP Group Digital ECHO microphone mixing circuit DSPG ec54 1mx4 aram
Text: minutes of recording time per each 4 Mbit ARAM (Audio grade DRAM) Flexible storage of incoming messages , SPEAKERPHONE) OPTIONAL SYSTEM COMPONENTS D0000-35B/C 4-Mbit ARAM Message Memory (SOJ)—Up to four devices per system OR D0000-36B/C 16-Mbit ARAM Message Memory (SOJ)—Up to two devices per system EPROM/ROM—Voice , ) drmwr 35 O ARAM WRITE (active low) CASO 29 O ARAM CAS (0 for first ARAM , 1 for second ARAM , etc.) CASI 30 O CAS2 33 O CAS3 34 O RAS 28 O ARAM RAS DR0 27 I Serial input for CODECO PCM data DX0 25 o


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PDF D6385A theD6385A 0DD473 2V048 DSP Group Digital ECHO microphone mixing circuit DSPG ec54 1mx4 aram
1mx4 aram

Abstract: IC A 3120 casira Implementation Acoustic Echo Canceler DSP GROUP D6385A-11 D6385A Digital ECHO microphone mixing circuit d638 DSPG
Text: digital speech compression 14-15 minutes of recording time per each 4 Mbit ARAM (Audio grade DRAM , )—1 each (2 for DIGITAL SPEAKERPHONE) OPTIONAL SYSTEM COMPONENTS D0000-35B/C 4-Mbit ARAM Message Memory (SOJ)—Up to four devices per system OR D0000-36B/C 16-Mbit ARAM Message Memory (SOJ)—Up to , Voice prompt ROM/EPROM read (active low) drmwr 35 O ARAM WRITE (active low) CASO 29 O ARAM CAS (0 for first ARAM , 1 for second ARAM , etc.) CASI 30 O CAS2 33 O CAS3 34 O RAS 28 O ARAM RAS DR0 27 I


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PDF D6385A D6385A theD6385A 0DD473 1mx4 aram IC A 3120 casira Implementation Acoustic Echo Canceler DSP GROUP D6385A-11 Digital ECHO microphone mixing circuit d638 DSPG
Not Available

Abstract: No abstract text available
Text: CASO RASO WE Data 1MX4 t . 1MX4 f t 1MX4 1MX4 1 ÔË 1 r: WE 1MX4 ' r 44 PLCC 1 z z 1MX4 ByteO -DQO -DQ1 -DQ2 -DQ3 -D Q 4 -D Q 5 -D Q 6 -D Q 7 -PQ 8 CAS1 Data 1MX4 .r 1MX4 ~ r r 1M X 4 RAS3 1MX4 ÔË -y ~ t— WE 1M X 4 44 P L C C ~r~t — 1MX4 Byte 1 CAS2 RAS2 Data 1MX4 t ♦ 1MX4 -.t. t 1MX4 1MX4 ♦ t— ÔË WE 1MX4 T -DQ9 -DQ10 -DQ11 -DQ12 -DQ13 ■DQ14


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PDF IBM11D2480B IBM11E2480B 72-Pin 130ns 0L14b 50H4174
1997 - DRAM 256kx4

Abstract: KM29N32000 KM29N040 dram 4mx4
Text: ) Bank 1 (D4-D7) Comment 1 ARAM /DRAM 256kx4 - 2 ARAM /DRAM 256kx4 256kx4 4 ARAM /DRAM 1Mx4 - 4 ARAM /DRAM 8 ARAM /DRAM 1Mx4 1Mx4 16 ARAM /DRAM 4Mx4 - 16 ARAM /DRAM 32 ARAM /DRAM 32 ARAM /DRAM 64 ARAM /DRAM 64 ARAM /DRAM 128 ARAM /DRAM 4-128 FLASH 512kx8 devices 8-128 FLASH 1Mx8 devices KM29W8000 , Refresh Mode 0: normal 1: battery backup MQ Memory Quality 0: ARAM 1: DRAM MT Memory Type


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PDF T4860-XV21-L1-7600 DRAM 256kx4 KM29N32000 KM29N040 dram 4mx4
1997 - D6305B

Abstract: D6455B D0000-29
Text: Host Controller D6455A/B DSP Speech Processor Voice Prompt ROM ARAM Optional Figure 1 , with 256Kx4 (1 Mbit)*, 1Mx4 (4 Mbit) or 4Mx4 (16 Mbit)* ARAMs n True FULL Duplex SpeakerPhone with , )1 each, 2 for SpeakerPhone One of the following: n D0000-37C 1-Mbit ARAM Message Memory (SOJ)Up to four devices per system (D6455B only) n D0000-36C 16-Mbit ARAM Message Memory (SOJ)Up to two devices per system (D6455B only), or n D0000-35C 4-Mbit ARAM Message Memory (SOJ)Up to four devices per


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PDF D6455A/B D6455A/B D6455A, PO-1/96 D6305B D6455B D0000-29
DM2202

Abstract: No abstract text available
Text: -10 1Mx4 EDRAM DM2212J-10 1Mx4 EDRAM rates of up to 100MHz without interleaving. The 10ns EDRAM , -10 1Mx4 Multibank EDO EDRAM DM2252J-10 1Mx4 Multibank EDO EDRAM DM1M32SJ6-10 1Mx32 Multibank , from (6) Access P aram eter Applies When /CAL Has Not Been Asserted P rior to tj^ Q (7) For


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PDF 100MHz DM2202
PMB 3330

Abstract: block diagram of answering machine PMB 27251 DECT siemens PSB uart
Text: progress or alert tones. Messages and user data can be stored in ARAM /DRAM or flash memory which can be , ARAM /DRAM) are operational. The PSB 4860 supports interface pins to +5 V levels. Semiconductor Group , compression rate (3.3, 5.6 or 10.3 kbit/s) Variable playback speed Support for ARAM or Flash Memory Optional , four serial flash devices supported (Toshiba, Atmel) Support for x1 ARAM /DRAM New command for easier , serial control interface. Interrupt New status available. ARAM , DRAM: Column address strobes. Samsung


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PDF PSB4860 P-MQFP-80 PMB 3330 block diagram of answering machine PMB 27251 DECT siemens PSB uart
1997 - PMB 3330

Abstract: PMB 27251 4MX1 aram smd code book z1 1mx4 aram MA15 MA13 MA12 PSB 2147 F DRAM 256kx4
Text: 256kx4 - 2 ARAM /DRAM 256kx4 256kx4 4 ARAM /DRAM 1Mx4 - 4 ARAM /DRAM 4Mx1 - 4 ARAM /DRAM 8 ARAM /DRAM 1Mx4 1Mx4 16 ARAM /DRAM 4Mx4 - 2k or , generation and call progress tone detection. Messages and user data can be stored in ARAM /DRAM or flash , where only the real time clock and the memory refresh (in case of ARAM /DRAM) are operational. The PSB , playback speed Support for ARAM or Flash Memory Optional voice prompt EPROM DTMF generation and


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PDF MA0-MA11 MA0-MA11 P-MQFP-80 PMB 3330 PMB 27251 4MX1 aram smd code book z1 1mx4 aram MA15 MA13 MA12 PSB 2147 F DRAM 256kx4
IBM 1Mx4

Abstract: 1MX16
Text: C-424000LAB72 HB56W 172E 05H0901 . Based DRAM 1 Mx4 1MX16 1Mx4 or 1Mx16 1Mx4 1 Mx4 1Mx16 1Mx4 & 1M X40CAS 1Mx16 & 1MX4QCAS 1Mx4 & 1M x4QCAS 1Mx4 1Mx4 1 Mx16 & 1Mx4 1Mx4 1Mx4 1Mx4 1Mx4 1Mx16 2Mx8 1Mx16 , -42S4000LAC32S 1Mx4 1Mx4 1Mx4 1Mx4 1Mx4 1Mx16 1Mx16 512Kx8 1Mx4 1 Mx4 1Mx16 2M x8 2Mx8 1Mx16 1Mx16 4M x4 4M x4 4M x4


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PDF 1Mx64 364C120C KMM364C124A C-421000AA64 HB56A164EJ 364V120C 364V124A 372C122C 372C125A 05H0902 IBM 1Mx4 1MX16
Not Available

Abstract: No abstract text available
Text: in 16, 32 and 64 bit applications. It is manufactured with six teen 1Mx4 devices, each in a 300mil , version, manufactured with eight 1Mx4 devices. The IBM 72-Pin SIMMs provide a high performance, flexible 4 , Absolute Maximum Ratings Symbol V cc V|N VoU T T opr T st g P aram eter P ow er Supply Voltage I Input , |L | ; S upply V oltage I Input High V oltage j Input Low Voltage P aram eter (TA = o to 7 o ° c , |3 (t a = o to +70°c, v cc = s.o v ± o.sv) P aram eter 1M x 32 M ax 60 35 35 67 2M x 32 M


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PDF 72-Pin 104ns 124ns T00bl4b D003b37 IBM11D2325B IBM11D1325B DDD3b30
64G2

Abstract: AU 1024 AX4640
Text: manufactured with 8 1Mx4 devices - each in either a 350mil or 300mil package, and 1 1Mx4 `Quad CAS' device for , tim ing p aram eter is not app lica ble to this product, but applies to a related product in this , . Refresh Cycle -6 0 -7 0 S ym bol P aram eter M in Max - M in 15 Units M ax - ns Notes I


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PDF IBM11D1360EA IBM11E1360EA 72-Pin 110ns 130ns 64G2987 MMDS36DSU-00 64G2 AU 1024 AX4640
SMD BJ ET

Abstract: L60 SMD IC 1mx4 aram
Text: SIEMENS 1Mx4 -Bit Dynamic RAM Low Power 1Mx4 -Bit Dynamic RAM HYB 514400BJ -60/-70/-80 HYB 514400BJL -60/-70/-80 Advanced Information · 1 048 576 words by 4-bit organization · 0 to 70 ` C operating temperature · Fast access and cycle time RAS access time: 60 ns (-60 version) 70 ns (-70 version) 80 ns (-80 , output vo ltage levels. 8) Either i RCH or i RRH m ust be satisfied for a read cycle. 9) T h e s e p aram , cw d a n d ? awd a re not restrictive operating p aram eters. T h e y a re included in the d a ta


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PDF 514400BJ 514400BJL 514400B L-60/-70/-80 514400BJ/BJL-60/-70/-80 r77777/, SMD BJ ET L60 SMD IC 1mx4 aram
2002 - Not Available

Abstract: No abstract text available
Text: (508) 366-5151 · www.whiteedc.com EDI8G322048C BLOCK DIAGRAM A0-A19 W\ G\ U1 1Mx4 DQ0-DQ3 U3 1Mx4 DQ4-DQ7 U9 1Mx4 E1\ E2\ DECODER DQ0-DQ3 U11 1Mx4 DQ4-DQ7 A20 U2 1Mx4 DQ8-DQ11 U4 1Mx4 DQ12-DQ15 U10 1Mx4 DQ8-DQ11 U12 1Mx4 DQ12-DQ15 U5 1Mx4 DQ16-DQ19 U7 1Mx4 DQ20-DQ23 A20 E3\ E4\ DECODER U13 1Mx4 DQ16-DQ19 U15 1Mx4 DQ20-DQ23 U6 1Mx4 DQ24-DQ27 U8 1Mx4 DQ28-DQ31 U14 1Mx4 DQ24-DQ27 U16 1Mx4 DQ28-DQ31


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PDF EDI8G322048C 2048K EDI8G322048C 1024K EDI8G322048C20MMC EDI8G322048C25MMC EDI8G322048C35MMC
A19T

Abstract: No abstract text available
Text: KM64V4002B/BL, KM64V4002B/BLI D o cu m e n t Title Prelim inary CMOS SRAM 1Mx4 Bit (with OE , aram eter V olta ge on A ny Pin R elative to V ss V olta ge on V c c S up ply R elative to V ss P ow er , CONDITIONS(Ta=0 to 70°C) P aram eter S up ply V olta ge G round Input Low V oltage Input Low V oltage S ym , 70°C , V cc=3.3V ±0.3V , unless otherw ise specified) P aram eter Input Leakage C urrent O utput , P aram eter Input Pulse Levels Input Rise and Fall T im es Input and O utput tim in g R eference


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PDF KM64V4002B/BL, KM64V4002B/BLI 32-SOJ-400 A19T
1998 - 4MX1 aram

Abstract: PMB 27251 smd diode S7 MA13 MA12 MA11 MA10 Voice Activity Detector DTMF detector 3.3v dram memory 256kx4
Text: and user data can be stored in ARAM /DRAM or flash memory which can be directly connected to the PSB , supports a power down mode where only the real time clock and the memory refresh (in case of ARAM /DRAM , kbit/s) Variable playback speed Support for DRAM/ ARAM or Flash Memory (5V, 3.3V) Optional voice , , Atmel) Support for x1 ARAM /DRAM New command for easier programming Auxiliary parallel port available , CAS1/FCS O H1) ARAM , DRAM: Column address strobes. Samsung Flash Memory: Address Latch Enable


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PDF MA0-MA11 P-MQFP-80 4MX1 aram PMB 27251 smd diode S7 MA13 MA12 MA11 MA10 Voice Activity Detector DTMF detector 3.3v dram memory 256kx4
1997 - 4MX1 aram

Abstract: psb 2186 sam audio Echo kb block diagram of microcontroller based caller id MA15 MA13 MA12 MA11 MA10 PMB 3330
Text: and user data can be stored in ARAM /DRAM or flash memory which can be directly connected to the PSB , supports a power down mode where only the real time clock and the memory refresh (in case of ARAM /DRAM , Selectable compression rate (3.3 kbit/s, 10.3 kbit/s) Variable playback speed Support for ARAM or Flash , four serial flash devices supported (Toshiba, Atmel) Support for x1 ARAM /DRAM New command for easier , 36 CAS0/ALE O CAS1/FCS O H1) ARAM , DRAM: Column address strobes. Samsung Flash Memory


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PDF MA0-MA11 MA0-MA11 P-MQFP-80 4MX1 aram psb 2186 sam audio Echo kb block diagram of microcontroller based caller id MA15 MA13 MA12 MA11 MA10 PMB 3330
1998 - echo cancellation noise speech recognition

Abstract: code eprom smd atmel MA15 MA13 MA12 MA11 MA10 telephone microcontroller caller id SMD diode s16 PMB 27251
Text: besides the standard call progress or alert tones. Messages and user data can be stored in ARAM /DRAM or , and the memory refresh (in case of ARAM /DRAM) are operational. The PSB 4860 supports interface pins , playback speed Support for ARAM or Flash Memory Optional voice prompt EPROM Full duplex speakerphone , four serial flash devices supported (Toshiba, Atmel) Support for x1 ARAM /DRAM New command for easier , H1) ARAM , DRAM: Column address strobes. Samsung Flash Memory: Address Latch Enable and chip


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PDF MA0-MA11 MA0-MA11 P-MQFP-80 echo cancellation noise speech recognition code eprom smd atmel MA15 MA13 MA12 MA11 MA10 telephone microcontroller caller id SMD diode s16 PMB 27251
2002 - cd 5151

Abstract: 1MX4 EDI8G322048V EDI8G322048V20MMC DQ28-DQ31
Text: W\ G\ E4\ DECODER E3\ U11 1Mx4 DQ4-DQ7 U2 1Mx4 DQ8-DQ11 U4 1Mx4 DQ12-DQ15 DQ8-DQ11 U12 1Mx4 DQ12-DQ15 DQ16-DQ19 U7 1Mx4 DQ20-DQ23 U13 1Mx4 A20 DQ0-DQ3 DQ16-DQ19 U15 1Mx4 DQ20-DQ23 U6 1Mx4 DQ24-DQ27 U8 1Mx4 DQ28-DQ31 U14 1Mx4 E2\ DQ4-DQ7 U5 1Mx4 E1\ U3 1Mx4 U10 1Mx4 A20 DQ0-DQ3 U9 1Mx4 DECODER U1 1Mx4 DQ24-DQ27 U16 1Mx4 DQ28-DQ31 8G322048C White Electronic Designs


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PDF EDI8G322048V 2048K EDI8G322048V 1024K EDI8G322048V20MMC EDI8G322048V25MMC EDI8G322048V35MMC cd 5151 1MX4 EDI8G322048V20MMC DQ28-DQ31
2001 - DQ8-DQ11

Abstract: EDI8G322048C static ram 2048K 70 ns
Text: www.whiteedc.com EDI8G322048C BLOCK DIAGRAM A0-A19 W\ G\ E4\ DECODER E3\ U11 1Mx4 DQ4-DQ7 U2 1Mx4 DQ8-DQ11 U4 1Mx4 DQ12-DQ15 DQ8-DQ11 U12 1Mx4 DQ12-DQ15 DQ16-DQ19 U7 1Mx4 DQ20-DQ23 U13 1Mx4 A20 DQ0-DQ3 DQ16-DQ19 U15 1Mx4 DQ20-DQ23 U6 1Mx4 DQ24-DQ27 U8 1Mx4 DQ28-DQ31 U14 1Mx4 E2\ DQ4-DQ7 U5 1Mx4 E1\ U3 1Mx4 U10 1Mx4 A20 DQ0-DQ3 U9 1Mx4 DECODER U1 1Mx4 DQ24-DQ27 U16 1Mx4


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PDF EDI8G322048C 2048K EDI8G322048C 1024K 8G322048C EDI8G322048C20MMC DQ8-DQ11 static ram 2048K 70 ns
1996 - 1MX4

Abstract: HYB314400BJ/BJL-50/-60/-70
Text: 1Mx4 -Bit Dynamic RAM HYB314400BJ/BJL-50/-60/-70 Advanced Information · 1 048 576 words by , 3.3V 1Mx4 DRAM The HYB 314400BJ/BJL is the new generation dynamic RAM organized as 1 048 576 words , Semiconductor Group 2 HYB314400BJ/BJL-50/-60/-70 3.3V 1Mx4 DRAM I/O1 I/O2 I/O3 I/O4 WE CAS . , Memory Array 1024x1024x4 4 HYB314400BJ/BJL-50/-60/-70 3.3V 1Mx4 DRAM Absolute Maximum Ratings , /-70 3.3V 1Mx4 DRAM DC Characteristics (cont'd) TA = 0 to 70 °C, VSS = 0 V, VCC = 3.3 V ± 0.3 V


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PDF HYB314400BJ/BJL-50/-60/-70 P-SOJ-26/20 GPJ05626 1MX4 HYB314400BJ/BJL-50/-60/-70
T 9722

Abstract: Diode T 9722 EDI8G322048C
Text: ECO #9722 Block Diagram A0-A19 W\ G\ U1 1Mx4 DECODER DECODER E4\ DQ4-DQ7 U2 1Mx4 DQ8-DQ11 U4 1Mx4 DQ12-DQ15 DQ8-DQ11 U12 1Mx4 DQ12-DQ15 DQ16-DQ19 U7 1Mx4 DQ20-DQ23 DQ16-DQ19 U15 1Mx4 DQ20-DQ23 U6 1Mx4 DQ24-DQ27 U8 1Mx4 DQ28-DQ31 U14 1Mx4 E3\ U11 1Mx4 U13 1Mx4 A20 DQ0-DQ3 U5 1Mx4 E2\ DQ4-DQ7 U10 1Mx4 E1\ U3 1Mx4 U9 1Mx4 A20 DQ0-DQ3 DQ24-DQ27 U16 1Mx4 DQ28-DQ31


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PDF EDI8G322048C 2048Kx32 01581USA EDI8G322048C T 9722 Diode T 9722
Not Available

Abstract: No abstract text available
Text: SRAM C S ^ C S .j i/o 12- i/ o 15 cs4 OE I/O 24 I/O 25 I/Ob - I/O n 1Mx4 SRAM | " 7 f l/O , eratu re 0°C to +70°C Electrical Characteristics P aram eter VoH VOL V |H V,L l|X bz be !s b i 'SB2 , ] P aram eter C IN ^O U T D escription Input C a pa citance O utpu t C a pa citance T est C o n


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PDF CYM1861V33 72-pin 64-pin
1996 - Not Available

Abstract: No abstract text available
Text: (2M x 40) DRAM Module - 1Mx4 based 72-pin SIMM, ECC Ordering Information SM5402000-5 SM5402000 , # 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM RAS1# CAS1# 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM 1Mx4 DRAM DQ12~DQ15 DQ16~DQ19 DQ20~DQ23


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PDF SM5402000 72-pin SM5402000-5 SM5402000-6 SM5402000-7
1996 - hyb514

Abstract: 514400 Q67100-Q973 HYB514400B
Text: 1Mx4 -Bit Dynamic RAM Low Power 1Mx4 -Bit Dynamic RAM HYB514400BJ/BJL -50/-60/-70 Advanced , /BJL-50/-60/-70 1Mx4 DRAM The HYB 514400BJ/BJL is the new generation dynamic RAM organized as 1 048 , Power DRAM (access time 70 ns) Semiconductor Group 2 HYB514400BJ/BJL-50/-60/-70 1Mx4 DRAM , HYB514400BJ/BJL-50/-60/-70 1Mx4 DRAM I/O1 I/O2 I/O3 I/O4 WE CAS . & Data in Buffer No. 2 , Diagram Semiconductor Group 4 VCC VSS 4 HYB514400BJ/BJL-50/-60/-70 1Mx4 DRAM Absolute


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PDF HYB514400BJ/BJL P-SOJ-26/20 GPJ05626 hyb514 514400 Q67100-Q973 HYB514400B
m7401

Abstract: m74010
Text: /02 1/03 WE Vcc OC0-C9 - M0-M9 M0-M9 »MO - M9 : 1Mx4 DRAM CO - C9 : 0.22^ Capacitors , ~70° c ) Symbol Vcc VlH VlL P aram eter Supply Voltage Input High Voltage Input Low Voltage Min 4.5 , Refresh Cycle Symbol tc S R GMM7401000CS/SG P aram eter CAS Set-up Time (CAS-before-RAS Refresh


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PDF GMM7401000CS/SG-60/70/80 GMM7401O0OCS/SG GMM7401000CS/SG GMM7401000CS/SG GMM7401000CS m7401 m74010
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