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CRC16

Abstract: CRC-16 CRC-16 pin A001 ST01 modbus RS485
Text: unit) mode of transmission. RTU is a binary method with byte format composed as follows: 1 start bit , transmission from master to slave is the following: DEFINITION BYTE Slave address 1 Function code 1 Data n Error check (CRC-16) (low byte ) 1 Error check (CRC-16) (high byte ) 1 , a CRC-16 is: 1. Load a 16 bit register with FFFF(hex). 2. Exclusive OR the first byte of the message with the low byte of the CRC-16 register. Put the result in the CRC-16 register. 3. Shift the


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PDF ST57-01C-xx CRC-16) CRC-16 CRC16 CRC-16 CRC-16 pin A001 ST01 modbus RS485
1996 - dw32

Abstract: mbus mbus master circuit TFB2010 TFB2022A mbus master MBus-to-Futurebus SN74ABT3614 mbus controllers
Text: single read /write Double word (8 bytes) read /write DW64 8- byte burst read /write 16-byte burst read /write DW64 16-byte burst read /write 32- byte burst read /write DW64 32- byte burst read , byte ) reads /writes DW32 16-byte burst read /write Four individual word (4 byte ) reads /writes , Double-word (8 bytes) read /write DW64 16-byte burst read /write 16-byte burst read /write DW64 32- byte , RESULTING HIF TRANSACTION TYPE Byte read /write DW32 single 1- byte read /write partial Half-word (2


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PDF SCAA019A 64-bit-only 32-bit 64-bit dw32 mbus mbus master circuit TFB2010 TFB2022A mbus master MBus-to-Futurebus SN74ABT3614 mbus controllers
secucalm

Abstract: HT80C51 ARM10 H285 I18N SecuCalm16
Text: 3 4 5 6 7 8 1. System LSI (S) 7. Rom Master 0 : 0K byte 2 : 2K byte 4 : 4K byte 6 : 6K byte 8 : 8K byte A : 48K byte C : 96K byte E : 176K byte G : 384K byte I : 768K byte (S-SIM) K : 1M byte M : 4M byte T : 16M byte V : 192K byte 2. Large Classification , : 88 8-bit A : 15 Other 1 : 1K byte 3 : 12K byte 5 : 16K byte 7 : 24K byte 9 : 32K byte B : 64K byte D : 128K byte F : 256K byte H : 512K byte J : 768K byte L : 2M byte R : 8M byte U


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PDF 16-bit 32-bit ARM10 16-bit HT80C51 SC-200 128-be secucalm ARM10 H285 I18N SecuCalm16
2005 - AN974

Abstract: EEPROM 24xxx PIC16F54 16-BYTE 24LC16B
Text: serial EEPROM. This device features 8 blocks of 256 bytes and 16-byte pages. All operations occur in , . Most of the 24LCXXB serial EEPROMs feature 16-byte pages, except for the 24LC01B/02B devices, which , A C K A C K A C K © 2005 Microchip Technology Inc. AN974 16-Byte Page Write , . Note that this consumed 8.405 ms total in this example for writing a 16-byte page. Compared to the 77 , Successively Figure 13 shows the last two bytes of a 16-byte sequential read operation. Note that the master


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PDF AN974 24LCXXB a34-8870 DS00974A-page AN974 EEPROM 24xxx PIC16F54 16-BYTE 24LC16B
2012 - xr20m1172il32-f

Abstract: HVQFN32 Sc2698 SC16C654BIBM,128 SCC2681AC1A44 SC16C752B SCC2691AC1A28 SC28L198
Text: UART with 16-Byte FIFO PLCC-44 ST16C550CP40 or IP40 Single Channel UART with 16-Byte FIFO PDIP-40 ST16C550CQ48-F or IQ48-F Single Channel UART with 16-Byte FIFO TQFP-48 EXAR Part , 16-Byte FIFO Drop-in SC16C550BIN40 2.5 V-5 V single UART with 16-Byte FIFO Drop-in SC16C550BIB48 2.5 V-5 V single UART with 16-Byte FIFO Similar Part SC16C650BIBS 2.5 V-5 V single UART with 32- Byte FIFO SINGLE UART XR16L570IL32-F Smallest 1.62 V to 5.5 V UART with 16-Byte


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PDF SC16C85xS WLAN/802 SC28L202 xr20m1172il32-f HVQFN32 Sc2698 SC16C654BIBM,128 SCC2681AC1A44 SC16C752B SCC2691AC1A28 SC28L198
1999 - semiconductors

Abstract: MITSUBISHI CPU AND BUS INTERFACE mitsubishi date code
Text: transfer Serial I/O FIFOs: IN IN IN IN IN 16-byte 512- byte 32- byte 16-byte 16-byte OUT 16-byte OUT 800- byte OUT 32- byte OUT 16-byte OUT 16-byte D- Date: Sept.1,99 Page: 6 of , Endpoint Endpoint 0: 1: 2: 3: 4: IN IN IN IN IN 16-byte OUT 512- byte OUT 32- byte OUT 16-byte OUT 16-byte OUT Code: M37640 16-byte 800- byte 32- byte 16-byte 16-byte Date


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PDF M37640 M66290 M16C/24 M37641 M37532 M37536 semiconductors MITSUBISHI CPU AND BUS INTERFACE mitsubishi date code
2000 - MPY16U

Abstract: 8 bit multiplier with shift register mpy16s MPY16 m16u2 MC8U
Text: version is as follows: 1. Clear result High byte . 2. Load loop counter with 8. 3. Shift right multiplier 4. If carry (previous bit 0 of multiplier) set, add multiplicand to result High byte . 5. Shift right result High byte into result Low byte /multiplier. 6. Shift right result Low byte /multiplier. 7 , Size Optimized Implementation) MPY8U CLEAR RESULT HIGH BYTE LOOP COUNTER < 8 SHIFT MULTIPLIER RIGHT ADD MULTIPLICAND TO RESULT HIGH BYTE Y CARRY SET? N SHIFT RIGHT RESULT HIGH


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PDF 16bit 16-bit 11/00/xM MPY16U 8 bit multiplier with shift register mpy16s MPY16 m16u2 MC8U
fBGA package tray 12 x 19

Abstract: FCCSP HT80C51 SecuCalm a44e ARM10 uLGA I18N 64 pin IC microcontroller LCD cortex my
Text: 4 5 6 7 8 1. System LSI (S) 7. Rom Master 0 : 0K byte 2 : 2K byte 4 : 4K byte 6 : 6K byte 8 : 8K byte A : 48K byte C : 96K byte E : 176K byte G : 384K byte I : 768K byte (S-SIM) K : 1M byte M : 4M byte T : 16M byte V : 192K byte 2. Large Classification , : 88 8-bit A : 15 Other 1 : 1K byte 3 : 12K byte 5 : 16K byte 7 : 24K byte 9 : 32K byte B : 64K byte D : 128K byte F : 256K byte H : 512K byte J : 768K byte L : 2M byte R : 8M byte U


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PDF 16-bit 32-bit ARM10 16-bit HT80C51 SC-200 128-bit fBGA package tray 12 x 19 FCCSP SecuCalm a44e ARM10 uLGA I18N 64 pin IC microcontroller LCD cortex my
Not Available

Abstract: No abstract text available
Text: ML2037) Message Format: Fixed message length, no parity, 8 bits Tx: Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte 0: 3 Ah, initiation message 1: OOh, spare 2: Command 3,4 parameter 1: 16 bit number byte 3 most significant (00 if not used). 5,6 parameter 2: 16 bit number byte 5 most significant. 7,8 parameter 3: 16 bit number byte 7 most significant. 9,10 parameter 4: 16 bit number byte 9 most significant. 11,12 parameter 5: 16 bit number byte 11 most significant. 13,14 parameter 6: 16 bit number byte


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2005 - 16-BYTE

Abstract: 24LC16B AN979 PIC18 PIC18F1220
Text: 24LC16B serial EEPROM. This device features 8 blocks of 256 bytes and 16-byte pages. All operations , 16-byte pages, except for the 24LC01B/02B devices, which feature 8- byte pages. Using the page write , Microchip Technology Inc. AN979 16-Byte Page Write Transfer Time Figure 10 shows an entire page write , example for writing a 16-byte page. Compared to the 76 ms required for transferring the same amount of , 16-byte sequential read operation. Note that the master pulls SDA low to transmit an ACK bit after


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PDF AN979 PIC18 24LCXXB microcontro34-8870 DS00979A-page 16-BYTE 24LC16B AN979 PIC18F1220
2008 - FENA-01

Abstract: abb dc motor ACS350 FI-00381 ACS350 drives abb drives ABB ACS350 ABB Group ABB motor start wiring diagram 800-HELP-365
Text: No file text available


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PDF FENA-01 3AUA0000033371 FENA-01 FENA-01) FI-00381 800-HELP-365 abb dc motor ACS350 ACS350 drives abb drives ABB ACS350 ABB Group ABB motor start wiring diagram 800-HELP-365
2005 - PIC12f675 example

Abstract: 24LCXXB PIC12F675 i2c gp4 sot23 source code for eeprom 24LC PIC12f675 example codes PIC10 PIC10F202 PIC12 Microchip Master Conference
Text: blocks of 256 bytes and 16-byte pages. All operations occur in the first block DS00982A-page 2 7 , page write operations. Most of the 24LCXXB serial EEPROMs feature 16-byte pages, except for the , DS00982A-page 10 A C K A C K A C K © 2005 Microchip Technology Inc. AN982 16-Byte Page , at the end. Note that this consumed 8.452 ms total in this example for writing a 16-byte page , /address bytes. Reading Data Bytes Successively Figure 14 shows the last two bytes of a 16-byte


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PDF AN982 PIC10 PIC12 PIC10F202 PIC12F675 24LCXXB E34-8870 DS00982A-page PIC12f675 example i2c gp4 sot23 source code for eeprom 24LC PIC12f675 example codes PIC10F202 Microchip Master Conference
1998 - MPY16S

Abstract: AVR200 avr200b avr200.asm 0936B MPY16U DIV16S
Text: Description The algorithm for the Code Size optimized version is as follows: 1. Clear result High byte . 2 , , add multiplicand to result High byte . 5. Shift right result High byte into result Low byte /multiplier. 6. Shift right result Low byte /multiplier. 7. Decrement Loop counter. 8. If loop counter not , RESULT HIGH BYTE LOOP COUNTER < 8 SHIFT MULTIPLIER RIGHT ADD MULTIPLICAND TO RESULT HIGH BYTE Y CARRY SET? N SHIFT RIGHT RESULT HIGH BYTE SHIFT RIGHT RESULT LOW BYTE AND MULTIPLIER


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PDF AVR200: 16-bit 16-bit dres16s" drem16s" div16s" drem16sL" drem16sH dd16sL" dres16sL" MPY16S AVR200 avr200b avr200.asm 0936B MPY16U DIV16S
2009 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF ECR15b 92HD89C 24-bit 192kHz.
secucalm

Abstract: SecuCalm16 FCCSP fBGA package tray 12 x 19 ARM10 HT80C51 I18N 1Z89
Text: No (1Z) 8 9 10 11 12 13 14 15 7. Rom Master 0 : 0K byte 2 : 2K byte 4 : 4K byte 6 : 6K byte 8 : 8K byte A : 48K byte C : 96K byte E : 176K byte G : 384K byte I : 768K byte (S-SIM) K : 1M byte M : 4M byte T : 16M byte V : 192K byte 1 : 1K byte 3 : 12K byte 5 : 16K byte 7 : 24K byte 9 : 32K byte B : 64K byte D : 128K byte F : 256K byte H : 512K byte J : 768K byte L : 2M byte R : 8M byte U : 1.5M byte W : 144K byte 8. Version A~Z *1st Version X 9~10. Mask Option


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PDF 16-bit 32-bit ARM10 16-bit HT80C51 SC-200 128-bit SC-100 secucalm SecuCalm16 FCCSP fBGA package tray 12 x 19 ARM10 I18N 1Z89
2005 - i2c bootloader

Abstract: AN2273 CY8C29xxx AN2273a Bootloader
Text: Application Note AN2273 I2C Bootloader for PSoCTM, 16-Byte Packet Transfer Author: Ernie , Note describes a bootloader for the PSoCTM device using I2C communication and 16-byte packet transfer , in 16-byte packets with some encoding bytes (explained in a later section). o The bootloader , create a 16-byte packet. For a write or verify, the I2C master sends a 14- byte packet indicating a , four 16-byte data blocks, which is the data targeted for the Flash block. A read status occurs after


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PDF AN2273 16-Byte CY8C21xxx, CY8C24xxxA, CY8C27xxx, CY8C29xxx AN2273a i2c bootloader AN2273 CY8C29xxx AN2273a Bootloader
1997 - m5m4v4169

Abstract: M5M4V4169CRT-10 256K-WORD M5M4V4169TP 70P3S-M 256-kword 1-OF-128 1kx16
Text: Write Enable WE# : I/O Byte Control DQC(u/l) : SRAM Address As : Output Enable G# : Data I/O DQ , Mask 0 1 0 Byte mask RB1 1 2 7 Read Buffer1 Read Buffer2 WB2 Write Buffer 2 , Decoder 8X16 Ad0-9 1 of 1024 Decode 8X16 Byte Mask MASK MASK Byte Mask DQ0-7 RB1 Lower Byte Upper Byte WB2 DQ8-15 Lower Byte Upper Byte As0-2 1 of 8 Decode RB2 As0-2 1 of 8 Decode 8X16 Lower Byte Upper Byte 16 bits DQs Lower Byte Upper Byte MASK


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PDF M5M4V4169CRT-10 256K-WORD 16-BIT) 1024-WORD M5M4V4169CRT 144-word 16-bit 1024word m5m4v4169 M5M4V4169TP 70P3S-M 256-kword 1-OF-128 1kx16
1997 - AVR200

Abstract: avr200b div16u MPY16U 0936a
Text: Description The algorithm for the Code Size optimized version is as follows: 1. Clear result High byte . 2 , , add multiplicand to result High byte . 5. Shift right result High byte into result Low byte /multiplier. 6. Shift right result Low byte /multiplier. 7. Decrement Loop counter. 8. If loop counter not zero, goto Step 4. MPY8U CLEAR RESULT HIGH BYTE LOOP COUNTER < 8 SHIFT MULTIPLIER RIGHT ADD MULTIPLICAND TO RESULT HIGH BYTE Y CARRY SET? N SHIFT RIGHT RESULT HIGH BYTE SHIFT


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PDF AVR200: 16-bit 16-bit dres16s" drem16s" div16s" drem16sL" drem16sH dd16sL" dres16sL" AVR200 avr200b div16u MPY16U 0936a
2011 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF 92HD65C 92HD65C
2006 - AVR200

Abstract: booth multiplier avr200b 0936-C MPY16U avr200.asm div16u
Text: High byte . 2. Load Loop counter with eight. 3. Shift right multiplier 4. If carry (previous bit 0 of multiplier) set, add multiplicand to result High byte . 5. Shift right result High byte into result Low byte /multiplier. 6. Shift right result Low byte /multiplier. 7. Decrement Loop counter. 8. If Loop counter not , CLEAR RESULT HIGH BYTE LOOP COUNTER 8 SHIFT MULTIPLIER RIGHT ADD MULTIPLICAND TO RESULT HIGH BYTE Y CARRY SET? N SHIFT RIGHT RESULT HIGH BYTE SHIFT RIGHT RESULT LOW BYTE AND


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PDF AVR200: 16-bit 16-bit 0936C-AVR-05/06 AVR200 booth multiplier avr200b 0936-C MPY16U avr200.asm div16u
1996 - dw32

Abstract: mbus TFB2010 TFB2022A free mbus master SN74ABT3614 m-bus mbus controllers
Text: Double word (8 bytes) read /write DW64 8- byte burst read /write 16-byte burst read /write DW64 16-byte burst read /write 32- byte burst read /write DW64 32- byte burst read /write 64- byte , /writes DW32 16-byte burst read /write Four individual word (4 byte ) reads /writes DW32 32- byte , ) read /write DW64 16-byte burst read /write 16-byte burst read /write DW64 32- byte burst read , TRANSACTION TYPE Byte read /write DW32 single 1- byte read /write partial Half-word (2 bytes) read


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PDF SCAA019A 64-bit-only 32-bit 64-bit dw32 mbus TFB2010 TFB2022A free mbus master SN74ABT3614 m-bus mbus controllers
2009 - IDT 92HD89E

Abstract: IDT 92HD89E CODEC 92HD89E
Text: No file text available


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PDF ECR15b 92HD89E 24-bit 10-channel 192kHz. 92HD89E IDT 92HD89E IDT 92HD89E CODEC
1997 - M5M4V4169

Abstract: No abstract text available
Text: : SRAM Write Enable WE# : I/O Byte Control DQC(u/l) : SRAM Address As : Output Enable G# : Data I , Address Buffer DRAM Ad8 Address Input Ad7 Ad6 Mask 0 1 0 Byte mask RB1 1 2 7 , 256KX16 DRAM Row Decoder 8X16 Ad0-9 1 of 1024 Decode 8X16 Byte Mask MASK MASK Byte Mask DQ0-7 RB1 Lower Byte Upper Byte WB2 DQ8-15 Lower Byte Upper Byte As0-2 1 of 8 Decode RB2 As0-2 1 of 8 Decode 8X16 Lower Byte Upper Byte 16 bits DQs Lower Byte Upper


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PDF M5M4V4169CRT-10 256K-WORD 16-BIT) 1024-WORD M5M4V4169CRT 144-word 16-bit 1024word M5M4V4169
2012 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF 92HD68E ECR15b 92HD68E 10-channel 24-bit 192kHz.
2009 - AVR200: Multiply and Divide Routines

Abstract: AVR200 avr200b MPY16U m16u2 div16u m16s1 MC8U
Text: High byte . 2. Load Loop counter with eight. 3. Shift right multiplier 4. If carry (previous bit 0 of multiplier) set, add multiplicand to result High byte . 5. Shift right result High byte into result Low byte /multiplier. 6. Shift right result Low byte /multiplier. 7. Decrement Loop counter. 8. If Loop counter not , CLEAR RESULT HIGH BYTE LOOP COUNTER 8 SHIFT MULTIPLIER RIGHT ADD MULTIPLICAND TO RESULT HIGH BYTE Y CARRY SET? N SHIFT RIGHT RESULT HIGH BYTE SHIFT RIGHT RESULT LOW BYTE AND


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PDF AVR200: 16-bit 16-bit 0936D-AVR-09/09 AVR200: Multiply and Divide Routines AVR200 avr200b MPY16U m16u2 div16u m16s1 MC8U
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