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LTC1609AISW#TR Linear Technology IC ADC SRL 16BIT 200KSPS 20-SOIC
LTC1609ACSW#TR Linear Technology IC ADC SRL 16BIT 200KSPS 20-SOIC
LTC2450CDC-1#TRMPBF Linear Technology LTC2450-1 - Easy-to-Use, Ultra-Tiny 16-Bit Delta Sigma ADC; Package: DFN; Pins: 6; Temperature Range: 0°C to 70°C
LTC2450IDC#PBF Linear Technology LTC2450 - Easy-to-Use, Ultra-Tiny 16-Bit Delta Sigma ADC; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C
LTC2450IDC-1#TRMPBF Linear Technology LTC2450-1 - Easy-to-Use, Ultra-Tiny 16-Bit Delta Sigma ADC; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C
LTC2450CDC#TRPBF Linear Technology LTC2450 - Easy-to-Use, Ultra-Tiny 16-Bit Delta Sigma ADC; Package: DFN; Pins: 6; Temperature Range: 0°C to 70°C

16 bit odd even parity checker using two IC 74180 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
parity generator using 74180

Abstract: 74180 parity generator 74180 parity using 74180 LTNE 4 bit even and odd parity checker 74180 parity 1N3064 74LS N74180N
Text: Signetics Logic Products 74180 Parity Generator/ Checker 9- Bit Odd / Even Parity Generator , '180 in 8- bit increments. The Even and Odd parity outputs of the first stage are connected to the , or odd parity • Checks for parity errors • See '280 for faster parity checker DESCRIPTION The '180 is a 9- bit parity generator or checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even and Odd parity enable inputs and parity outputs are available


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PDF 1N916, 1N3064, 500ns parity generator using 74180 74180 parity generator 74180 parity using 74180 LTNE 4 bit even and odd parity checker 74180 parity 1N3064 74LS N74180N
parity generator using 74180

Abstract: 74180 parity generator 74180 74180 parity generator manual 1N3064 74LS N74180N parity using 74180 4 bit even and odd parity checker
Text: Signetics 74180 Parity Generator/ Checker 9- Bit Odd / Even Parity Generator/ Checker Product , accomplished by serially cascading the '180 in 8- bit increments. The Even and Odd parity outputs of the first , 9- bit parity generator or checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even and Odd parity enable inputs and parity outputs are available for , the Even and Odd outputs. True active-HIGH parity is established with Even Parity enable input


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PDF 1N3064, 500ns parity generator using 74180 74180 parity generator 74180 74180 parity generator manual 1N3064 74LS N74180N parity using 74180 4 bit even and odd parity checker
parity generator using 74180

Abstract: 74180 parity generator parity using 74180 mip0
Text: Signetjcs 74180 Parity Generator/ Checker 9- Bit Odd / Even Parity Generator/ Checker Product , opposite logic level. Parity checking of a 9- bit word (8 bits plus parity ) is possible by using the two , parity · Checks for parity errors · See '280 for faster parity checker TYPE 74180 TYPICAL , systems. Both Even and Odd parity enable inputs and parity outputs are available for generating or , Odd outputs. True active-HIGH pari ty is established with Even Parity enable input (P e ) set HIGH and


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PDF N74180N 1N916, 1N3064, 500ns 500ns parity generator using 74180 74180 parity generator parity using 74180 mip0
Not Available

Abstract: No abstract text available
Text: Signetìcs 74180 Parity Generator/ Checker 9- Bit Odd / Even Parity Generator/ Checker Product , level. Parity checking of a 9- bit word (8 bits plus parity ) is possible by using the two N OTE , parity · Checks for parity errors · See '280 for faster parity checker TYPE 74180 TYPICAL , . Both Even and Odd parity enable inputs and parity outputs are available for generating or checking parity on 8-bits. True active-HIGH or true active-LOW parity can be generated at both the Even and Odd


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PDF N74180N 1N916, 1N3064, 500ns
pin diagram for IC 74180

Abstract: ic 74180 of ic 74180
Text: Signetics 74180 Parity Generator/ Checker 9- Bit O dd/ Even Parity Generator/ Checker Product , parity · Checks for parity errors · See '280 for faster parity checker TYPE 74180 TYPICAL , roduct S p ecification Parity Generator/ Checker 74180 LOGIC DIAGRAM FUNCTION TABLE INPUTS , 5-347 Signetics Logic Products P roduct S p ecification Parity Generator/ Checker 74180 , Parity Generator/ Checker 74180 AC WAVEFORMS VIN V VM «IN P -h'PHU" I v OUT


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PDF N74180N 1N916, 1N3064, 500ns 500ns pin diagram for IC 74180 ic 74180 of ic 74180
74180

Abstract: 74180 parity generator 4 bit even and odd parity checker 74180 parity 74180 bit 93180 8284 pin diagram 8284 ScansUX987
Text: TTL/MSI 93180/54180, 74180 8- BIT PARITY GENERATOR/ CHECKER DESCRIPTION - The93180/54180or 74180 are monolithic, 8- Bit Parity Check/Generators which , feature control inputs and even / odd outputs to enhance operation in either odd or even parity applications. Cascading these circuits allows unlimited word length , Iq to 17 Parity Inputs 1 U.L. P0 Odd Parity Input 2 U.L. Pg Even Parity Input 2 U.L. £Q0 Sum Odd Outputs 10 U.L. £Qe Sum Even Outputs 10 U.L. Note: 1 U.L. = 40 juA HIGH/ 1.6 mA LOW LOGIC SYMBOL 10 11 12


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PDF The93180/54180or 74180 74180 parity generator 4 bit even and odd parity checker 74180 parity 74180 bit 93180 8284 pin diagram 8284 ScansUX987
74180 parity generator

Abstract: 74180PC 74180 54180 54180DM application of parity checker 54180FM 74180FC
Text: 180 ö/f ¿? 37 54/ 74180 7 8- BIT PARITY GENERATOR/ CHECKER DESCRIPTION—The '180 is a monolithic, 8- bit parity checker /generator which features control inputs and even / odd outputs to enhance operation in either odd or even parity applications. Cascading these circuits allows unlimited word length , Data Inputs Odd Input Even Input Odd Parity Output Even Parity Output 1.0/1.0 2.0/2.0 2.0/2.0 20/10 20/10 TRUTH TABLE INPUTS OUTPUTS t OF 1's AT X 2 0 THRU 7 EVEN ODD EVEN ODD EVEN H L H L ODD


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PDF 74180PC 74180FC 54180DM 54180FM 74180 parity generator 74180PC 74180 54180 54180DM application of parity checker 54180FM 74180FC
SN54180

Abstract: 1N3064 SN7418 SN74180
Text: TTL MSI CIRCUIT TYPES SN54180, SN74180 8- BIT ODD / EVEN PARITY GENERATORS/CHECKERS logic W FLAT , £ Odd R|_= 400 n 7 10 ns 9-310 CIRCUIT TYPES SN54180, SN74180 8- BIT ODD / EVEN PARITY GENERATORS/CHECKERS 9-311 CIRCUIT TYPES SN54180, SN74180 8- BIT ODD / EVEN PARITY GENERATORS/CHECKERS PARAMETER , 1N3064. FIGURE 5 - SWITCHING TIMES 9 9-313 CIRCUIT TYPES SN54180, SN74180 8- BIT ODD / EVEN PARITY , ODD / EVEN PARITY GENERATORS/CHECKERS electrical characteristics over recommended operating temperature


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PDF SN54180, SN74180 32-bit SN54180 1N3064 SN7418
logic ic 7270

Abstract: 74180 ic 74180 sn74180 ic 74180 of 16 bit
Text: odd parity is being generated or checked, the even or odd inputs can be utilized as the parity or 9th- bit , TTL MSI [logic F U N C T IO N T A B L E IN P U T S TYPES SN541Se. SN74180 9- BIT ODD / EVEN , I NICn strum ents ORPORATED 7-2 TYPES SN54180, SN74180 9- BIT ODO/ EVEN PARITY 6ENERAT0RS , P A C K A G E (TO P V IE W ) OUTPUTS £ ODD L H H L L H E O F H '* A T L EVEN ODD A THRUH EVEN EVEN ODD EVEN ODD X X H H L L H L L L H H H L H L L H L H H h ig h level, L ä lo w level, X =


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PDF SN541Se. SN74180 logic ic 7270 74180 ic 74180 ic 74180 of 16 bit
of ic 74180

Abstract: No abstract text available
Text: TYPES SN54180, SN74180 9- BIT ODD / EVEN PARITY GENERATORS/CHECKERS D E C E M B E R 1 9 7 2 - R E V I , either odd or even-parity applications. Depending on whether even or odd parity is being generated or checked, the even or odd inputs can be utilized as the parity or 9th- bit input. T he word-length , TTL DEVICES TYPES SN54180, SN74180 9- BIT ODD / EVEN PARITY GENERATORS/CHECKERS electrical , · D A L L A S T E X A S :5 2 6 £ TYPES SN54180, SN74180 9- BIT ODD / EVEN PARITY GENERATORS


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PDF SN54180, SN74180 of ic 74180
s2599

Abstract: sn74180
Text: SN 54180, SN 74180 9 BIT ODD / EVEN PARITY GENERATORS/CHECKERS D E C E M B E R 1 9 7 2 - R E V lS E , EX A S 75265 n uc 2- SN 54180, SN 74180 9 BIT ODD / EVEN PARITY GENERATORS/CHECKERS , . Depending on whether even or odd parity is being generated or checked, the even or odd inputs can be , SN 54180, SN 74180 9- BIT ODDfEVEN PARITY GENERATORSjCHECKERS schematics of inputs and outputs E Q , U T S Z O F H 's A T A THRU H EVEN ODD EVEN ODD X X H = high le v e l (TOP VIEW ) V O UTPUTS


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PDF SN54180 SN74180 s2599 sn74180
7483 4 bit binary full adder

Abstract: 74151 demultiplexer 74153 full adder 74198 shift register 7483 4 bit binary adder 7483 8 bit binary adder 74155 demultiplexer bcd adder with 74283 74150 multiplexer 4 bit 7483 binary adder
Text: D-Type Flip-Flop 35 MHz 150 X X 54/ 74180 9- Bit Odd / Even Parity Generator/ Checker 32 170 X X 54 , ) Pwr1 Diss (mW) Available Packages 14 Pin 16 Pin 24 Pin DC CJ CL DD N R 54/7442 , /7483 4- Bit Binary Full Adder 13 300 X X 54/74123 Dual Retriggerable Monostable Multivibrator 21 230 X X 54/74145 BCD-to-Decimal recoder Driver (15V Breakdown) 30 215 X X 54/74150 16 , Selector/Multiplexer 14 180 X X 54/74154 4-to- 16 Line Decoder/Demultiplexer 23 170 X X 54/74155


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PDF 16-to-1 Types--55Â 7483 4 bit binary full adder 74151 demultiplexer 74153 full adder 74198 shift register 7483 4 bit binary adder 7483 8 bit binary adder 74155 demultiplexer bcd adder with 74283 74150 multiplexer 4 bit 7483 binary adder
Not Available

Abstract: No abstract text available
Text: correction applications. The '62 provides odd and even parity for up to nine data bits. The even parity output (PE) is HIGH if an even number of inputs are HIGH and E is LOW. The odd parity ou tput (PO) w ill , both outputs LOW. LO G IC SYMBOL INPUT-TO -O UTPUT DELAY 16 ns OUTPUT ENABLE TERMINAL BOTH ODD AND EVEN PARITY OUTPUTS PROVIDED GENERATES A PARITY BIT FOR UP TO NINE BITS CHECKS FOR PARITY ON UP TO , expanded to any number of data inputs. Both even and odd parity outputs are available to allow maximum fle


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PDF 93S62
Not Available

Abstract: No abstract text available
Text: 9- Bit Odd / Even Parity Generator/ Checker T he R C A CD 54H C280 and C D 54H CT 280 are 9- bit odd / even parity , generator checker devices. Both even and odd parity outputs are available for checking or generating parity for w ords up to nine bits long. Even parity is indicated ( I E out­ put is high) when an even num ber of data inputs is high. Odd parity is indicated (XO output is high) when an , Vcc (3V) Vcc (6V) — 10 2,5,6,9,12,15, 16 ,19 1,20 Dynam ic C D 5 4H C/H CT 273


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PDF CD54HC273/3A CD54HCT273/3A CD54HC280/3A CD54HCT280/3A CD54HC283/3A CD54HCT283/3A CT283
93S62

Abstract: 93S62DC 93S62DM 93S62FC 93S62FM 93S62PC
Text: 16 ns • OUTPUT ENABLE TERMINAL • BOTH ODD AND EVEN PARITY OUTPUTS PROVIDED • GENERATES A , odd and even parity for up to nine data bits. The even parity output even number of , can be expanded to any number of data inputs. Both even and odd parity outputs are available to allow , ), the Even Parity output (PE) is HIGH when an even number of inputs is HIGH, and the Odd Parity output , section which will generate a parity bit in 16 to 20 ns. The ninth input (Is) bypasses three levels of


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PDF 93S62 93S62 93S62DC 93S62DM 93S62FC 93S62FM 93S62PC
Not Available

Abstract: No abstract text available
Text: registers (Y and Z), an even parity generator/ checker and a parity bit latch complementor. The input data , (W), latch (Y), register (Z), an even parity generator/ checker and a parity bit latch complementor , Parity Check Even Parity Generation POLARITY Even Parity Even / Odd Parity Check Generation .9 , provide Even / Odd parity generation from Port A to Port B and Even parity generation from Port B to Port A. Even parity checking with ERROR flag is provided in both directions. The Even / Odd parity and Generate


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PDF IDT73210/A/B IDT73211/A/B IL-STD-883, 32-pin IDT73210 MASS771 IDT73210/A/B, IDT73211/A/B MIL-STD-883,
3 bit parity checker using cmos

Abstract: 4 bit even parity generator circuit 4000B 74LS280 M74HC280 M74HC280P CRD Diode 4 bit parity generator using cmos
Text: MITSUBISHI HIGH SPEED CMOS M74HC280P 9- BIT ODD / EVEN PARITY GENERATOR/ CHECKER DESCRIPTION The M74HC280 is a semiconductor integrated circuit consisting of a 9- bit parity generator/ checker . FEATURES â , checker , one bit from among the 9 bits of data input is used as an odd or even parity designation and the , HIGH SPEED CMOS M74HC280P 9- BIT ODD / EVEN PARITY GENERATOR/ CHECKER ABSOLUTE MAXIMUM RATINGS Cra = -4o , Manufacturer MITSUBISHI HIGH SPEED CMOS M74HC280P 9- BIT ODD / EVEN PARITY GENERATOR/ CHECKER SWITCHING


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PDF M74HC280P M74HC280 20/iW/package 3 bit parity checker using cmos 4 bit even parity generator circuit 4000B 74LS280 M74HC280P CRD Diode 4 bit parity generator using cmos
1998 - Not Available

Abstract: No abstract text available
Text: transceiver with 16-bit parity generator/ checker (3-State) 74ABT16899 74ABTH16899 FEATURES · , Semiconductors Product specification 18- bit latched transceiver with 16-bit parity generator/ checker (3 , 18- bit latched transceiver with 16-bit parity generator/ checker (3-State) 74ABT16899 74ABTH16899 , 16-bit parity generator/ checker (3-State) 74ABT16899 74ABTH16899 ABSOLUTE MAXIMUM RATINGS1, 2 , Product specification 18- bit latched transceiver with 16-bit parity generator/ checker (3


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PDF 74ABT16899 74ABTH16899 18-bit 16-bit 74ABTH16899 74ABT/H16899 01-Mar-98)
Not Available

Abstract: No abstract text available
Text: / CHECKER 81-LINE PARITY QENERATOR/ CHECKER H - Evan L = Odd H - Even ' L = Odd H -O d d L = Even , generator/ checker . As an alternative, the £ ODD outputs of two or three parity generators/checkers can be , SN74ALS280, SN74AS280 9- BIT PARITY GENERATORS/CHECKERS SDAS038C - DECEMBER 1982 - REVISED DECEMBER 1994 · Generate Either Odd or Even Parity for Nine Data Lines · Cascadable for n-BIt Parity · Can Be Used to Upgrade Existing Systems Using MSI Parity Circuits · Package Options Include Plastic


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PDF SN74ALS280, SN74AS280 SDAS038C 300-mll
Not Available

Abstract: No abstract text available
Text: , 4, 6, 8, 10 Even L 1 ,3 , 5, 7, 9 Odd H FIGURE 1. Dedicated 10- Bit Parity Sensing , R C H II- D SEM ICONDUCTO R tm DM74AS286 9- Bit Parity Generator/ Checker with Bus-Driver , Generates either odd or even parity for nine data lines Inputs are buffered to lower the drive requirements , Parity 1 ,3 , 5, 7, 9 L N/A H H Checker L = L o w L o g ic L e v e l © 1998 , b le www.fairchildsemi.com DM74AS286 9- Bit Parity Generator/ Checker with Bus-Driver Parity I/O


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PDF DM74AS286 AS286 AS180, AS280 DM74AS286M DM74AS286N
1998 - DM93S62

Abstract: DM93S62N N14A
Text: provides odd and even parity for up to nine data bits. The even parity output (PE) is HIGH if an Connection Diagram even number of inputs are HIGH and E is LOW. The odd parity output (PO) will be HIGH if , E Output Enable (Active Low) PO Odd Parity Output PE Even Parity Output Truth , I0­I7 represent one section which will generate a parity bit in 16 ns to 20 ns. The ninth input (I8 , be expanded to any number of data inputs. Both even and odd parity outputs are available to allow


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PDF DM93S62 DM93S62 DS009809-2 DS009809-1 DM93S62N DM93S62N N14A
2001 - SO56-2

Abstract: No abstract text available
Text: is always in checking mode. The ODD / EVEN select is common between the two directions. Except for the ODD / EVEN control, independent operation can be achieved between the two directions by using the , TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: - - - - The FCT162511T 16-bit registered/latched transceiver with parity , / Register PERB (Open Drain) PA1,2 ODD / EVEN LEBA CLKBA Parity , D ata Parity , data 18 18


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PDF IDT54/74FCT162511AT/CT 16-BIT 16-BIT FCT162511T MIL-STD-883, SO56-1) SO56-2) E56-1) SO56-2
2001 - Not Available

Abstract: No abstract text available
Text: : The FCT162511T 16-bit registered/latched transceiver with parity is built using advanced dual metal , TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY , select is common between the two directions. Except for the ODD / EVEN control, independent operation can , FUNCTIONAL BLOCK DIAGRAM LEA B CLKAB Data 16 Parity GEN/CHK Byte Parity Generator/ Checker 2 Latch/ Register PERB (Open Drain) Parity , data 18 OEAB B0-15 PB1,2 A0-15 PA1,2 ODD / EVEN LEB A CLKB A Parity , data


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PDF IDT54/74FCT162511AT/CT 16-BIT 250ps, MIL-STD-883, 200pF, FCT162511T
2000 - DM93S62N

Abstract: MS-001 N14A DM93S62
Text: can be expanded to any number of data inputs. Both even and odd parity outputs are available to , (E = LOW), the Even Parity output (PE) is HIGH when an even number of inputs is HIGH, and the Odd , DM93S62 9-Input Parity Checker /Generator October 1988 Revised May 2000 DM93S62 9-Input Parity Checker /Generator General Description The DM93S62 is a very high speed 9-input parity checker / generator for use in error detection and error correction applications. The DM93S62 provides odd and even


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PDF DM93S62 DM93S62 DM93S62N 14-Lead MS-001, DM93S62N MS-001 N14A
2009 - Not Available

Abstract: No abstract text available
Text: TEMPERATURE RANGES FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: DESCRIPTION: · · · · The FCT162511T 16-bit registered/latched transceiver with parity , B-to-A direction is always in checking mode. The ODD / EVEN select is common between the two directions. Except for the ODD / EVEN control, independent operation can be achieved between the two directions by , , data 16 Parity GEN/CHK A0-15 Byte Parity Generator/ Checker 2 18 Latch/ Register


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PDF IDT54/74FCT162511AT/CT 16-BIT 16-BIT FCT162511T MIL-STD-883, 511AT 511CT 18-Bit
Supplyframe Tracking Pixel