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TPS610987DSER TPS610987DSER ECAD Model Texas Instruments Low input voltage, 4.3V output voltage, synchronous boost converter with VSUB active discharger 6-WSON -40 to 85
PDRV10987SPWPR PDRV10987SPWPR ECAD Model Texas Instruments 50W, 12V to 24V, Three-Phase Sensorless BLDC Motor Driver 24-HTSSOP -40 to 85
TPS610987DSET TPS610987DSET ECAD Model Texas Instruments Low input voltage, 4.3V output voltage, synchronous boost converter with VSUB active discharger 6-WSON -40 to 85
DRV10987DPWPR DRV10987DPWPR ECAD Model Texas Instruments 50W, 12V to 24V, Three-Phase Sensorless BLDC Motor Driver 24-HTSSOP -40 to 125
DRV10987SPWPR DRV10987SPWPR ECAD Model Texas Instruments 50W, 12V to 24V, Three-Phase Sensorless BLDC Motor Driver 24-HTSSOP -40 to 125
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2006 - Not Available

Abstract: No abstract text available
Text: OLE BIASC 8 PDP FAULT Analog Reference RZTC BGV TS RZTC BGV TS ENA OLE BIASC , . Bits are clocked into an 11 -bit-wide shift register during the high level of the serial clock, SCK. A , www.ti.com SLLS750A ­ AUGUST 2006 ­ REVISED SEPTEMBER 2006 SDA SCK 11 -Bit Shift Register 8 Bits Data 8 , derived. An external zero-temperature-coefficient resistor must be connected from the RZTC pin of the , MONB exceeds the voltage at RZTC (1.15V). · Photodiode current exceeds 150% of its set value. · Bias


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit OC-192/SDH STM-64
2006 - apc ups 640

Abstract: BLM15HG102SN1D STM-64 SFP SFP fiber optic pinout s0212 STM-64 resistor 284 ONET1191V modc7 15-V
Text: RZTC . BGV 11 Anolog-out BIAS 16 Analog Sinks average bias current for VCSEL in , BIAS FAULT PDP FLT RZTC RZTC BGV BGV TS TS Analog Reference 8 ENA , . Bits are clocked into an 11 -bit-wide shift register during the high level of the serial clock, SCK. A , ONET1191V www.ti.com SLLS750 ­ AUGUST 2006 SDA 11 -Bit Shift Register SCK 8 Bits Data 3 Bits , derived. An external zero-temperature-coefficient resistor must be connected from the RZTC pin of the


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PDF ONET1191V SLLS750 20-Pin 10-Gigabit OC-192/SDH STM-64 apc ups 640 BLM15HG102SN1D STM-64 SFP SFP fiber optic pinout s0212 resistor 284 ONET1191V modc7 15-V
2006 - BLM15HG102sn1d

Abstract: No abstract text available
Text: 17 16 DIS 1 RZTC 2 EP BIAS VCC VCC 15 PD 14 COMP 13 MONP 12 MONB 11 BGV TS 3 , MOD+ MOD­ MONB MONP PD RZTC SCK SDA TS VCC NO. 11 16 14 7 8 1 10 6, 9, EP 18 19 12 13 15 2 4 5 3 17 , MONP PD COMP B0072-02 RZTC BGV TS RZTC BGV TS Bias Current Generator and Automatic Power , edge of SDA with SCK at a high level, transitioning to a low level. Bits are clocked into an 11 , SDA SCK 11 -Bit Shift Register 8 Bits Data 8 8 Start Start/Stop Detector Logic 8-Bit Register


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PDF ONET1191V SLLS750 20-Pin 10-Gigabit OC-192/SDH STM-64 BLM15HG102sn1d
2012 - CIRCUIT DIAGRAM APC UPS 700

Abstract: APC Back UPS 500 CIRCUIT apc ups 700 ONET1141L
Text: € DIS 4 15 COMP 13 MONB 9 10 11 12 RZTC 8 GND 7 DIN+ DIN - SDA 6 GND , , Analog References, Power supply Monitor & Temperature Sensor ADC Power-On Reset PSM RZTC TS RZTC Figure 1. Simplified Block Diagram of the ONET1141L PACKAGE The ONET1141L is packaged in a , . Supply Circuit ground. Exposed die pad (EP) must be grounded. 8, 11 , 17, GND 20, 23, EP or 40k , data input. On-chip differentially 100 terminated to DIN–. Must be AC coupled. 12 RZTC


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PDF ONET1141L 145mA CIRCUIT DIAGRAM APC UPS 700 APC Back UPS 500 CIRCUIT apc ups 700 ONET1141L
2006 - BLM15HG102SN1

Abstract: 15-V BLM15HG102SN1D ONET1191V STM-64 MS501 chemical control process block diagram
Text: RZTC 15 PD 14 COMP 2 TS 3 13 MONP EP 6 7 8 9 10 GND FLT 11 , RZTC . For best matching, use the same 28.7-k resistor to GND as used at RZTC . BGV 11 , RZTC RZTC BGV BGV TS TS ENA OLE BIASC Bias Current Generator and , edge of SDA with SCK at a high level, transitioning to a low level. Bits are clocked into an 11 , ­ REVISED SEPTEMBER 2006 SDA 11 -Bit Shift Register SCK 8 Bits Data 3 Bits Addr 3 8


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit BLM15HG102SN1 15-V BLM15HG102SN1D ONET1191V STM-64 MS501 chemical control process block diagram
2006 - Not Available

Abstract: No abstract text available
Text: OLE BIASC 8 PDP FAULT Analog Reference RZTC BGV TS RZTC BGV TS ENA OLE BIASC , . Bits are clocked into an 11 -bit-wide shift register during the high level of the serial clock, SCK. A , www.ti.com SLLS750A ­ AUGUST 2006 ­ REVISED SEPTEMBER 2006 SDA SCK 11 -Bit Shift Register 8 Bits Data 8 , derived. An external zero-temperature-coefficient resistor must be connected from the RZTC pin of the , MONB exceeds the voltage at RZTC (1.15V). · Photodiode current exceeds 150% of its set value. · Bias


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit OC-192/SDH STM-64
2006 - Not Available

Abstract: No abstract text available
Text: RZTC 15 PD 14 COMP 2 TS 3 13 MONP EP 6 7 8 9 10 GND FLT 11 , RZTC . For best matching, use the same 28.7-kΩ resistor to GND as used at RZTC . BGV 11 , RZTC RZTC BGV BGV TS TS ENA OLE BIASC Bias Current Generator and , an 11 -bit-wide shift register during the high level of the serial clock, SCK. A STOP command is , SLLS750A – AUGUST 2006 – REVISED SEPTEMBER 2006 SDA 11 -Bit Shift Register SCK 8 Bits Data


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit
2007 - Not Available

Abstract: No abstract text available
Text: 16 BIAS VCC VCC DIS 1 RZTC 2 TS 3 SCK 4 SDA 5 15 PD ONET 8501V 20 Pin QFN 14 COMP 13 MONP 12 MONB 11 BGV 6 7 8 9 10 GND TERMINAL FUNCTIONS TERMINAL PIN NO. 1 2 3 4 5 7 8 10 11 12 NAME DIS RZTC TS SCK SDA DIN+ DIN­ FLT BGV MONB Analog-out TYPE Digital-in , COMP RZTC Band-Gap & Analog References BGV Power-On Reset Temperature Sensor TS RZTC BGV TS 2 , bandgap voltage at RZTC . For best matching, use the same 28.7k resistor to GND as used at RZTC . Bias


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PDF ONET8501V SLLS837B
2006 - Not Available

Abstract: No abstract text available
Text: OLE BIASC 8 PDP FAULT Analog Reference RZTC BGV TS RZTC BGV TS ENA OLE BIASC , . Bits are clocked into an 11 -bit-wide shift register during the high level of the serial clock, SCK. A , www.ti.com SLLS750A ­ AUGUST 2006 ­ REVISED SEPTEMBER 2006 SDA SCK 11 -Bit Shift Register 8 Bits Data 8 , derived. An external zero-temperature-coefficient resistor must be connected from the RZTC pin of the , MONB exceeds the voltage at RZTC (1.15V). · Photodiode current exceeds 150% of its set value. · Bias


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit OC-192/SDH STM-64
2006 - BLM15HG102SN1

Abstract: 15-V BLM15HG102SN1D ONET1191V STM-64
Text: RZTC 15 PD 14 COMP 2 TS 3 13 MONP EP 6 7 8 9 10 GND FLT 11 , RZTC . For best matching, use the same 28.7-k resistor to GND as used at RZTC . BGV 11 , RZTC RZTC BGV BGV TS TS ENA OLE BIASC Bias Current Generator and , edge of SDA with SCK at a high level, transitioning to a low level. Bits are clocked into an 11 , ­ REVISED SEPTEMBER 2006 SDA 11 -Bit Shift Register SCK 8 Bits Data 3 Bits Addr 3 8


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit BLM15HG102SN1 15-V BLM15HG102SN1D ONET1191V STM-64
2012 - CIRCUIT DIAGRAM APC UPS 700

Abstract: APC UPS CIRCUIT DIAGRAM UPS APC 800 CIRCUIT UPS APC CIRCUIT ups 800 APC UPS 800 CIRCUIT DIAGRAM UPS APC CIRCUIT diagram APC UPS CIRCUIT layout APC BR 800 IN UPS CIRCUIT APC UPS 700 APC BR 600 IN UPS
Text: , 11 , 17, GND 20, 23, EP 9 10 12 13 DIN+ DIN­ RZTC MONB 14 MONP Analog-out 15 16 18 19, 24 , RZTC RZTC Figure 1. Simplified Block Diagram of the ONET1141L PACKAGE The ONET1141L is , 24 Lead QFN 24 Lead QFN " RGE " 8 9 10 11 12 DIN+ DIN - GND GND PIN FUNCTIONS NO. PIN , © 2012, Texas Instruments Incorporated RZTC GND FLT ONET1141L SLLSEB7 ­ MAY 2012 www.ti.com , ADR0, ADR1, DIS, RZTC , SCK, SDA, DIN+, DIN­, FLT, MONB, MONP, COMP, PD, BIAS, OUT+, OUT­ (2) Maximum


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PDF ONET1141L 145mA OC-192/SDH CIRCUIT DIAGRAM APC UPS 700 APC UPS CIRCUIT DIAGRAM UPS APC 800 CIRCUIT UPS APC CIRCUIT ups 800 APC UPS 800 CIRCUIT DIAGRAM UPS APC CIRCUIT diagram APC UPS CIRCUIT layout APC BR 800 IN UPS CIRCUIT APC UPS 700 APC BR 600 IN UPS
2006 - Not Available

Abstract: No abstract text available
Text: RZTC 15 PD 14 COMP 2 TS 3 13 MONP EP 6 7 8 9 10 GND FLT 11 , RZTC . For best matching, use the same 28.7-kΩ resistor to GND as used at RZTC . BGV 11 , RZTC RZTC BGV BGV TS TS ENA OLE BIASC Bias Current Generator and , an 11 -bit-wide shift register during the high level of the serial clock, SCK. A STOP command is , SLLS750A – AUGUST 2006 – REVISED SEPTEMBER 2006 SDA 11 -Bit Shift Register SCK 8 Bits Data


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit
2006 - Not Available

Abstract: No abstract text available
Text: OLE BIASC 8 PDP FAULT Analog Reference RZTC BGV TS RZTC BGV TS ENA OLE BIASC , . Bits are clocked into an 11 -bit-wide shift register during the high level of the serial clock, SCK. A , www.ti.com SLLS750A ­ AUGUST 2006 ­ REVISED SEPTEMBER 2006 SDA SCK 11 -Bit Shift Register 8 Bits Data 8 , derived. An external zero-temperature-coefficient resistor must be connected from the RZTC pin of the , MONB exceeds the voltage at RZTC (1.15V). · Photodiode current exceeds 150% of its set value. · Bias


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit OC-192/SDH STM-64
2005 - Not Available

Abstract: No abstract text available
Text: 4 5 6, 9, 14 7 8 10 11 NAME DIS RZTC TS SCK SDA VCC DIN+ DIN­ FLT MONB TYPE CMOS-in Analog , BIASC PDP FAULT BIAS MONB BIAS MONB MONP MD COMP RZTC TS RZTC TS Bias Current , a high level, transitioning to a low level. Bits are clocked into an 11 -bit wide shift register , . 3 ONET4291VA www.ti.com SLLS674 ­ SEPTEMBER 2005 SDA SCK 11 Bit Shift Register 8 Bits , from the RZTC pin of the device to ground (GND). This resistor is used to generate a precise zero TC


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PDF ONET4291VA SLLS674 20-Pin ONET4291VA
2005 - Not Available

Abstract: No abstract text available
Text: 4 5 6, 9, 14 7 8 10 11 NAME DIS RZTC TS SCK SDA VCC DIN+ DIN­ FLT MONB TYPE CMOS-in Analog , BIASC PDP FAULT BIAS MONB BIAS MONB MONP MD COMP RZTC TS RZTC TS Bias Current , a high level, transitioning to a low level. Bits are clocked into an 11 -bit wide shift register , . 3 ONET4291VA www.ti.com SLLS674 ­ SEPTEMBER 2005 SDA SCK 11 Bit Shift Register 8 Bits , from the RZTC pin of the device to ground (GND). This resistor is used to generate a precise zero TC


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PDF ONET4291VA SLLS674 20-Pin ONET4291VA
2008 - s0319

Abstract: B0285 S0320 VQFN ONET1101L SDD11 STM-64 SLLS883
Text: 16 VCC EP 12 MONB RZTC 13 11 6 GND SDA 10 MONP DIN­ 14 9 , Control Logic Power-On Reset Band-Gap and Analog References RZTC BIAS MONB MONP FLT PD COMP RZTC B0285-01 Figure 1. Block Diagram of the ONET1101L PACKAGE The ONET1101L is , (EP) must be grounded. 2, 8, 11 , 17, EP GND DESCRIPTION 3, 16, 19, 24 VCC Supply 3.3 , differentially 100 terminated to DIN+. Must be AC coupled. 12 RZTC Analog Connect external zero TC


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PDF ONET1101L SLLS883 24-Pin, s0319 B0285 S0320 VQFN ONET1101L SDD11 STM-64 SLLS883
2006 - BLM15HG102SN1D

Abstract: s0212 15-V ONET1191V STM-64 P0031-04
Text: RZTC 15 PD 14 COMP 2 TS 3 13 MONP EP 6 7 8 9 10 GND FLT 11 , RZTC . For best matching, use the same 28.7-k resistor to GND as used at RZTC . BGV 11 , RZTC RZTC BGV BGV TS TS ENA OLE BIASC Bias Current Generator and , edge of SDA with SCK at a high level, transitioning to a low level. Bits are clocked into an 11 , ­ REVISED SEPTEMBER 2006 SDA 11 -Bit Shift Register SCK 8 Bits Data 3 Bits Addr 3 8


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit BLM15HG102SN1D s0212 15-V ONET1191V STM-64 P0031-04
2006 - Not Available

Abstract: No abstract text available
Text: OLE BIASC 8 PDP FAULT Analog Reference RZTC BGV TS RZTC BGV TS ENA OLE BIASC , . Bits are clocked into an 11 -bit-wide shift register during the high level of the serial clock, SCK. A , www.ti.com SLLS750A ­ AUGUST 2006 ­ REVISED SEPTEMBER 2006 SDA SCK 11 -Bit Shift Register 8 Bits Data 8 , derived. An external zero-temperature-coefficient resistor must be connected from the RZTC pin of the , MONB exceeds the voltage at RZTC (1.15V). · Photodiode current exceeds 150% of its set value. · Bias


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PDF ONET1191V SLLS750A 20-Pin 10-Gigabit OC-192/SDH STM-64
2007 - LQW15ANR10J00

Abstract: bgv DIODE BLM15HG102SN1D BLM15HD102SN1 ONET8501V SDD11 STM-64 vcsel receiver
Text: Current MONP Generator FLT & APC PD COMP Cp Adjust RZTC Band-Gap & Analog References BGV Power-On Reset Temperature Sensor TS BIAS MONB MONP FLT PD COMP RZTC BGV TS Figure , 17 16 15 PD DIS 1 RZTC 2 14 COMP ONET 8501V 20 Pin QFN TS 3 13 MONP 6 7 8 9 10 GND FLT 11 BGV DIN- SDA 5 DIN+ 12 MONB GND SCK 4 TERMINAL , shorting pin to GND if disable feature is not used. 2 RZTC Analog Connect external zero TC


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PDF ONET8501V SLLS837B LQW15ANR10J00 bgv DIODE BLM15HG102SN1D BLM15HD102SN1 ONET8501V SDD11 STM-64 vcsel receiver
2007 - Not Available

Abstract: No abstract text available
Text: 16 BIAS VCC VCC DIS 1 RZTC 2 TS 3 SCK 4 SDA 5 15 PD ONET 8501V 20 Pin QFN 14 COMP 13 MONP 12 MONB 11 BGV 6 7 8 9 10 GND TERMINAL FUNCTIONS TERMINAL PIN NO. 1 2 3 4 5 7 8 10 11 12 NAME DIS RZTC TS SCK SDA DIN+ DIN­ FLT BGV MONB Analog-out TYPE Digital-in , COMP RZTC Band-Gap & Analog References BGV Power-On Reset Temperature Sensor TS RZTC BGV TS 2 , bandgap voltage at RZTC . For best matching, use the same 28.7k resistor to GND as used at RZTC . Bias


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PDF ONET8501V SLLS837B
2007 - bgv DIODE

Abstract: No abstract text available
Text: 16 BIAS VCC VCC DIS 1 RZTC 2 TS 3 SCK 4 SDA 5 15 PD ONET 8501V 20 Pin QFN 14 COMP 13 MONP 12 MONB 11 BGV 6 7 8 9 10 GND TERMINAL FUNCTIONS TERMINAL PIN NO. 1 2 3 4 5 7 8 10 11 12 NAME DIS RZTC TS SCK SDA DIN+ DIN­ FLT BGV MONB Analog-out TYPE Digital-in , COMP RZTC Band-Gap & Analog References BGV Power-On Reset Temperature Sensor TS RZTC BGV TS 2 , bandgap voltage at RZTC . For best matching, use the same 28.7k resistor to GND as used at RZTC . Bias


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PDF ONET8501V SLLS837B bgv DIODE
2013 - 6G TOSA

Abstract: ONET1151L
Text: SDA 6 13 MONB RZTC GND DIN± 9 10 11 12 DIN+ GND FLT 7 8 Table 1. PIN , external 4.7-kΩ to 10-kΩ pullup resistor to VCC for proper operation. GND 8, 11 , 17, EP Supply , can source or sink current dependent on register setting. RZTC 12 Analog Connect external , Power-On Reset PSM RZTC TS RZTC Figure 1. Simplified Block Diagram of the ONET1151L 4 , –0.3 VADR0, VADR1, VDIS, VRZTC, Voltage at ADR0, ADR1, DIS, RZTC , SCK, SDA, DIN+, DINâ


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PDF ONET1151L 100-mA 6G TOSA ONET1151L
2005 - SLLS674

Abstract: No abstract text available
Text: 4 5 6, 9, 14 7 8 10 11 NAME DIS RZTC TS SCK SDA VCC DIN+ DIN­ FLT MONB TYPE CMOS-in Analog , BIASC PDP FAULT BIAS MONB BIAS MONB MONP MD COMP RZTC TS RZTC TS Bias Current , a high level, transitioning to a low level. Bits are clocked into an 11 -bit wide shift register , . 3 ONET4291VA www.ti.com SLLS674 ­ SEPTEMBER 2005 SDA SCK 11 Bit Shift Register 8 Bits , from the RZTC pin of the device to ground (GND). This resistor is used to generate a precise zero TC


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PDF ONET4291VA SLLS674 20-Pin ONET4291VA SLLS674
2005 - Not Available

Abstract: No abstract text available
Text: 4 5 6, 9, 14 7 8 10 11 NAME DIS RZTC TS SCK SDA VCC DIN+ DIN­ FLT MONB TYPE CMOS-in Analog , BIASC PDP FAULT BIAS MONB BIAS MONB MONP MD COMP RZTC TS RZTC TS Bias Current , a high level, transitioning to a low level. Bits are clocked into an 11 -bit wide shift register , . 3 ONET4291VA www.ti.com SLLS674 ­ SEPTEMBER 2005 SDA SCK 11 Bit Shift Register 8 Bits , from the RZTC pin of the device to ground (GND). This resistor is used to generate a precise zero TC


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PDF ONET4291VA SLLS674 20-Pin ONET4291VA
2007 - 1820pS

Abstract: LQW15ANR10J00 BLM15HD102SN1 BLM15HG102SN1D ONET8501V SDD11 STM-64 wireless 4-bit data transmission USW-2
Text: Current MONP Generator FLT & APC PD COMP Cp Adjust RZTC Band-Gap & Analog References BGV Power-On Reset Temperature Sensor TS BIAS MONB MONP FLT PD COMP RZTC BGV TS Figure , 17 16 15 PD DIS 1 RZTC 2 14 COMP ONET 8501V 20 Pin QFN TS 3 13 MONP 6 7 8 9 10 GND FLT 11 BGV DIN- SDA 5 DIN+ 12 MONB GND SCK 4 TERMINAL , shorting pin to GND if disable feature is not used. 2 RZTC Analog Connect external zero TC


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PDF ONET8501V SLLS837B 1820pS LQW15ANR10J00 BLM15HD102SN1 BLM15HG102SN1D ONET8501V SDD11 STM-64 wireless 4-bit data transmission USW-2
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