The Datasheet Archive

Top Results (6)

Part ECAD Model Manufacturer Description Datasheet Download Buy Part
TMP89FS60AEFG TMP89FS60AEFG ECAD Model Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/QFP64-P-1414-0.80A Visit Toshiba Electronic Devices & Storage Corporation
TMPM4GNF20FG TMPM4GNF20FG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4GRF10FG TMPM4GRF10FG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP176-2020-0.40-002 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4KLFWAFG TMPM4KLFWAFG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP64-1414-0.80-002 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4MLFWAFG TMPM4MLFWAFG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP64-1414-0.80-002 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4NNF10FG TMPM4NNF10FG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation

"digital delay" 14 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2012 - Not Available

Abstract: No abstract text available
Text: , frequency division, digital and analog delay adjustments, and fourteen ( 14 ) programmable differential , . 16 14.7 CLKout12 & CLKout13 DIGITAL DELAY , . 17 15.5 FIXED DIGITAL DELAY . 17 15.5.1 Fixed Digital Delay - Example , ) . 18 15.6.1 Dynamically Programming Digital Delay


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PDF LMK01801 LMK01801BISQ LMK01801BISQE LMK01801BISQX K01801BI
2011 - varactor 650 manual

Abstract: No abstract text available
Text: Outputs Precision Digital Delay , Fixed or Dynamically Adjustable 25 ps Step Analog Delay Control. 6 , Filter Internal VCO 6 blocks Divider Digital Delay Analog Delay CLKoutX CLKoutX* 6 outputs External Loop , 6 blocks Divider Digital Delay Analog Delay CLKoutX CLKoutX* 6 outputs External Loop Filter , Detector PLL2 Partially Integrated Loop Filter Internal VCO 6 blocks Divider Digital Delay Analog Delay , 6 blocks Internal or external loopback, user programmable Divider Digital Delay Analog Delay CLKoutX


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PDF LMK04906 SNAS589C LMK04906 varactor 650 manual
Not Available

Abstract: No abstract text available
Text: LMK01801 features extremely low residual noise, fre­ quency division, digital and analog delay , . 17 15.5 FIX E D DIGITAL DELAY . 17 15.5.1 Fixed Digital Delay - Example , ) . 18 15.6.1 Dynamically Programming Digital Delay , . 28 16.6.2 CLKoutl 2 _13_H S , Digital Delay Half Shift


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PDF LMK01801 LMK01801
2012 - CVHD-950-122

Abstract: K0490
Text: Digital Delay , Fixed or Dynamically Adjustable 25 ps Step Analog Delay Control. 6 Differential Outputs. Up , Filter Internal VCO 6 blocks Divider Digital Delay Analog Delay CLKoutX CLKoutX* 6 outputs External Loop , Digital Delay Analog Delay CLKoutX CLKoutX* 6 outputs External Loop Filter CLKinX CLKinX* 3 inputs R , Loop Filter Internal VCO 6 blocks Divider Digital Delay Analog Delay CLKoutX CLKoutX* 6 outputs , loopback, user programmable Divider Digital Delay Analog Delay CLKoutX CLKoutX* 6 outputs External Loop


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PDF LMK04906 SNAS589D LMK04906 CVHD-950-122 K0490
2012 - Not Available

Abstract: No abstract text available
Text: delay adjustments, and fourteen ( 14 ) programmable differential outputs: LVPECL, LVDS and LVCMOS (2 , CLKout3* LVDS/ LVPECL/ LVCMOS Mux CLKout6 CLKout6* CLKout7 CLKout7* Digital Delay , to 1045 Digital and Analog (1) (2) Digital Delay will not work if CLKout12_13_DIV = 1 , CLKout11 CLKout12 to CLKout13 Divider ÷4 ÷ 512 ÷ 16 Digital Delay will not work if , groups, one of which has analog and digital delay . See the Functional Configurations for more details


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PDF LMK01801 SNAS573A LMK01801
2012 - Not Available

Abstract: No abstract text available
Text: extremely low residual noise, frequency division, digital and analog delay adjustments, and fourteen ( 14 , CLKout7* Digital Delay Analog Delay LVDS/ LVPECL/ LVCMOS Mux CLKout12 CLKout12 , /LVPECL/ LVCMOS 12 and 13 1 to 1045 Digital and Analog (1) (2) Digital Delay will not , CLKout11 CLKout12 to CLKout13 Divider ÷4 ÷ 512 ÷ 16 Digital Delay will not work if , €¢ Bank B has two clock output groups, one of which has analog and digital delay . See the Functional


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PDF LMK01801 SNAS573 LMK01801
1999 - PS 1025

Abstract: No abstract text available
Text: and odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control, up to 575 ps. 1/2 clock distribution period step digital delay , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04816 LMK04816 sub-200 PS 1025
2012 - Not Available

Abstract: No abstract text available
Text: and odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control, up to 575 ps. 1/2 clock distribution period step digital delay , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04816 sub-200 LMK04816 LMK04816BISQE LMK04816BISQ LMK04816BISQX K04816
2011 - LMK04808

Abstract: LMK04800 LMK0480X
Text: odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control. 14 differential outputs. Up to 26 single ended. - Up to 6 , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04800 sub-200 LMK04808 LMK0480X
2011 - LMK04800

Abstract: LMK0480X Divide by N Counter
Text: , or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control. 14 differential outputs. Up to 26 single ended. - Up to 6 VCXO/Crystal buffered , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04800 LMK04800 SNAS489H sub-200 LMK0480X Divide by N Counter
2012 - Not Available

Abstract: No abstract text available
Text: and odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically , . 18.9.1 Fixed Digital Delay . 18.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 18.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY . 18.9.2.1.1 Absolute Dynamic Digital Delay .


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PDF LMK04906 LMK04906 LMK04906BISQE LMK04906BISQ LMK04906BISQX K04906
1999 - Not Available

Abstract: No abstract text available
Text: and odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control, up to 575 ps. 1/2 clock distribution period step digital delay , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04816 LMK04816 sub-200 LMK04816BISQE LMK04816BISQ LMK04816BISQX K04816
2012 - LMK0480X

Abstract: MAX8799 PS 1025 CVHD-950-122 LCm-200 LMK04806B LMK04800 VXB1-1150-20M480
Text: , or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control. 14 differential outputs. Up to 26 single ended. - Up to 6 VCXO/Crystal buffered , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04800 sub-200 LMK0480X MAX8799 PS 1025 CVHD-950-122 LCm-200 LMK04806B VXB1-1150-20M480
1999 - 1611328

Abstract: No abstract text available
Text: odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically , . 18.9.1 Fixed Digital Delay . 18.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 18.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY . 18.9.2.1.1 Absolute Dynamic Digital Delay .


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PDF LMK04906 LMK04906 LMK04906BISQE LMK04906BISQ LMK04906BISQX K04906 1611328
1999 - vectron crystal oscillator 216* 5 mhz

Abstract: schematic diagram receiver sharp 18911 otn odu
Text: odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically , . 18.9.1 Fixed Digital Delay . 18.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 18.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY . 18.9.2.1.1 Absolute Dynamic Digital Delay .


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PDF LMK04906 LMK04906 vectron crystal oscillator 216* 5 mhz schematic diagram receiver sharp 18911 otn odu
2012 - Not Available

Abstract: No abstract text available
Text: , frequency division, digital and analog delay adjustments, and fourteen ( 14 ) programmable differential , . 6 cycles + digital delay cycles later CLKout12 or CLKout13 outputs rise. 10 cycles later CLKout8 to , (1-8) Clock Distribution Path A Clock Distribution Path B Digital Delay Divider (1-1045) Mux Analog , Ratios 1 to 8 1 to 8 1 to 8 1 to 1045 (1) Delay No No No Digital and Analog (2) A CLKin0/CLKin0 * (1) (2) Digital Delay will not work if CLKout12_13_DIV = 1. See Electrical Characteristics


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PDF LMK01801 SNAS573 LMK01801
2011 - LMK04808

Abstract: LMK04803 LMK04805 LMK04800 Crystek CVHD LMK04806 23hs LMK0480X
Text: odd) LVPECL, LVDS, or LVCMOS programmable outputs Precision digital delay , fixed or dynamically adjustable 25 ps step analog delay control. 14 differential outputs. Up to 26 single ended. - Up to 6 , . 16.9.1 Fixed Digital Delay . 16.9.1.1 FIXED DIGITAL DELAY - EXAMPLE , ) . 16.9.2.1 DYNAMICALLY PROGRAMMING DIGITAL DELAY .


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PDF LMK04800 sub-200 LMK04808 LMK04803 LMK04805 Crystek CVHD LMK04806 23hs LMK0480X
2012 - Not Available

Abstract: No abstract text available
Text: and analog delay adjustments, and fourteen ( 14 ) programmable differential outputs: LVPECL, LVDS and , Path B Digital Delay Divider (1-1045) Mux Analog Delay CLKout13 CLKout13* Mux CLKout12 , 7.5 FIXED DIGITAL DELAY . 7.6 CLOCK OUTPUT SYNCHRONIZATION (SYNC) . , CLKout12 & CLKout13 DIGITAL DELAY . PROGRAMMABLE OUTPUTS . CLOCK DISTRIBUTION , ) Delay No No No Digital and Analog (2) A CLKin0/CLKin0 * (1) (2) Digital Delay will not work


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PDF LMK01801 SNAS573A LMK01801
2012 - Not Available

Abstract: No abstract text available
Text: be forced low. · Time E) Internal one shot pulse ends. 6 cycles + digital delay cycles later CLKout12 , LMK01801 features extremely low residual noise, frequency division, digital and analog delay adjustments , Path B Digital Delay Divider (1-1045) Mux Analog Delay CLKout13 CLKout13* Mux CLKout12 , Divider Ratios 1 to 8 1 to 8 1 to 8 1 to 1045 (1) Delay No No No Digital and Analog (2) A CLKin0/CLKin0 * (1) (2) Digital Delay will not work if CLKout12_13_DIV = 1. See Electrical


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PDF LMK01801 SNAS573 LMK01801
m65843

Abstract: M65381 DIGITAL ECHO IC M65831Ap Echo Processor IC M65831 16 Pin Echo delay digital ICs M65381AP TDA 1106 m6538 m65831ap
Text: MITSUBISHI SOUND PROCESSOR ICS ' xs?e c ^ ^ e' M65831AP/FP á s * DIGITAL ECHO ( DIGITAL DELAY , microphone for karaoke applications. The IC has the largest memory among the digital delay series. As it , _ DIGITAL ECHO ( DIGITAL DELAY ) ( Pin Configuration j Vdd XIN XOUT D1/REQ D2/SCK D3/DATA D4 , c ^ ^ e' ;o > ' .,t a ^ s ü W eC "f " c, '¿e M65831AP/FP DIGITAL ECHO ( DIGITAL DELAY ) ¿ g , PROCESSOR ICS .c \$^o\c,0Se ceí> e vxC M65831AP/FP _ DIGITAL ECHO ( DIGITAL DELAY


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PDF M65831AP/FP M65831A M65830CP M65843AP M65831AP m65843 M65381 DIGITAL ECHO IC M65831Ap Echo Processor IC M65831 16 Pin Echo delay digital ICs M65381AP TDA 1106 m6538
2006 - 5.1 channel surround sound IC

Abstract: 5.1 surround sound amplifier circuits making surround 5.1 AMPLIFIER QSound REJ03F0222-0200 M65857FP PRSP0036GA-A
Text: QSurroundTM5.1 system 6 Output (5.1ch) available Built-in SRAM for digital delay Digital delay Delay time: 20 , M65857FP System Block Diagram M65857FP L in L out C out R out R in 2 ch5.1 ch Digital delay 3D , Digital delay voltage gain Digital delay total harmonic distortion Digital delay maximum output voltage Digital delay output noise voltage Symbol ICC GV THD Vimax Vomax Vno CS GV-D THD-D Vomax-D Vno-D Min - -3 , Level Diagram QSurround 5.1 Mode TM L out Lin C out R out Rin 2ch5.1ch Delay gain Digital delay 3D


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PDF M65857FP REJ03F0222-0200 M65857FP 5.1 channel surround sound IC 5.1 surround sound amplifier circuits making surround 5.1 AMPLIFIER QSound PRSP0036GA-A
1997 - m65843fp

Abstract: simple surround circuit diagram m65843 m65830bp 24P4 M65830BFP murata Ceramic Disc Capacitors 200MG
Text: / FP *1 MODE SWITCH + DIGITAL DELAY -1 SLch Out -1 SRch Out EFFECT , ub P R EThis isic olitmits are s ; M65830BP/FP etr ice Not param e som DIGITAL DELAY , olitmits are s ; M65830BP/FP etr ice Not param e som DIGITAL DELAY Pin Configuration 1 , P R EThis isic olitmits are s ; M65830BP/FP etr ice Not param e som DIGITAL DELAY , som DIGITAL DELAY PIN DESCRIPTION NO. Symbol Name 1 VDD Digital VDD 2 XIN


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PDF M65830BP/FP M65830B m65843fp simple surround circuit diagram m65843 m65830bp 24P4 M65830BFP murata Ceramic Disc Capacitors 200MG
2006 - d4164

Abstract: No abstract text available
Text: 14 SRVOL OUT 1 L+R 2 L-R Digital delay Modified BNR SW-SW 1 SWVOL 1 2 2 3 2 , SRtrim SWtrim 2 SRVOL 14 SRVOL OUT 1 L+R 2 L-R Digital delay Modified BNR SW-SW , Pseudo SL stereo SR 2 3 1 SRtrim SWtrim 2 SRVOL 14 SRVOL OUT 1 L+R 2 L-R Digital , , R, C) Mode Switch 2 3 4 5 6 7 8 9 10 11 12 13 14 5.1ch Analog Input for Dolby Digital C, SL, SR, SW ch master volume C, SL, SR, SW ch Trimmer RAM for digital delay Circuit for space surround and echo


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PDF M62464BFP REJ03F0218-0200 M62464BFP CA94103-4813, d4164
2008 - M65857FP

Abstract: PRSP0036GA-A QSound
Text: Built-in QSurroundTM5.1 system 6 Output (5.1ch) available Built-in SRAM for digital delay Digital delay , C out R out R in Digital delay 2 ch5.1 ch 3D filter SL out SR out SW out QSurround , Bypass, L/Rch Vi = 200mVrms, f = 1kHz Bypass, L/Rch Digital delay voltage gain GV-D -3 0 3 dB Digital delay total harmonic distortion THD-D - 0.6 1.8 % Digital delay maximum output voltage Vomax-D 0.7 1.0 - Vrms Digital delay output noise


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PDF M65857FP REJ03F0222-0201 M65857FP PRSP0036GA-A QSound
31A-5101

Abstract: 34A-100 Delay Modules til 31a 31A-5151 431a 300C 34A-010 digital delay 31-A-5101
Text:  DIGITAL DELAY MODULES 31 A, 34A Series 5 Tap and Triple Independent 14 Pin Moulded DIP DUAL-IN-LINE PACKAGE (TOP VIEW) □ Schottky TTL buffered □ 14 pin package □ Low profile □ TTL , loads per unit max. 9 DIGITAL DELAY MODULES 31 A, 34A Series 5 Tap and Triple Independent 14 Pin , is greater 11 DIGITAL DELAY MODULES 31 A, 34A Series 5 Tap and Triple Independent 14 Pin Moulded , description The 31A and 34A series of Digital Delay Modules are Schottky TTL buffered delay lines providing


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PDF termin01 4A-010 4A-060 4A-100 31A-5101 34A-100 Delay Modules til 31a 31A-5151 431a 300C 34A-010 digital delay 31-A-5101
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