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ISL24010EVZ-T Intersil Corporation Octal Voltage Level Shifter for TFT/LCD Panels; High Voltage TFT-LCD Logic Driver; visit Intersil
ISL24010EVZ Intersil Corporation Octal Voltage Level Shifter for TFT/LCD Panels; High Voltage TFT-LCD Logic Driver; visit Intersil
SN74AVC2T872YFPR Texas Instruments Voltage-Level Shifter for IC-USB Interface 12-DSBGA -40 to 85 visit Texas Instruments Buy
TXS0202YZPR Texas Instruments Voltage-Level Shifter for IC-USB Interface 8-DSBGA -40 to 85 visit Texas Instruments Buy
ISL24010IVZ Intersil Corporation Octal Voltage Level Shifter for TFT/LCD Panels; High Voltage TFT-LCD Logic Driver; TSSOP20; Temp Range: -40° to 85°C visit Intersil Buy
ISL24011IVZ-T Intersil Corporation Octal Voltage Level Shifter for TFT/LCD Panels; High Voltage TFT-LCD Logic Driver; TSSOP20; Temp Range: -40° to 85°C visit Intersil Buy

vhdl code for 4 bit barrel shifter

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verilog code for barrel shifter

Abstract: vhdl code for 8 bit barrel shifter DIN 10 FF SAM SAMV 4 10 REFCLK RST NI-DRU DOUT_10 10-Bit Barrel Shifter EN_10 16 16-Bit Barrel Shifter To user application DOUT_16 EN_16 X875 , decoder. The first barrel shifter has a 10-bit output that can be easily coupled to an 8B/10B or 4B/5B decoder (both not included in the reference design). The second barrel shifter has a 16-bit output and is specifically designed for 8-bit protocols, such as SONET/SDH. Other barrel shifters can be designed by the
Xilinx
Original
XAPP875 XAPP868 verilog code for barrel shifter vhdl code for 8 bit barrel shifter vhdl code for 4 bit barrel shifter vhdl code Pseudorandom Streams Generator vhdl code for loop filter of digital PLL DS202

vhdl code for 8 bit barrel shifter

Abstract: verilog code for barrel shifter decoder. The first barrel shifter has a 10-bit output that can be easily coupled to an 8B/10B or 4B/5B decoder (both not included in the reference design). The second barrel shifter has a 16-bit output and is specifically designed for 8-bit protocols, such as SONET/SDH. Other barrel shifters can be designed by the , Barrel Shifter EN_10 16 16-Bit Barrel Shifter To user application DOUT_16 EN_16 X875 , oldest. DOUT_10[9:0] Out 10-bit barrel shifter data output. DOUT_10 is synchronous to REFCLK
Xilinx
Original
vhdl code for 16 prbs generator ML523 vhdl code for phase frequency detector 8 bit barrel shifter vhdl code verilog code of parallel prbs pattern generator prbs pattern generator using vhdl

vhdl code for 8 bit barrel shifter

Abstract: vhdl code for 4 bit barrel shifter number of bit positions in a single clock cycle. For example, an eight-bit barrel shifter could shift , 8-bit barrel shifter is preceded by two 8-bit 4 x 1 MUXs to move the appropriate byte into the 8-bit , barrel shifter. This application note and accompanying Barrel 32 reference design are intended for , , multiplexers are used to place the bits correctly for proper storage. Thus, a barrel shifter is implemented by , eight flip-flops and eight 8-to-1 multiplexers; a 32-bit barrel shifter requires 32 registers and
Xilinx
Original
verilog code for 16 bit barrel shifter 32 bit barrel shifter vhdl vhdl code for barrel shifter verilog code for 64 bit barrel shifter barrel shifter using verilog 8 bit barrel shifter XAPP195

siemens spc 2

Abstract: vhdl code for 4 bit barrel shifter a barrel shifter. FASICs currently account for the largest market segment and will retain this , handled directly on the DSP. A 36-bit barrel shifter as well as an exponent evaluation unit allow , Two 36-bit accumulators with shift/rotate function Zero overhead looping Support for division and , q q q q q q Two additional 36-bit accumulators Accumulator swap function 36-bit barrel , ] BARREL SHIFTER PL ALU/SHIFTER A0 E AOH AOL A1H A1L A1 E ACCUMULATORS COMPUTATION UNIT LC
Siemens
Original
siemens spc 2 alu project based on verilog verilog code for 16 bit shifter verilog code for 4 bit barrel shifter synopsys for vhdl based barrel shifter direct digital synth vhdl code

verilog code for modified booth algorithm

Abstract: vhdl code for Booth multiplier synthesized with the design. Templates for the SIGNED_MULT_18X18 module are provided in VHDL and Verilog code , Embedded Multipliers in Spartan-3 FPGAs VHDL Instantiation Template - Component Declaration for , multipliers. For example, Figure 5 shows how a 22x16 multiplier could be implemented. The 22-bit value is decomposed into an 18-bit signed value and a 4-bit unsigned value from the LSBs. Two partial products are , by the 4-bit unsigned section. The second is a 34-bit signed product, formed by multiplying the 16-bit
Xilinx
Original
verilog code for modified booth algorithm vhdl code for Booth multiplier vhdl code for pipelined matrix multiplication verilog code for matrix multiplication 8 bit booth multiplier vhdl code booth multiplier code in vhdl XAPP467 XC3S50

vhdl code for shift register using d flipflop

Abstract: multiplier accumulator MAC code VHDL algorithm Subract Ø 4 48-bit Accumulators Ø 8-bit, 16-bit SIMD Add, Sub, Mult, MAC, Shift, Saturation Ø Barrel Shift , bit saturation, 1 32-bit add, 2 16-bit adds, or 4 8-bit adds. The Shifter Unit can handle both signed , ) q Comparison instructions q For add, sub types of instructions, supports 1 32-bit, 2 16-bit, 4 8-bit , Equivalent Instruction/second in 8-Bit Data Format Ø 300 Million MAC/second Ø 150 MHz Clock Frequency for , based Design Ø VHDL Based RTL Code Ø Flexible Number and Type of Execution Unit Ø Ease -of-Synthesis
3DSP
Original
vhdl code for shift register using d flipflop multiplier accumulator MAC code VHDL algorithm vhdl code for transpose memory multiplier accumulator MAC 16 BITS using code VHDL multiplier accumulator MAC code VHDL 16x16 barrel shifter with flipflop

ieee floating point alu in vhdl

Abstract: rockwell collins connector Datapath · · · · · 32-bit ALU Floating point disassembly/assembly 32-bit barrel shifter Count , includes a 32-bit ALU, a barrel shifter, a 24-element 32-bit wide register file, a test interface unit and , sizing from 8-,16- to 32-bit Write buffer HLD/HAK bus arbitration Easily customized for other on-chip , Reg 32-bit ALU Shifter Mux Stack Vector ADDRESS Mux Mux Instr. Reg Parser , extended bytecodes for embedded operations. The JEMCore improves Java execution efficiency by eliminating
aJile Systems
Original
ieee floating point alu in vhdl rockwell collins connector java card aJile Systems register file vhdl code for 16 bit barrel shifter PBN000504012001

16 bit single cycle mips vhdl

Abstract: vhdl code for 8 bit barrel shifter : 16-bit address and 16-bit data busses for each space (I, X, Y) Data Calculation Unit (DCU) 16 x 16-bit parallel Multiplier 40-bit Barrel Shifter Unit 40-bit Arithmetic and logic Unit Two 40-bit extended , maximum address registers for modulo addressing Program Control Unit (PCU) 16-bit Program Counter 3 , The D950-Core is a programmable 16-bit / single MAC DSP core used in combination with memories and custom or standard peripherals, implemented in the same silicon die for custom Application Specific DSP
STMicroelectronics
Original
16 bit single cycle mips vhdl vhdl code for 16 bit dsp processor CODE VHDL TO ISA BUS INTERFACE d950 ieee floating point multiplier vhdl audio file in vhdl code D950-DSP D950-C ST18952

vhdl code for 8 bit barrel shifter

Abstract: 16 bit single cycle mips vhdl ACCUMULATORS 56-BIT BARREL SHIFTER JTAG 6 OnCETM MODD/IRQD MODC/IRQC MODB/IRQB MODA/IRQA 23 , Division DSP56300 Architecture · Code Compatible with DSP56000 Architecture ­ Migration path for , clock cycle ­ Fully Pipelined 24 x 24 Parallel Multiplier-Accumulator · 56-bit Parallel Barrel Shifter ­ Multibit shift instructions ­ Bit-field insert/extract for efficient stream parsing ­ Fast , MUX 56 PIPELINE REGISTERS PIPELINE REGISTERS BARREL SHIFTER ACCUMULATOR, ROUNDING, AND
Motorola
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MOTOROLA DSP56300 architecture architectural block diagram of motorola 563xx pga 132 packaging 563xx 32 bit single cycle mips vhdl TQFP112 PQFP/132 PBGA/208 320C56/7 320C5X

verilog code 8 bit LFSR in descrambler

Abstract: XAPP288 offset register controls a barrel shifter that extracts the ten-bit output word from a 19-bit wide piece , use an embedded 18 x 18 multiplier to implement most of the barrel shifter.[4] The files , to is used to generate the tenth bit of the barrel shifter. If it is a Virtex-II design and a free , .601-5 for 4 x 3 and 16 x 9 aspect ratio 4:2:2 component digital video [1][2] · ANSI/SMPTE 244M for , the highest SDI bit rate. 4 www.xilinx.com 1-800-255-7778 XAPP288 (1.0) October 19, 2001
Xilinx
Original
XAPP298 verilog code 8 bit LFSR in descrambler verilog code 8 bit LFSR in scrambler SDI descrambler SDI scrambler verilog code of 4 bit comparator vhdl code 4 bit LFSR 259M-1997 CLC011 CY7C9335 XAPP299

vhdl program coding for alarm system

Abstract: verilog code for barrel shifter Synthesis for FPGAs 2-2 2-2 2-2 2-2 2-3 2-3 v HDL Synthesis for FPGAs Selecting VHDL , . Using Schematic Design Hints with HDL Designs . Barrel Shifter Design , , the design flow for processing ASIC HDL code is slightly different from the flow used to process HDL code written specifically for FPGAs. Figure 1-1 shows the design flow for an FPGA design. This design , for FPGA implementation. Entering Your Design When coding in HDL, you should create efficient code
Xilinx
Original
XC4000 XC3000 XC3100 XC4025 vhdl program coding for alarm system modified carry select adder using d-latch verilog code vhdl projects abstract and coding abstract 8-bit multiplexer using xilinx ALU 4 BIT ALU design with vhdl code using structural 8 BIT ALU design with vhdl code using structural

VHDL code for traffic light controller

Abstract: vhdl code for 4 bit barrel shifter 16-bit barrel shifter 6.0 Demultiplexer 7.0 Data register 8.0 Parallel to serial shift register , 3.0 Multiplexer The source code is - Philips CPLD Applications - 6-bit 4 to 1 multiplexer - , of commonly used digital functions 5.0 Barrel shifter The source is - 16 bit barrel , of 4-bit shift register The vhdl source is - Philips Applications - Structural implementation , - Philips CPLD Applications - 4-bit gray code counter - Sept 3, 1996 entity gray4 is port
Philips Semiconductors
Original
VHDL code for traffic light controller vhdl code for 16 BIT BINARY DIVIDER vhdl code for demultiplexer schematic counter traffic light Code vhdl traffic light vhdl code for a 9 bit parity generator

16 BIT ALU design with verilog/vhdl code

Abstract: verilog code for barrel shifter Shifter Design. 16-bit Barrel Shifter (VHDL). 16-bit Barrel Shifter (Verilog) . 16-bit Barrel Shifter with Two Levels of Multiplexers (VHDL). 16-bit Barrel Shifter with Two Levels of Multiplexers (Verilog , ). 4-bit Shift Register Using Unbonded I/O VHDL Example
Xilinx
Original
16 BIT ALU design with verilog/vhdl code 8 BIT ALU using modelsim want abstract 8 BIT ALU design with verilog/vhdl code 16x4 ram vhdl spartan 3a verilog code for jk flip flop XC2064 XC3090 XC4005 XC5210 XC-DS501 XC5200

full subtractor circuit using xor and nand gates

Abstract: vhdl code for multiplexer 64 to 1 using 8 to 1 , comparator, and normalizing barrel shifter, is available for applications needing high precision and wide , machines, random logic, PLA code files as well as simulation models and highcoverage test vectors for logic , MxN Barrel Shifter - Zero Detectors - M ultiplier-Adder (unsigned or two's complement) V L S Ü CH N , MultiplierAdder - High-speed Priority Encoder - Denormalizing Barrel Shifter - Normalizing Barrel Shifter 3 , . unused portions of the affected functional units and does not build logic for non-existent bit locations
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OCR Scan
full subtractor circuit using xor and nand gates vhdl code for multiplexer 64 to 1 using 8 to 1 ALU 74181 verilog 32 bit ALU vhdl code full subtractor implementation using 4*1 multiplexer 32 bit barrel shifter using two level multiplexer VGT350/353 VSC350/370

verilog code for barrel shifter

Abstract: decoder in verilog with waveforms and report Barrel Shifter Design. 2-18 16-bit Barrel Shifter (VHDL). 2-18 16-bit Barrel Shifter (Verilog) . 2-20 16-bit Barrel Shifter with Two Levels of Multiplexers (VHDL) 2-23 16-bit Barrel Shifter with Two Levels of Multiplexers (Verilog) 2-25 Implementing , /EX/XLA/XL/XV and Spartan Only) 4-81 4-bit Shift Register Using Unbonded I/O VHDL Example . 4-81
Xilinx
Original
decoder in verilog with waveforms and report 32 BIT ALU design with verilog/vhdl code fd32ce vhdl code for multiplexer 16 to 1 using 4 to 1 future scope of barrel shifter structural vhdl code for multiplexers

16 BIT ALU design with verilog/vhdl code

Abstract: verilog code for barrel shifter . Barrel Shifter Design. 16-bit Barrel Shifter - VHDL . 16-bit Barrel Shifter - Verilog . 16-bit Barrel Shifter with Two Levels of Multiplexers - VHDL. 16-bit Barrel Shifter with Two Levels of Multiplexers - Verilog , ). VHDL - 4-bit Shift Register Using Unbonded I/O. Verilog - 4-bit Shift Register
Xilinx
Original
verilog code for 4-bit alu with test bench verilog code for barrel shifter and efficient add verilog code for ALU verilog code for ALU implementation testbench code for 4bits ALU pdf for barrel shifter design from computer archive

verilog code for barrel shifter

Abstract: 16 BIT ALU design with verilog/vhdl code ). 2-16 Using Schematic Design Hints with HDL Designs . 2-17 Barrel Shifter Design. 2-17 16-bit Barrel Shifter - VHDL . 2-17 16-bit Barrel Shifter - Verilog . 2-20 16-bit Barrel Shifter with Two Levels of Multiplexers - VHDL 2-23 16-bit Barrel Shifter , /EX/XLA/XL/XV and Spartan Only) 4-80 VHDL - 4-bit Shift Register Using Unbonded I/O
Xilinx
Original
full vhdl code for alu verilog code for implementation of rom verilog code for 32 BIT ALU implementation vhdl code of carry save adder Device Reliability report XILINX barrel shifter with flip flop

verilog code for 32 bit risc processor

Abstract: verilog code arm processor addressing 4G-byte linear address · 32-bit barrel shifter · EmbeddedICETM on-chip debugger To external , interface SDRAM memory interface ARM7TDMI 4-channel DMA controller 32-bit RISC CPU Two 16C550-style UARTs 8K unified cache Two 16-bit timers 32-bit watchdog timer Barrel shifter Hardware multiplier 16 , ARM7TDMI RISC Processor · Best-selling 32-bit RISC processor · Binary and source code compatible with , 16K-byte (4Kx32) scratchpad RAM for storing timing critical code or data. The scratchpad is
Triscend
Original
verilog code for 32 bit risc processor verilog code arm processor ARM7 verilog source code arm7 architecture 16bit microprocessor using vhdl a7s20 455M-

vhdl code for 4 bit barrel shifter

Abstract: multiplier accumulator MAC code VHDL algorithm DSP platform for the most demanding DSP applications. The VHDL RTL code based core can be easily , saturation, 32 bit saturation, 16 bit saturation, 1 32-bit add, 2 16-bit adds, or 4 8-bit adds. The Shifter , For add, sub types of instructions, supports 1 32-bit, 2 16-bit, 4 8-bit packed operations Shift , , Clear, Extract, Insert, Pack Ø Complex Multiply, Addsub Instruction Ø 24x16 Multiply, MAC Ø 4 48-bit Accumulators Ø 8-bit, 16-bit SIMD Add, Sub, Mult, MAC, Shift, Saturation Ø Barrel Shift, Signed, Unsigned Ø ·
3DSP
Original
vhdl code for scaling accumulator 16X16 BIT RISC PROCESSOR

4 BIT ALU design with vhdl code using structural

Abstract: 8 BIT ALU design with vhdl code using structural in the meantime a different application code and doesn't have to wait for the 100 clock cycles. The , industry`s fastest SCP for FPGAs. The MicroBlaze SCP can be customized for any application. Its barrel , commercial IP Cores can be evaluated. For all free cores, the VHDL and the C-Code (TCP/IP stack) are , Logical/ Shift Barrel Shifter r31 Register File 32 x 32bit Control Unit Data Bus Controller , available in VHDL code. It is also possible to use a netlist instead. XAPP529 (v1.3) May 12, 2004
Xilinx
Original
Insight Spartan-II demo board 32 bit risc processor using vhdl microblaze ethernet 32 bit alu using vhdl MULT18X18 idct acceleration
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