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vco+3+output+ULTRASONIC

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Abstract: PACKAGE (TOP VIEW) LOGIC VDD SELECT VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 , Detector 6 BIAS PFD OUT VCO INHIBIT SELECT 12 13 10 2 VoltageControlled Oscillator 3 , control. When PFD INHIBIT is high, PFD output is in the high-impedance state, see Table 3. PFD OUT 6 , low (see Table 2). VCO GND 11 VCO OUT 3 VCO VDD 14 BIAS GND for VCO. O VCO , value. The bias resistor value for the minimum temperature coefficient is nominally 3.3 k with 3-V at Texas Instruments
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TLC2932IPWLE TLC2932 TLC2932I SLAS097E
Abstract: PACKAGE (TOP VIEW) LOGIC VDD SELECT VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 , Detector 6 BIAS PFD OUT VCO INHIBIT SELECT 12 13 10 2 VoltageControlled Oscillator 3 , control. When PFD INHIBIT is high, PFD output is in the high-impedance state, see Table 3. PFD OUT 6 , low (see Table 2). VCO GND 11 VCO OUT 3 VCO VDD 14 BIAS GND for VCO. O VCO , value. The bias resistor value for the minimum temperature coefficient is nominally 3.3 k with 3-V at Texas Instruments
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Radian "voltage controlled oscillator"
Abstract: PACKAGE (TOP VIEW) LOGIC VDD SELECT VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 , Detector 6 BIAS PFD OUT VCO INHIBIT SELECT 12 13 10 2 VoltageControlled Oscillator 3 , control. When PFD INHIBIT is high, PFD output is in the high-impedance state, see Table 3. PFD OUT 6 , low (see Table 2). VCO GND 11 VCO OUT 3 VCO VDD 14 BIAS GND for VCO. O VCO , value. The bias resistor value for the minimum temperature coefficient is nominally 3.3 k with 3-V at Texas Instruments
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Abstract: 55 MHz (VDD = 3 V +5%, TA = ­205C to 755C, x1 Output) 30 MHz to 60 MHz (VDD = 3.3 V +5%, TA = ­205C , OUT FIN -A FIN -B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCO VDD RBIAS VCO IN VCO , BIAS 12 13 10 2 Voltage Controlled Oscillator 3 FIN-A FIN-B PFD INHIBIT VCO OUT Terminal , VCO GND VCO IN RBIAS VCO VDD NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 I I I I I O I I O I/O DESCRIPTION , . TI.COM 3 TLC2933A HIGH PERFORMANCE PHASE LOCKED LOOP SLES149 - OCTOBER 2005 FIN-A FIN-B VOH Texas Instruments
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TLC2933IPW 14-PIN ISO/TS16949
Abstract: Frequency: 13 MHz to 32 MHz (VDD = 3 V +5%, TA = ­205C to 755C, x1 Output) 13 MHz to 35 MHz (VDD = 3.3 V , SELECT VCO OUT FIN -A FIN -B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 , 10 Voltage Controlled Oscillator 3 VCO OUT 2 Terminal Functions TERMINAL I/O , is high, the VCO output frequency is ×1/2 and when low. The output frequency is ×1. VCO OUT 3 , PLL system, other types of phase detectors should be used. TI.COM 3 TLC2932A HIGH Texas Instruments
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TLC2932IPW 3.3kOhm all type resister MTSS001C TLC2932AIPW SLES150
Abstract: 32 MHz (VDD = 3 V +5%, TA = ­205C to 755C, x1 Output) 13 MHz to 35 MHz (VDD = 3.3 V +5%, TA = ­205C , OUT FIN -A FIN -B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCO VDD RBIAS VCO IN VCO , BIAS 12 13 10 2 Voltage Controlled Oscillator 3 FIN-A FIN-B PFD INHIBIT VCO OUT Terminal , VCO GND VCO IN RBIAS VCO VDD NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 I I I I I O I I O I/O DESCRIPTION , PLL system, other types of phase detectors should be used. TI.COM 3 TLC2932A HIGH Texas Instruments
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Abstract: 32 MHz (VDD = 3 V +5%, TA = ­205C to 755C, x1 Output) 13 MHz to 35 MHz (VDD = 3.3 V +5%, TA = ­205C , OUT FIN -A FIN -B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCO VDD RBIAS VCO IN VCO , BIAS 12 13 10 2 Voltage Controlled Oscillator 3 FIN-A FIN-B PFD INHIBIT VCO OUT Terminal , VCO GND VCO IN RBIAS VCO VDD NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 I I I I I O I I O I/O DESCRIPTION , PLL system, other types of phase detectors should be used. TI.COM 3 TLC2932A HIGH Texas Instruments
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Abstract: Frequency: 30 MHz to 55 MHz (VDD = 3 V +5%, TA = â'"205C to 755C, x1 Output) 30 MHz to 60 MHz (VDD = 3.3 , ) LOGIC VDD SELECT VCO OUT FIN â'A FIN â'B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 , PFD OUT VCO INHIBIT SELECT 12 13 10 Voltage Controlled Oscillator 3 VCO OUT 2 , output frequency is ×1. VCO OUT 3 O VCO output. When the VCO INHIBIT is high, VCO output is , clock recovery PLL system, other types of phase detectors should be used. TI.COM 3 TLC2933A Texas Instruments
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Abstract: to 55 MHz (VDD = 3 V ±5%, TA = ­ 20°C to 75°C) Phase-Frequency Detector (PFD) Section Includes a , VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCO VDD BIAS VCO , VoltageControlled Oscillator 3 VCO OUT AVAILABLE OPTIONS PACKAGE TA ­ 20°C to 75°C SMALL OUTLINE (PW) TLC2933PWLE , 11 12 10 3 14 I I O I O I I/O I I I DESCRIPTION Bias supply. An external resistor (RBIAS) between VCO , the minimum temperature coefficient is nominally 2.2 k with 3-V VDD and nominally 2.4 k with 5-V VDD Texas Instruments
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TLC2933 SLAS136A TLC2933IPWLE TLC2933IPWR
Abstract: PACKAGE (TOP VIEW) LOGIC VDD SELECT VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 , Detector 6 BIAS PFD OUT VCO INHIBIT SELECT 12 13 10 2 VoltageControlled Oscillator 3 , control. When PFD INHIBIT is high, PFD output is in the high-impedance state, see Table 3. PFD OUT 6 , low (see Table 2). VCO GND 11 VCO OUT 3 VCO VDD 14 BIAS GND for VCO. O VCO , value. The bias resistor value for the minimum temperature coefficient is nominally 3.3 k with 3-V at Texas Instruments
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Abstract: Output) 37 MHz to 55 MHz (VDD = 3 V ±5%, TA = ­ 20°C to 75°C) Phase-Frequency Detector (PFD) Section , (TOP VIEW) LOGIC VDD TEST VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 , INHIBIT TEST 12 13 10 2 VoltageControlled Oscillator 3 VCO OUT AVAILABLE OPTIONS PACKAGE TA SMALL , VCO OUT VCO VDD NO. 13 4 5 7 1 8 9 6 2 11 12 10 3 14 I I O I O I I/O I I I DESCRIPTION Bias supply. An , , the bias resistor value for the minimum temperature coefficient is nominally 2.2 k with 3-V VDD and Texas Instruments
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SLAS136B
Abstract: Frequency: 43 MHz to 100 MHz (VDD = 5 V ±5%, TA = -20°C to 75°C, ×1 Output) 37 MHz to 55 MHz (VDD = 3 V ±5% , 1 2 3 4 5 6 7 PW PACKAGE (TOP VIEW) 14 13 12 11 10 9 8 D D D D D VCO VDD BIAS VCO IN VCO , VoltageControlled Oscillator 3 VCO OUT AVAILABLE OPTIONS PACKAGE TA SMALL OUTLINE (PW) -20°C to 75 , 10 3 14 I I O I O I I/O I I I DESCRIPTION Bias supply. An external resistor (RBIAS) between VCO VDD , the minimum temperature coefficient is nominally 2.2 k with 3-V VDD and nominally 2.4 k with 5-V VDD Texas Instruments
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Abstract: Output) 37 MHz to 55 MHz (VDD = 3 V ±5%, TA = ­ 20°C to 75°C) Phase-Frequency Detector (PFD) Section , (TOP VIEW) LOGIC VDD TEST VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 , INHIBIT TEST 12 13 10 2 VoltageControlled Oscillator 3 VCO OUT AVAILABLE OPTIONS PACKAGE TA SMALL , VCO OUT VCO VDD NO. 13 4 5 7 1 8 9 6 2 11 12 10 3 14 I I O I O I I/O I I I DESCRIPTION Bias supply. An , , the bias resistor value for the minimum temperature coefficient is nominally 2.2 k with 3-V VDD and Texas Instruments
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Abstract: Output) 37 MHz to 55 MHz (VDD = 3 V ±5%, TA = -20°C to 75°C) Phase-Frequency Detector (PFD) Section , (TOP VIEW) LOGIC VDD TEST VCO OUT FIN -A FIN -B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 , Oscillator 3 VCO OUT AVAILABLE OPTIONS PACKAGE TA SMALL OUTLINE (PW) -20°C to 75 , inhibit control. When VCO INHIBIT is high, VCO OUT is low (see Table 1). VCO OUT 3 O VCO , nominally 2.2 k with 3-V VDD and nominally 2.4 k with 5-V VDD. For the lock frequency range refer to the Texas Instruments
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Abstract: Frequency: 13 MHz to 32 MHz (VDD = 3 V +5%, TA = ­205C to 755C, x1 Output) 13 MHz to 35 MHz (VDD = 3.3 V , SELECT VCO OUT FIN -A FIN -B PFD OUT LOGIC GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 , 10 Voltage Controlled Oscillator 3 VCO OUT 2 Terminal Functions TERMINAL I/O , is high, the VCO output frequency is ×1/2 and when low. The output frequency is ×1. VCO OUT 3 , PLL system, other types of phase detectors should be used. TI.COM 3 TLC2932A HIGH Texas Instruments
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TLC2932AIPWG4 TLC2932AIPWR TLC2932AIPWRG4
Abstract: °C, ×1 Output) 37 MHz to 55 MHz (VDD = 3 V ±5%, TA = ­ 20°C to 75°C) Phase-Frequency Detector (PFD , PW PACKAGE (TOP VIEW) LOGIC VDD TEST VCO OUT FIN ­ A FIN ­ B PFD OUT LOGIC GND 1 2 3 , Oscillator 3 VCO OUT AVAILABLE OPTIONS PACKAGE TA SMALL OUTLINE (PW) ­ 20°C to 75 , inhibit control. When VCO INHIBIT is high, VCO OUT is low (see Table 1). VCO OUT 3 O VCO , nominally 2.2 k with 3-V VDD and nominally 2.4 k with 5-V VDD. For the lock frequency range refer to the Texas Instruments
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Abstract: ), and Qc(0:3) outputs in a low state. All outputs are held low with input clock turned off. fselFB1 , 2 3 4 5 6 7 8 9 10 11 12 13 39 38 37 36 35 34 33 32 31 30 29 28 27 VSSb , ) AND Y Gate 5 5 Qb(0:4) AND Y Gate 4 4 Qc(0:3) 1 B QFB 5 250K , 0 Outputs Qc(0:3) VCO_sel0 fsela fselb fselc Qa(0:4) Qb(0:4) Qc(0:3 , VCO/16 VCO/16 VCO/24 1 1 1 1 VCO/8 VCO/8 VCO/12 Table 2 Table 3 International Microcircuits
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Z9975 150MH VCO/32 VCO/48 Z9975CA
Abstract: (excluding the PLL). An Output Enable, OE, input pin is available for shutting Qa(0:4), Qb(0:4), and Qc(0:3 , PLL_EN fsela TClk_Sel TClk0 TClk1 VCO_Sel1 VDDI VDDA 1 2 3 4 5 6 7 8 9 10 11 12 13 , ) AND Y B Gate 1 4 4 Qc(0:3) 1 QFB B TCLK_sel 5 250K VDD 0 250K , 1 0 0 1 1 0 1 1 Qb(0:4) Inputs Outputs Qc(0:3) VCO_sel0 fsela fselb fselc Qa(0:4) Qb(0:4) Qc(0:3) VCO/4 VCO/8 0 0 0 0 VCO/2 VCO/2 Cypress Semiconductor
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Abstract: for shutting Qa(0:4), Qb(0:4), and Qc(0:3) outputs in a low state. All outputs are held low with input , 47 46 45 44 43 42 41 40 1 2 3 4 5 6 7 8 9 10 11 12 13 39 38 37 36 35 34 33 32 31 30 29 28 27 VSSb QB1 , 4 Qc(0:3) FB_In PLL_EN VCO_sel0 250K 0 1 C /2 Reset# 250K Div. by 2 0 1 1 QFB fselb , /2 VCO/4 VCO/4 VCO/2 VCO/2 VCO/4 VCO/4 VCO/4 VCO/4 VCO/8 VCO/8 VCO/4 VCO/4 VCO/8 VCO/8 Qc(0:3) VCO/4 , /4 VCO/8 VCO/8 VCO/4 VCO/4 VCO/8 VCO/8 VCO/8 VCO/8 VCO/16 VCO/16 VCO/8 VCO/8 VCO/16 VCO/16 Qc(0:3 International Microcircuits
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Abstract: (excluding the PLL). An Output Enable, OE, input pin is available for shutting Qa(0:4), Qb(0:4), and Qc(0:3 , PLL_EN fsela TClk_Sel TClk0 TClk1 VCO_Sel1 VDDI VDDA 1 2 3 4 5 6 7 8 9 10 11 12 13 , Gate 5 5 Qb(0:4) AND Y B Gate 1 4 4 Qc(0:3) 1 QFB B TCLK_sel 5 , ) Inputs Outputs Qc(0:3) VCO_sel0 fsela fselb fselc Qa(0:4) Qb(0:4) Qc(0:3 , VCO/8 VCO/8 VCO/12 Table 2 Table 3 Pin Description PIN No. Pin Name I/O Cypress Semiconductor
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