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Abstract: 2 IrDA IrDAASK UART 16550 1 L.Ã- 0+70 PDF256 PDF256 http , 3.3V/12V UART(16550) LCD 640 x240 LCDC PC Single STN CRT output DRAM ... Original
datasheet

2 pages,
17.11 Kb

STLC7546 SH7729 SH7709A SH7709 PCMCIA SRAM Card 16550 uart lcd 640 uart 16550 datasheet abstract
datasheet frame
Abstract: Software Timer 16550 UART 16550 UART PCI Bus PCI Requests and Grants Synchronous Serial ... Original
datasheet

1 pages,
28.23 Kb

sdram controller Programmable Controller PCI I/O interface AM5x86 "Programmable Interrupt Controller" uart 16550 16550 uart 16550 datasheet abstract
datasheet frame
Abstract: LogiCORE IP AXI UART 16550 (v1.01a) DS748 DS748 June 22, 2011 Product Specification Introduction LogiCORE IP Facts Table The AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to , Interfaces AXI4-Lite Resources2, 3, 4 Block RAMs LUTs The AXI UART 16550 described in this , and the AXI UART 16550 data sheet are highlighted in the Specification Exceptions section. , Functional Description The AXI UART 16550 implements the hardware and software functionality of the National ... Original
datasheet

27 pages,
779.06 Kb

UART16550 XC7K410T XC6VLX75T-FF784 XC6SLX16-CSG324 virtex7 DS150 DS160 PC16550D XC7V855T uart vhdl fpga AMBA AXI4 uart 16550 DS748 DS748 abstract
datasheet frame
Abstract: 2.0 Compliant 1x VGA Port PS/2 keyboard and mouse ports 1 Fast UART 16550 serial port 1 Fast UART 16550 serial header (Option) Environmental Spec. USB VGA Keyboard / Mouse Serial Port / Header ... Original
datasheet

1 pages,
249.55 Kb

TYLERSBURG rtl8201n 1066 Registered ECC DIMM 83827HF datasheet abstract
datasheet frame
Abstract: headers Total 6 USB 2.0 Compliant 1x VGA Port PS/2 keyboard and mouse ports 1 Fast UART 16550 serial port 1 Fast UART 16550 serial header (Option) Temperature AC Voltage +5V +5V standby +12V +3.3V 100-240 V ... Original
datasheet

1 pages,
246.92 Kb

WPCM450 E5500 CSE-813MTQ-350CB 83827HF datasheet abstract
datasheet frame
Abstract: Port PS/2 keyboard and mouse ports 1 Fast UART 16550 serial port 1 Fast UART 16550 serial header ... Original
datasheet

1 pages,
256.31 Kb

83827HF 1026T Intel Xeon 5500 intel 82576 WPCM450 datasheet abstract
datasheet frame
Abstract: headers Total 8 USB 2.0 Compliant 1x VGA Port PS/2 keyboard and mouse ports 1 Fast UART 16550 serial port 1 Fast UART 16550 serial header (Option) BIOS Features Operating Environment / Compliance RoHS ... Original
datasheet

1 pages,
244.94 Kb

15 pin sata datasheet abstract
datasheet frame
Abstract: Totally provides 4 UART (16550 asynchronous) ports 3 Pure UART 1 UART+IR 1 watch dog timer with WDTOUT# , F81216AD F81216AD 1. General Description The F81216AD F81216AD mainly provides 3 pure UART ports and one UART+ IR port through LPC. Each UART includes 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and an interrupt system. One watch dog timer is provided for system controlling and the time interval can be programmed by register or hardware power on setting pin. ... Original
datasheet

1 pages,
37.54 Kb

watch dog timer Uart applications uart 16550 lpc 16550 uart uart 16550 UART LPC uart F81216AD F81216AD abstract
datasheet frame
Abstract: provides simple LPC to ISA bridge Totally provides 6 UART (16550 asynchronous) ports 4 pure UART ports 2 SIR+ UART ports Provides 6 IRQ and each one can be shared 2 address decoder for ISA/LPC interface 1 , F81218D F81218D 1. General Description The F81218D F81218D mainly provides 4 pure UART and 2 SIR+UART ports through ISA or LPC interface which cab be selected by hardware setting. Each UART includes 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and an ... Original
datasheet

1 pages,
19.12 Kb

lpc interface uart 16550 F81218D UART ic address decoder uart 16550 lpc LPC uart F81218D abstract
datasheet frame
Abstract: configures the card ensuring conflict free installation. SPECIFICATIONS: Serial Ports: 2 x RS232 RS232 UART: 16550 Speed: 115,200 maximum baud rate Data Bits: 5, 6, 7 or 8 Stop Bits: 1 or 2 Parity: Odd, even ... Original
datasheet

1 pages,
541.79 Kb

baud IS-200 RS232 IS-200 abstract
datasheet frame

Extended Electronics Archive (Experimental)

Abstract Saved from Date Saved File Size Type Download
Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
. */ #ifndef LH754XX LH754XX LH754XX LH754XX_UART_16550_DRIVER #define LH754XX LH754XX LH754XX LH754XX_UART_16550_DRIVER #include "lh754xx_uart */ typedef struct UART_16550_REGS_S { /* Data register */ volatile UNS_32 dr; /* Receive */ volatile UNS_32 icr; /* DMA Control */ volatile UNS_32 dmacr; } UART_16550_REGS_T, *PUART_16550_REGS_T; #define UART0 (< ) #define UART1 ( */ /* UART Data Register Bit Field */ /* Framing Error */ #define UART_16550_DR_FE (0x00000100
www.datasheetarchive.com/download/72714627-595967ZC/code.package.lh754xx.sdk75401.zip (lh754xx_uart_16550_driver.h)
NXP 06/09/2007 3822.51 Kb ZIP code.package.lh754xx.sdk75401.zip
: * */ #include #include "sdk75401.h" #include "lh754xx_uart_16550_driver.h" /* Local defines for = < , 0) = 0x0) { /* Error */ return 1; } /* Operation mode configuration */ < >, UART_SET_BAUD_RATE, 115200); /* Set up the (line) frame control register 8-N-1 */ frame_opts = UART_16550_LCR_PARITY_NONE; /* No parity */ frame_opts |= UART_16550_LCR_WLEN8; /* 8 bit word */ frame_opts |= UART_16550
www.datasheetarchive.com/download/72714627-595967ZC/code.package.lh754xx.sdk75401.zip (uart_polled.c)
NXP 06/09/2007 3822.51 Kb ZIP code.package.lh754xx.sdk75401.zip
: * */ #include #include "sdk75401.h" #include "lh754xx_uart_16550_driver.h" #include "lh754xx . */ if (tty0 = < , 0) = 0x0) { /* Error */ return 1; } /* Operation mode configuration */ uart_16550_ioctl(tty0, UART_SET_BAUD_RATE, 115200); /* Set up the (line) frame control register 8-N-1 */ frame_opts = UART_16550_LCR_PARITY_NONE; /* No parity */ frame_opts |= UART_16550_LCR_WLEN8; /* 8 bit word */ frame_opts |= UART_16550_LCR_STP1
www.datasheetarchive.com/download/72714627-595967ZC/code.package.lh754xx.sdk75401.zip (uart0_int.c)
NXP 06/09/2007 3822.51 Kb ZIP code.package.lh754xx.sdk75401.zip
.v //// //// //// //// //// //// This file is part of the "UART 16550 compatible" project //// //// >/ //// //// //// //// Documentation related to this project: //// //// - > //// //// RS232 RS232 RS232 RS232 Protocol //// //// 16550D uart (mostly supported
www.datasheetarchive.com/download/74237060-996023ZC/xapp677.zip (timescale.v)
Xilinx 10/02/2004 18447.84 Kb ZIP xapp677.zip
. */ #include "lh754xx_uart_16550_driver.h" /* Serial driver interrupt priorities */ typedef enum { UART_16550_TX_POS = 0, UART_16550_RX_POS, UART_16550_RT_POS, UART_16550_FE_POS, UART_16550_PE_POS, UART_16550_BE_POS, UART_16550_OE_POS } UART_16550_INT_PRIO_T; /* Defines for the ip block base address and driver control object */ #define REGS_T UART_16550_REGS_T #define DRIVER_T SERIAL_T /* Forward declarations of private methods */ STATIC void uart0_16550_isr
www.datasheetarchive.com/download/72714627-595967ZC/code.package.lh754xx.sdk75401.zip (lh754xx_uart_16550_driver.c)
NXP 06/09/2007 3822.51 Kb ZIP code.package.lh754xx.sdk75401.zip
16550_0_BASEADDR 0xA0000000 #define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF #define XPAR_OPB_UART16550_0_DEVICE_ID 0 #define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000 #define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF #define XPAR_OPB_UART16550_1_DEVICE_ID 1 _IRQ_INTR 5 #define 6 #define XPAR_DCR_INTC_0_OPB_UART16550 */ /*/ #define XPAR_UARTNS550 UARTNS550 UARTNS550 UARTNS550_0_BASEADDR ( ) #define XPAR_UARTNS550 UARTNS550 UARTNS550 UARTNS550_0_HIGHADDR
www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (xparameters.h)
Xilinx 11/11/2004 9180.01 Kb ZIP xapp542.zip
_0 PARAMETER STDOUT = opb_uart16550_0 PARAMETER STDIN = opb_uart16550_0 END BEGIN PROCESSOR PARAMETER .00.a PARAMETER LEVEL = 1 END BEGIN DRIVER PARAMETER HW_INSTANCE = opb_uart16550_0 PARAMETER DRIVER _NAME = emac PARAMETER DRIVER_VER = 1.00.c END BEGIN DRIVER PARAMETER HW_INSTANCE = opb_uart16550
www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (system.mss)
Xilinx 11/11/2004 9180.01 Kb ZIP xapp542.zip
. */ #include #include "lpc_types.h" #include "lh754xx_uart_16550_driver.h" #include "lh754xx rate to 110 bps. */ if (dev_uart = < , 0) = 0x0) { /* Error */ return 1; } uart_16550_ioctl (dev_uart, UART_ENABLE_FIFO, 0); uart_16550_ioctl (dev_uart, UART_ENABLE_TX, 0); uart_16550_ioctl (dev_uart, UART_START, 0); uart_16550_ioctl (dev_uart, UART_SET_INT_MODE, 0); uart_16550_ioctl (dev_uart, UART
www.datasheetarchive.com/download/72714627-595967ZC/code.package.lh754xx.sdk75401.zip (dmac_uart0tx_test.c)
NXP 06/09/2007 3822.51 Kb ZIP code.package.lh754xx.sdk75401.zip
USED Reading LST file NOT USED NOT USED NOT USED NOT USED USED
www.datasheetarchive.com/download/70419997-996008ZC/xapp640.zip (make_fpga.log)
Xilinx 30/07/2002 9501.22 Kb ZIP xapp640.zip
_PERIPHS = ( PARAMETER DRIVER_VER = 1.00.a PARAMETER LEVEL = 1 END BEGIN DRIVER PARAMETER HW_INSTANCE = opb_uart16550 PARAMETER HW_INSTANCE = opb_uart16550_1 PARAMETER DRIVER_NAME = uartns550 PARAMETER DRIVER_VER = 1.00.b
www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (system_linux.mss)
Xilinx 11/11/2004 9180.01 Kb ZIP xapp542.zip