PD78F8014A 78F8015A 78F8016A PD78F8015A PD78F8016A U18867EJ4V0UD00 - Datasheet Archive

 

Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology

 

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": 8. 9. 10. 11. 12. Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anticrime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. User's Manual PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A 8-Bit Single-Chip Microcontroller With LIN Transceiver & Power Supply PD78F8014A PD78F8014A(A) PD78F8015A PD78F8015A(A) PD78F8016A PD78F8016A(A) Document No. U18867EJ4V0UD00 U18867EJ4V0UD00 (4th edition) Date Published May 2009 NS 2007 Printed in Japan [MEMO] 2 User's Manual U18867EJ4V0UD U18867EJ4V0UD NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. User's Manual U18867EJ4V0UD U18867EJ4V0UD 3 EEPROM is a trademark of NEC Electronics Corporation. Windows is a registered trademark or trademark of Microsoft Corporation in the United States and/or other countries. SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States and Japan. 4 User's Manual U18867EJ4V0UD U18867EJ4V0UD Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, inc. · The information in this document is current as of May, 2009. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. · No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. · NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. · Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. · While NEC Electronics endeavors to enhance the quality and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. In addition, NEC Electronics products are not taken measures to prevent radioactive rays in the product design. When customers use NEC Electronics products with their products, customers shall, on their own responsibility, incorporate sufficient safety measures such as redundancy, fire-containment and anti-failure features to their products in order to avoid risks of the damages to property (including public or social property) or injury (including death) to persons, as the result of defects of NEC Electronics products. · NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E0904E M8E0904E User's Manual U18867EJ4V0UD U18867EJ4V0UD 5 INTRODUCTION Readers This manual is intended for user engineers who wish to understand the functions of the PD78F8014A PD78F8014A, 78F8015A 78F8015A, and 78F8016A 78F8016A, and to design and develop application systems and programs for these devices. Purpose This manual is intended to give users an understanding of the functions described in the Organization below. The PD78F8014A PD78F8014A, 78F8015A 78F8015A, and 78F8016A 78F8016A's manuals are separated into three Organization manuals: this manual, 78K0/Kx2 User's Manual, and the Instructions edition (common to the 78K0 Series). PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78K0/Kx2 78K/0 78K/0 Series 78F8016A 78F8016A User's Manual User's Manual Instructions User's Manual (This Manual) · Pin functions · Pin functions · CPU functions · Internal block functions · Internal block functions · Instruction set · On-chip peripheral functions · Interrupts · Explanation of each instruction · Electrical specifications (target) · Other on-chip peripheral functions · Electrical specifications How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical engineering, logic circuits, and microcontrollers. · To gain a general understanding of functions: Read this manual in the order of the CONTENTS. The mark shows major revised points. The revised points can be easily searched by copying an "" in the PDF file and specifying it in the "Find what:" field. · The notation of the product name Description of (A) is omitted in this manual. "(A)" product names should be read as follows · PD78F8014A PD78F8014A PD78F8014A PD78F8014A(A) · PD78F8015A PD78F8015A PD78F8015A PD78F8015A(A) · PD78F8016A PD78F8016A PD78F8016A PD78F8016A(A) · To know details of the microcontroller part: Refer to the separate document 78K0/Kx2 User's Manual (U18598E U18598E). 78K0/KC2 78K0/KC2 microcontroller The products corresponding to products the 78K0/KC2 78K0/KC2 microcontroller products PD78F0511A PD78F0511A PD78F0512A PD78F0512A PD78F8015A PD78F8015A PD78F0513A PD78F0513A 6 PD78F8014A PD78F8014A PD78F8016A PD78F8016A User's Manual U18867EJ4V0UD U18867EJ4V0UD · To know details of the 78K0 microcontroller instructions: Refer to the separate document 78K/0 78K/0 Series Instructions User's Manual (U12326E U12326E). Conventions Data significance: Higher digits on the left and lower digits on the right Active low representations: ××× (overscore over pin and signal name) Note: Footnote for item marked with Note in the text Caution: Information requiring particular attention Remark: Supplementary information . ×××× or ××××B Numerical representations: Binary Decimal Hexadecimal Related Documents . ×××× . ××××H The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name Document No. PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A User's Manual This Manual 78K0/Kx2 User's Manual U18598E U18598E 78K/0 78K/0 Series Instructions User's Manual U12326E U12326E 78K0/Kx2 Flash Memory Programming (Programmer) Application Note U17739E U17739E 78K0 Microcontrollers Self Programming Library Type01 User's Manual U18274E U18274E 78K0 Microcontrollers EEPROM TM Emulation Library Type01 User's Manual U18275E U18275E Documents Related to Development Tools (Hardware) (User's Manuals) Document Name Document No. QB-78K0KX2 QB-78K0KX2 In-Circuit Emulator U17341E U17341E QB-MINI2 On-Chip Debug Emulator with Programming Function U18371E U18371E Documents Related to Flash Memory Programming Document Name Document No. PG-FP5 Flash Memory Programmer User's Manual U18865E U18865E PG-FP4 Flash Memory Programmer User's Manual U15260E U15260E Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document when designing. User's Manual U18867EJ4V0UD U18867EJ4V0UD 7 Documents Related to Development Tools (Software) (User's Manuals) Document Name RA78K0 RA78K0 Ver.3.80 Assembler Package User's Manual Document No. Operation U17199E U17199E Language Note 1 U17198E U17198E Structured Assembly Language 78K0 Assembler Package RA78K0 RA78K0 Ver.4.01 Operating Precautions (Notification Document) CC78K0 CC78K0 Ver.3.70 C Compiler User's Manual Operation Note 2 U17197E U17197E ZUD-CD-07-0181-E ZUD-CD-07-0181-E U17201E U17201E Language 78K0 C Compiler CC78K0 CC78K0 Ver. 4.00 Operating Precautions (Notification Document) Note 1 U17200E U17200E Note 2 ZUD-CD-07-0103-E ZUD-CD-07-0103-E ID78K0-QB ID78K0-QB Ver.2.94 Integrated Debugger User's Manual Operation U18330E U18330E ID78K0-QB ID78K0-QB Ver.3.00 Integrated Debugger User's Manual Operation U18492E U18492E PM plus Ver.5.20 Note 3 Note 4 PM+ Ver.6.30 Notes 1. User's Manual U16934E U16934E User's Manual U18416E U18416E This document is installed into the PC together with the tool when installing RA78K0 RA78K0 Ver. 4.01. For descriptions not included in "78K0 Assembler Package RA78K0 RA78K0 Ver. 4.01 Operating Precautions", refer to the user's manual of RA78K0 RA78K0 Ver. 3.80. 2. This document is installed into the PC together with the tool when installing CC78K0 CC78K0 Ver. 4.00. For descriptions not included in "78K0 C Compiler CC78K0 CC78K0 Ver. 4.00 Operating Precautions", refer to the user's manual of CC78K0 CC78K0 Ver. 3.70. 3. PM plus Ver. 5.20 is the integrated development environment included with RA78K0 RA78K0 Ver. 3.80. 4. PM+ Ver. 6.30 is the integrated development environment included with RA78K0 RA78K0 Ver. 4.01. Software tool (assembler, C compiler, debugger, and simulator) products of different versions can be managed. Other Documents Document Name Document No. SEMICONDUCTOR SELECTION GUIDE - Product and Packages - X13769X X13769X Semiconductor Device Mount Manual Note Quality Grades on NEC Semiconductor Devices C11531E C11531E NEC Semiconductor Device Reliability/Quality Control System C10983E C10983E Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E C11892E Review of Quality and Reliability Handbook Information C12769E C12769E Note See the "Semiconductor Device Mount Manual" website (http://www.necel.com/pkg/en/mount/index.html) Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document when designing. 8 User's Manual U18867EJ4V0UD U18867EJ4V0UD CONTENTS CHAPTER 1 OUTLINE . 11 1.1 Features . 11 1.2 Applications. 13 1.3 Ordering Information . 13 1.4 Pin Configuration (Top View). 14 1.5 Block Diagram . 16 1.5.1 Microcontroller block diagram .17 1.5.2 Analog block diagram.18 1.6 Outline of Functions . 19 CHAPTER 2 PIN FUNCTIONS . 21 2.1 Microcontroller Part Pin Functions . 22 2.2 Analog Part Pins. 24 2.3 Description of Pin Functions . 25 2.3.1 P00, P01 (port 0).25 2.3.2 P10 to P17 (port 1).26 2.3.3 P20 to P24 (port 2).27 2.3.4 P30 to P33 (port 3).27 2.3.5 P60 to P61 (port 6).28 2.3.6 P70 (port 7) .28 2.3.7 P120 to P122 (port 12).29 2.3.8 AVREF .29 2.3.9 AVSS .29 2.3.10 RESET .29 2.3.11 REGC.30 2.3.12 VDD .30 2.3.13 VSS .30 2.3.14 FLMD0 .30 2.3.15 Dr1, Dr21, Dr22, Dr3, Dr4 .30 2.3.16 Dr1_I, Dr21_I, Dr22_I, Dr3_I, Dr4_I .31 2.3.17 GND1, GND2, GND3 .31 2.3.18 HDS .31 2.3.19 LIN .31 2.3.20 MSLP .31 2.3.21 SUP.31 2.3.22 UMODE.32 2.3.23 VIC .32 2.3.24 VRO .32 2.4 Pin I/O Circuits and Recommended Connection of Unused Pins. 33 CHAPTER 3 MICROCONTROLLER FUNCTIONS. 39 3.1 Differences between This Micro's Functions and 78K0/KC2 78K0/KC2 . 39 3.2 Differences between the Special Function Registers and 78K0/KC2 78K0/KC2 . 40 3.3 Differences in Register Bit Setting from 78K0/KC2 78K0/KC2 (44-pin). 41 3.3.1 Port mode register.41 3.3.2 Port register .42 User's Manual U18867EJ4V0UD U18867EJ4V0UD 9 3.3.3 Pull-up resistor option register. 42 3.3.4 Analog input channel specification register . 43 3.3.5 A/D port configuration register. 44 3.3.6 Key return mode register. 45 3.3.7 Watch timer operation mode register . 45 3.3.8 Clock operation mode select register . 46 3.3.9 Processor clock control register . 46 3.3.10 IIC clock selection register 0. 47 CHAPTER 4 WRITING WITH FLASH PROGRAMMER . 48 CHAPTER 5 POWER SUPPLY CIRCUIT . 49 5.1 Power Supply Function . 49 5.2 Power Supply Overcurrent Protection Function. 49 5.3 Power Supply Thermal Shutdown Function. 49 CHAPTER 6 LIN TRANSCEIVER FUNCTION. 51 6.1 LIN Transceiver Function . 51 6.2 Operation Mode . 52 6.3 Overcurrent Limiter . 53 6.4 Thermal Shutdown Circuit. 53 CHAPTER 7 DRIVER CIRCUIT . 54 7.1 Low Side Driver . 54 7.2 High Side Driver. 54 CHAPTER 8 ELECTRICAL SPECIFICATIONS (A) GRADE PRODUCTS. 57 8.1 Absolute Maximum Ratings . 57 8.2 Microcontroller Block Characteristics . 59 8.3 Analog Block Characteristics . 77 CHAPTER 9 PACKAGE DRAWING. 81 APPENDIX A DEVELOPMENT TOOLS. 82 A.1 Software Package . 85 A.2 Language Processing Software . 85 A.3 Flash Memory Writing Tools. 86 A.3.1 When using flash memory programmer FG-FP5, FL-PR5, FG-FP4, and FL-PR4 . 86 A.3.2 When using on-chip debug emulator with programming function QB-MINI2. 86 A.4 Debugging Tools (Hardware). 87 A.4.1 When using in-circuit emulator QB-78K0KX2 QB-78K0KX2 . 87 A.4.2 When using on-chip debug emulator with programming function QB-MINI2. 87 A.6 Debugging Tools (Software). 88 APPENDIX B PACKAGE THERMAL RESISTANCE. 89 APPENDIX C CALCULATION EXAMPLE OF POWER DISSIPATION AND JUNCTION TEMPERATURE. 90 APPENDIX D REVISION HISTORY . 91 D.1 Main Revisions in this Edition. 91 D.2 Revision History of Preceding Editions . 92 10 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 1 OUTLINE PD78F8014A PD78F8014A, 78F8015A 78F8015A, and 78F8016A 78F8016A are MCP (Multi-Chip Package) which combined 2 chips in 1 package: an analog chip (including LIN transceiver, power supply, and several drivers) and a microcontroller chip. 8-bit microcontroller block is 78K0/KC2 78K0/KC2. 1.1 Features ROM, RAM capacities Part Number Program Memory Item Data Memory Internal High-Speed RAM (ROM) PD78F8014A PD78F8014A Flash memory Note 16 KB 768 bytes PD78F8015A PD78F8015A 24 KB 1 KB PD78F8016A PD78F8016A Note 31 KB Note The internal flash memory, internal high-speed RAM capacities, can be changed using the internal memory size switching register (IMS). On-chip single-power-supply flash memory Self-programming (with boot swap function) On-chip power-on-clear (POC) circuit and low-voltage detector (LVI) On-chip watchdog timer (operable with the on-chip internal low speed oscillation clock) On-chip key interrupt function I/O ports: 25 (N-ch open drain: 2) Timer: 7 channels - 16-bit timer/event counters: 1 channel - 8-bit timer/event counters: 2 channels - 8-bit timer: 2 channels - Watch timer: 1 channel - Watch dog timer: 1 channel Serial interface: 3 channels - UART (LIN (Local Interconnect Network)-bus supported): Note - CSI/UART : 1 channel 1 channel - IIC: 1 channel 10-bit resolution A/D converter: 5 channels Note Select either of the functions of these alternate-function pins. User's Manual U18867EJ4V0UD U18867EJ4V0UD 11 CHAPTER 1 OUTLINE On-chip power supply circuit Output voltage: 5 V ± 3% On-chip overcurrent protection circuit On-chip thermal shutdown circuit LIN transceiver The LIN transceiver complies with LIN Specifications Rev.2.0 Low power consumption achieved with on-chip sleep function On-chip pull-up resistors for slave applications On-chip LIN driver overcurrent protection circuit On-chip LIN driver thermal shutdown circuit Driver Low side driver: 3 channels Low side pre driver: 1 channel High side driver: 1 channel Package: 52-pin plastic LQFP (10×10) Operation ambient temperature: TA = -40 to +85 °C 12 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 1 OUTLINE 1.2 Applications Automotive equipment System control for body electronic control units · Power windows · Power slide door · Mirror control, etc. 1.3 Ordering Information Part Number Package PD78F8014AGBA-GAG-G PD78F8014AGBA-GAG-G Note PD78F8015AGBA-GAG-G PD78F8015AGBA-GAG-G Note PD78F8016AGBA-GAG-G PD78F8016AGBA-GAG-G Note Quality Grade 52-pin plastic LQFP (10×10) Special 52-pin plastic LQFP (10×10) Special 52-pin plastic LQFP (10×10) Special Note (A) grade product Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E C11531E) published by NEC Electronics Corporation to know the specification of quality grade on the devices and its recommended applications. User's Manual U18867EJ4V0UD U18867EJ4V0UD 13 CHAPTER 1 OUTLINE 1.4 Pin Configuration (Top View) LIN P12/SO10 P12/SO10 P11/SI10/RxD0 P10/SCK10/TxD0 AVREF AVSS P24/ANI4 P24/ANI4 P23/ANI3 P23/ANI3 P22/ANI2 P22/ANI2 P21/ANI1 P21/ANI1 P20/ANI0 P20/ANI0 P01/TI010/TO00 P01/TI010/TO00 P00/TI000 P00/TI000 · 52-pin plastic LQFP (10×10) 52 51 50 49 48 17 46 45 44 43 42 41 40 P120/INTP0/EXLVI P120/INTP0/EXLVI 1 39 GND2 RESET 2 38 Dr1_I FLMD0 3 37 Dr1 P122/X2/EXCLK P122/X2/EXCLK 4 36 Dr21_I P121/X1 P121/X1 35 Dr21 REGC 5 6 7 34 33 GND3 VSS Dr22_I VDD 8 P60/SCL0 P60/SCL0 9 32 31 Dr22 Dr3 SUP 27 14 15 16 17 18 19 20 21 22 23 24 25 26 VIC 13 HDS Dr4 VRO 28 UMODE 12 MSLP P70/KR0 P70/KR0 P32/INTP3 P32/INTP3 P13/TxD6 Dr4_I P14/RxD6 29 P15/TOH0 P15/TOH0 11 P16/TOH1/INTP5 P16/TOH1/INTP5 Dr3_I P17/TI50/TO50 P17/TI50/TO50 30 P30/INTP1 P30/INTP1 10 P31/INTP2 P31/INTP2 P61/SDA0 P61/SDA0 P33/TI51/TO51/INTP4 P33/TI51/TO51/INTP4 Cautions 1. Make AVSS the same potential as VSS. 2. Connect the REGC pin to VSS via a capacitor (0.47 F to 1 F: recommended). 3. ANI0/P20 ANI0/P20 to ANI4/P24 ANI4/P24 are in the analog input mode after reset release. 4. Make VSS the same potential as GND1 to GND3. 5. Make SUP the same potential as HDS. 6. Make VRO the same potential as VDD. 14 User's Manual U18867EJ4V0UD U18867EJ4V0UD GND1 CHAPTER 1 OUTLINE Pin Identification ANI0 to ANI4 : Analog Input P60, P61 : Port 6 AVREF : Analog Reference Voltage P70 : Port 7 AVSS : Analog Ground P120 to P122 : Port 12 REGC : Regulator Capacitance RESET : Reset Dr1, Dr21, Dr22, Dr3, Dr4 : Driver Output Dr1_I, Dr21_I, RxD0, RxD6 : Receive Data Dr22_I, Dr3_I, SCK10 SCK10, SCL0 : Serial Clock Input/Output Dr4_I : Driver Control SDA0 : Serial Data Input/Output EXCLK : External Clock Input (Main System SI10 : Serial Data Input SO10 : Serial Data Output EXLVI : External potential Input for Low- SUP : Power Supply FLMD0 : Flash Programming Mode TI50, TI51 GND1 to GND3 : Ground TO00, HDS : High-side Driver Power Supply TO50, TO51, INTP0 to INTP5 : External Interrupt Input TOH0, TOH1 : Timer Output KR0 : Key Return TxD0, TxD6 : Transmit Data LIN : LIN Bus UMODE : LIN Mode MSLP : Sleep Mode VDD : Power Supply P00, P01 : Port 0 VIC : Power Supply and Current Monitor P10 to P17 : Port 1 VRO : Voltage Regulator Output P20 to P24 : Port 2 VSS : Ground P30 to P33 : Port 3 X1, X2 : Crystal Oscillator (Main System Clock) TI000 TI000, TI010 TI010, voltage detector : Timer Input Clock) User's Manual U18867EJ4V0UD U18867EJ4V0UD 15 CHAPTER 1 OUTLINE 1.5 Block Diagram Analog chip 8-bit Micro. (78K0/KC2 78K0/KC2) Voltage Regulator ·On chip Pch MOS for power dropper ·Output voltage: 5 V (TYP.) ·Over current protection ·Over temp. protection SUP VIC VRO ·FlashROM:16 KB/24 KB/24 KB/32 KB/32 KB ·High-Speed RAM:768 B/1 KB ·OSC External oscillation: 20 MHz (MAX) Internal high speed oscillation: LIN transceiver ·Sleep function ·Pull up resistor for slave ·Over current protection ·Over temp. protection LIN MSLP UMODE 8 MHz (TYP.) ·Timer: 7channel 16-bit timer/event counter: 1 channel 8-bit timer/event counter: 2 channels 8-bit timer: 2 channels Watch timer: 1 channel Driver ·Dr1: Low side pre-driver ·Dr2: Low side driver(2 channels) Ron (max): 10 @100 mA ·Dr3: Low side LED driver Ron (max): 10 @50 mA ·Dr4: High side Driver Ron (max): 70 @16 mA Output clump (max): 16 V HDS Dr1_I Dr21_I Dr22_I Dr3_I Dr4_I Dr1 Dr21 Dr22 Dr3 Dr4 Watchdog timer: 1 channel ·Serial I/F UART(LIN bus supported): 1 channel CSI/UART: 1 channel CSI:1ch, IIC: 1 channel ·10-bit resolution A/D converter: 5 channels ·POC ·LVI ·Key interrupt ·I/O ports: 25 (N-ch open drain: 2) TxL RxL GND1 GND2 GND3 VDD AVREF REGC RESET FLMD0 P00/TI000 P00/TI000 P01/TI010/TO00 P01/TI010/TO00 P10/SCK10/TxD0 P11/SI10/RxD0 P12/SO10 P12/SO10 P13/TxD6 P15/TOH0 P15/TOH0 P16/TOH1/INTP5 P16/TOH1/INTP5 P17/TI50/TO50 P17/TI50/TO50 P20/ANI0 P20/ANI0 P21/ANI1 P21/ANI1 P22/ANI2 P22/ANI2 P23/ANI3 P23/ANI3 P24/ANI4 P24/ANI4 P30/INTP1 P30/INTP1 P31/INTP2 P31/INTP2 P32/INTP3 P32/INTP3 P33/TI51/TO51/INTP4 P33/TI51/TO51/INTP4 P60/SCL0 P60/SCL0 P61/SDA0 P61/SDA0 P70/KR0 P70/KR0 P120/INTP0/EXLVI P120/INTP0/EXLVI P121/X1 P121/X1 P122/X2/EXCLK P122/X2/EXCLK P13/TxD6 P14/RxD6 P14/RxD6 VSS AVSS Cautions 1. PD78F8014A PD78F8014A, 78F8015A 78F8015A, and 78F8016A 78F8016A are developed as MCP (Multi-Chip Package) which 2. The P13/TxD6 and P14/RxD6 terminals are connected with the LIN transceiver inside the includes 2 chips in the package, a microcontroller and an analog chip. package. 16 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 1 OUTLINE 1.5.1 Microcontroller block diagram TO00/TI010/P01 16-bit TIMER/ EVENT COUNTER 00 PORT0 TOH0/P15 TOH1/P16 LOW-SPEED INTERNAL OSCILLATOR WATCHDOG TIMER P10 to P17 5 P20 to P24 4 P30 to P33 PORT6 8-bit TIMER H0 8 PORT3 8-bit TIMER H0 P00, P01 PORT2 RxD6/P14(LINSEL) 2 PORT1 TI000/P00 TI000/P00 2 P60, P61 P70 PORT7 78K/0 78K/0 CPU CORE FLASH MEMORY PORT12 PORT12 TI50/TO50/P17 TI50/TO50/P17 8-bit TIMER/ EVENT COUNTER 50 POWER ON CLEAR/ LOW VOLTAGE INDICATOR TI51/TO51/P33 TI51/TO51/P33 8-bit TIMER/ EVENT COUNTER 51 3 KEY RETURN WATCH TIMER TxD0/P10 TxD6/P13 KR0/P70 KR0/P70 RxD6/P14(LINSEL) INTERRUPT CONTROL LINSEL INTP0/P120 INTP0/P120 4 INTP1/P30 INTP1/P30 to INTP4/P33 INTP4/P33 INTP5/P16 INTP5/P16 SI10/P11 SI10/P11 SERIAL INTERFACE CSI10 CSI10 SO10/P12 SO10/P12 SCK10/P10 SCK10/P10 SYSTEM CONTROL SERIAL INTERFACE IIC0 SDA0/P61 SDA0/P61 SCL0/P60 SCL0/P60 AVSS EXLVI/P120 EXLVI/P120 RESET CONTROL INTERNAL HIGH-SPEED RAM SERIAL INTERFACE UART6 RxD6/P14 AVREF POC/LVI CONTROL SERIAL INTERFACE UART0 RxD0/P11 ANI0/P20 ANI0/P20 to ANI4/P24 ANI4/P24 P120 to P122 RESET X1/P121 X1/P121 X2/EXCLK/P122 X2/EXCLK/P122 HIGH-SPEED INTERNAL OSCILLATOR 5 VOLTAGE REGULATOR A/D CONVERTER VDD VSS REGC FLMD0 User's Manual U18867EJ4V0UD U18867EJ4V0UD 17 CHAPTER 1 OUTLINE 1.5.2 Analog block diagram VIC SUP VRO Over Current proctection Over temp. protection Voltage regulator GND1 LIN pull-up resistor for slave LIN Mode control MSLP Over Current proctection Over temp. protection Dr1 RxL LIN transceiver GND2 UMODE TxL Dr1_I Low side Driver High side Driver Dr21 Dr1: Dr4: Dr21_I Dr22 Ron(max):100 @10 mA Ron(max): 70@16 mA Output clump(max): 16 V Dr22_I Dr2: 2 channels Dr3 Dr4 Ron(max):10 @100 mA Dr3_I Dynamic clump Dr4_I Dr3: Ron(max): 10 @50 mA GND3 18 Driver User's Manual U18867EJ4V0UD U18867EJ4V0UD HDS CHAPTER 1 OUTLINE 1.6 Outline of Functions (1/2) PD78F8014A PD78F8014A Flash memory (KB) High-Speed RAM (KB) Power supply voltage PD78F8015A PD78F8015A PD78F8016A PD78F8016A 16 Item 24 32 0.75 1 VDD = 1.8 to 5.5 V Regulator Provided 0.1 s (20 MHz: VDD = 2.7 to 5.5 V)/0.4 s (5 MHz: VDD = 1.8 to 5.5 V) Minimum instruction Main Clock execution time High-speed system 20 MHz: VDD = 2.7 to 5.5 V/5 MHz: VDD = 1.8 to 5.5 V Internal high-speed 8 MHz (TYP.): VDD = 1.8 to 5.5 V oscillation Internal low-speed 240 kHz (TYP.): VDD = 1.8 to 5.5 V Port oscillation 25 N-ch O.D. (6 V tolerance) Timer Total 2 16 bits (TM0) 1 ch 8 bits (TM5) 2 ch 8 bits (TMH) 2 ch Watch 1 ch Serial interface WDT UART/3-wire CSI 1 ch Note 1 ch UART supporting LIN-bus 1 ch 1 ch 10-bit A/D 5 ch Interrupt 2 I C bus External 7 Internal 16 Reset Key interrupt 1 ch RESET pin POC LVI Provided 1.59 V ±0.15 V The detection level of the supply voltage is selectable. WDT Provided Multiplier/divider Provided - On-chip debug function Operating ambient temperature TA = ­40 to +85°C Note Select either of the functions of these alternate-function pins. User's Manual U18867EJ4V0UD U18867EJ4V0UD 19 CHAPTER 1 OUTLINE (2/2) PD78F8014A PD78F8014A Item Power Supply PD78F8015A PD78F8015A PD78F8016A PD78F8016A · Input voltage : VSUP = 7 to 19 V · Output voltage: 5 V ± 3% · Include P-ch MOS for dropper · On-chip overcurrent protection circuit · On-chip thermal shutdown circuit LIN transceiver · The LIN transceiver complies with LIN Specifications Rev.2.0 · Low power consumption achieved with on-chip sleep function · On-chip pull-up resistors for slave applications · On-chip LIN driver current protection circuit · On-chip LIN driver thermal shutdown circuit Driver · Low side driver[4 channels] Pre-driver :1 channel Relay-driver :2 channels ( Include dynamic clamp) LED driver :1 channel · High side driver :1 channel (Includes 16 V clamp circuit) An outline of the timer is shown below. 16-Bit Timer/ Event Counters 00 and 01 8-Bit Timer/ Event Counters 50 and 51 8-Bit Timers H0 and H1 Watch Timer Watchdog Timer 1 channel - TM00 Function Interval timer TM50 TM51 TMH0 TMH1 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel - - - - Note 1 External event counter PPG output 1 output - - - - - - PWM output 1 output 1 output 1 output - 1 output - - Pulse width measurement 2 inputs - - - - - - Square-wave output 1 output 1 output 1 output 1 output 1 output - - Carrier generator - - - - 1 output - - Watch Timer - - - - - 1 channel - Watchdog timer - - - - - - 1 channel 2 1 1 1 1 1 - Note 2 Note 1 Interrupt source Notes 1. The watch timer function and interval timer function of the watch timer can be used simultaneously. 2. TM51 and TMH1 can be used in combination as a carrier generator mode. 20 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS The differences in microcontroller pin functions between the PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A and the 78K0/KC2 78K0/KC2 are as follows. (1) Port and alternate function pins PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A 78K0/KC2 78K0/KC2 PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78K0/KC2 78K0/KC2 PD78F0511A PD78F0511A, 78F0512A 78F0512A, 78F8016A 78F8016A PD78F0511A PD78F0511A, 78F0512A 78F0512A, 78F0513A 78F0513A Alternate Pin name Alternate Pin name 78F0513A 78F0513A Alternate Pin name Alternate Pin name function function function function P00 TI000 TI000 P00 TI000 TI000 P32 INTP3 P32 INTP3 P01 TI010/TO00 TI010/TO00 P01 TI010/TO00 TI010/TO00 P33 INTP4/TI51/ INTP4/TI51/ P33 INTP4/TI51/ INTP4/TI51/ TO51 TO51 - - - P10 SCK10/TxD0 P10 SCK10/TxD0 P40 to P41 P11 SI10/RxD0 P11 SI10/RxD0 P60 SCL0 P60 SCL0 P12 SO10 P12 SO10 P61 SDA0 P61 SDA0 P13 TxD6 P13 TxD6 - - P62 EXSCL0 P14 RxD6 P14 RxD6 - - P63 - P15 TOH0 P15 TOH0 P70 KR0 P70 to P73 KR0 to KR3 P16 TOH1/INTP5 P16 TOH1/INTP5 P120 INTP0/EXLVI P120 INTP0/EXLVI P17 TI50/TO50 TI50/TO50 P17 TI50/TO50 TI50/TO50 P121 X1 P121 X1 P20 to P24 ANI0 to ANI4 P20 to P27 ANI0 to ANI7 P122 X2/EXCLK P122 X2/EXCLK P30 INTP1 P30 INTP1 - - P123 XT1 P31 INTP2 P31 INTP2 - - P124 XT2/EXCLKS (2) Non-port pins PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A 78K0/KC2 78K0/KC2 PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78K0/KC2 78K0/KC2 PD78F0511A PD78F0511A, 78F0512A 78F0512A, 78F8016A 78F8016A PD78F0511A PD78F0511A, 78F0512A 78F0512A, 78F0513A 78F0513A Pin name 78F0513A 78F0513A Pin name Pin name Pin name VDD VDD FLMD0 FLMD0 VSS VSS AVREF AVREF RESET RESET AVSS AVSS REGC REGC User's Manual U18867EJ4V0UD U18867EJ4V0UD 21 CHAPTER 2 PIN FUNCTIONS 2.1 Microcontroller Part Pin Functions There are two types of pin I/O buffer power supplies: AVREF, and VDD. The relationship between these power supplies and the pins are shown below. Table 2-1. Pin I/O Buffer Power Supplies Power Supply Corresponding Pins AVREF P20 to P24 VDD Pins other than P20 to P24 (1) Port pins Function Name P00 I/O I/O Function Port 0. After Reset Input port Alternate Function TI000 TI000 2-bit I/O port. Input/output can be specified in 1-bit units. P01 TI010/TO00 TI010/TO00 Use of an on-chip pull-up resistor can be specified by a software setting. P10 I/O Port 1. Input port 8-bit I/O port. P11 SI10/RxD0 Input/output can be specified in 1-bit units. P12 SO10 Use of an on-chip pull-up resistor can be specified by a P13 SCK10/TxD0 TxD6 software setting. P14 RxD6 P15 TOH0 P16 TOH1/INTP5 P17 TI50/TO50 TI50/TO50 I/O Port 2. Analog 5-bit I/O port. P20 to P24 input ANI0 to ANI4 Input/output can be specified in 1-bit units. P30 to P32 I/O Port 3. Input port INTP1 to INTP3 4-bit I/O port. Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a P33 INTP4/TI51/TO51 INTP4/TI51/TO51 software setting. P60 I/O Port 6. Input port 2-bit I/O port. P61 SCL0 SDA0 Output of P60 to P61 is N-ch open-drain output Input/output can be specified in 1-bit units. P70 I/O Port 7. Input port KR0 Input port INTP0/EXLVI 1-bit I/O port. Input/output can be specified in 1-bit units. Use of an on-chip pull-up resistor can be specified by a software setting. P120 P121 P122 I/O Port 12. 3-bit I/O port. X1 Input/output can be specified in 1-bit units. Only for P120, use of an on-chip pull-up resistor can be specified by a software setting. 22 User's Manual U18867EJ4V0UD U18867EJ4V0UD X2/EXCLK CHAPTER 2 PIN FUNCTIONS (2) Non-port functions Function Name I/O Function After Reset Alternate Function ANI0 to ANI4 Input A/D converter analog input Analog input P20 to P24 EXLVI Input Potential input for external low-voltage detection Input port P120/INTP0 P120/INTP0 - FLMD0 INTP0 Input Flash memory programming mode setting External interrupt request input for which the valid edge - Input port (rising edge, falling edge, or both rising and falling edges) INTP1 to INTP3 - P120/EXLVI P120/EXLVI P30 to P32 can be specified INTP4 P33/TI51/TO51 P33/TI51/TO51 INTP5 P16/TOH1 P16/TOH1 KR0 Input - REGC Key interrupt input Input port P70 - - - Connecting regulator output stabilization capacitance for - internal operation. Connect to VSS via a capacitor (0.47 F to 1 F: recommended). RESET Input System reset input RxD0 Input Serial data input to asynchronous serial interface (UART0) Input port P11/SI10 P11/SI10 RxD6 Input Serial data input to asynchronous serial interface (UART6) Input port P14 SCK10 SCK10 I/O Clock input/output for CSI10 CSI10 Input port P10/TxD0 SCL0 I/O Clock input/output for IIC Input port P60 SDA0 I/O Serial data input/output for IIC Input port P61 SO10 Output Serial data output for CSI10 CSI10 Input port P12 TI000 TI000 Input External count clock input to 16-bit timer/event counter 00 Input port P00 Capture trigger input to capture registers (CR000 CR000, CR010 CR010) of 16-bit timer/event counter 00 Capture trigger input to capture register (CR000 CR000) of 16-bit TI010 TI010 P01/TO00 P01/TO00 timer/event counter 00 TI50 Input TI51 External count clock input to 8-bit timer/event counter 50 Input port External count clock input to 8-bit timer/event counter 51 P17/TO50 P17/TO50 P33/TO51/INTP4 P33/TO51/INTP4 TO00 Output 16-bit timer/event counter 00 output Input port P01/TI010 P01/TI010 TO50 Output 8-bit timer/event counter 50 output Input port P17/TI50 P17/TI50 TO51 8-bit timer/event counter 51 output P33/TI51/INTP4 P33/TI51/INTP4 TOH0 8-bit timer H0 output P15 TOH1 8-bit timer H1 output P16/INTP5 P16/INTP5 TxD0 Output Serial data output for UART0 Input port P10/SCK10 P10/SCK10 TxD6 Output Serial data output for UART6 Input port P13 X1 Input Connecting resonator for main system clock Input port P121 X2 - EXCLK VDD AVREF Input - Input P122/EXCLK P122/EXCLK External clock input for main system clock Input port P122/X2 P122/X2 Positive power supply (except for ports ) - - A/D converter reference voltage input and positive power - - supply for P20 to P24 and A/D converter VSS - Ground potential (P121 to P124 and except for ports) - - AVSS - A/D converter ground potential. Make the same potential as - - EVSS or VSS. User's Manual U18867EJ4V0UD U18867EJ4V0UD 23 CHAPTER 2 PIN FUNCTIONS 2.2 Analog Part Pins Function Name I/O Function Dr1 Output Driver 1 output Dr21 Output Driver 21 output Dr22 Output Driver 22 output Dr3 Output Driver 3 output Dr4 Output Driver 4 output Dr1_I Input Driver 1 control signal input Dr21_I Input Driver 21 control signal input Dr22_I Input Driver 22 control signal input Dr3_I Input Driver 3 control signal input Dr4_I Input Driver 4 control signal input GND1 - Power supply circuit GND GND2 - LIN transceiver circuit GND GND3 - Driver circuit GND - High side driver power supply HDS LIN I/O LIN Bus connection pin MSLP Input Sleep / Normal mode select for LIN - SUP UMODE Input Power supply connection pin LIN transceiver function enable / disable selection pin Low: Enable LIN transceiver High: Disable LIN transceiver VIC Input Power supply and current monitor VRO Output Voltage regulator output and monitor Cautions 1. Make GND1, GND2, GND3 the same potential as VSS and AVSS 2. 3. 24 Make SUP the same potential as HDS. Make VRO the same potential as VDD. User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS 2.3 Description of Pin Functions 2.3.1 P00, P01 (port 0) 2-bit I/O port. These pins also function as timer I/O. The following operation modes can be specified in 1-bit units. (1) Port mode 2-bit I/O port. P00, P01can be set to input or output port in 1-bit units using port mode register 0 (PM0). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 0 (PU0). (2) Control mode P00, P01 function as timer I/O. (a) TI000 TI000 This is the pins for inputting an external count clock to 16-bit timer/event counter 00 and is also for inputting a capture trigger signal to the capture registers (CR000 CR000, CR010 CR010) of 16-bit timer/event counter 00. (b) TI010 TI010 This is the pin for inputting a capture trigger signal to the capture register (CR000 CR000) of 16-bit timer/event counter 00. (c) TO00 This is a timer output pin of 16-bit timer/event counters 00. User's Manual U18867EJ4V0UD U18867EJ4V0UD 25 CHAPTER 2 PIN FUNCTIONS 2.3.2 P10 to P17 (port 1) P10 to P17 function as an 8-bit I/O port. These pins also function as pins for external interrupt request input, serial interface data I/O, clock I/O, and timer I/O. The following operation modes can be specified in 1-bit units. (1) Port mode P10 to P17 function as an 8-bit I/O port. P10 to P17 can be set to input or output port in 1-bit units using port mode register 1 (PM1). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 1 (PU1). (2) Control mode P10 to P17 function as external interrupt request input, serial interface data I/O, clock I/O, and timer I/O. (a) SI10 This is a serial data input pin of serial interface CSI10 CSI10. (b) SO10 This is a serial data output pin of serial interface CSI10 CSI10. (c) SCK10 SCK10 This is a serial clock I/O pin of serial interface CSI10 CSI10. (d) RxD0 This is a serial data input pin of serial interface UART0. (e) RxD6 This is a serial data input pin of serial interface UART6. (f) TxD0 This is a serial data output pin of serial interface UART0. (g) TxD6 This is a serial data output pin of serial interface UART6. (h) TI50 This is the pin for inputting an external count clock to 8-bit timer/event counter 50. (i) TO50 This is a timer output pin of 8-bit timer/event counter 50. (j) TOH0, TOH1 These are the timer output pins of 8-bit timers H0 and H1. (k) INTP5 This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. 26 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS 2.3.3 P20 to P24 (port 2) P20 to P24 function as a 5-bit I/O port. These pins also function as pins for A/D converter analog input. The following operation modes can be specified in 1-bit units. (1) Port mode P20 to P24 function as a 5-bit I/O port. P20 to P24 can be set to input or output port in 1-bit units using port mode register 2 (PM2). (2) Control mode P20 to P24 function as A/D converter analog input pins (ANI0 to ANI4). When using these pins as analog input pins, see 13.6 Cautions for A/D Converter in 78K0/Kx2 User's Manual (U18598E U18598E). Caution ANI0/P20 ANI0/P20 to ANI4/P24 ANI4/P24 are set to analog input mode after reset release. 2.3.4 P30 to P33 (port 3) P30 to P33 function as a 4-bit I/O port. These pins also function as pins for external interrupt request input and timer I/O. The following operation modes can be specified in 1-bit units. (1) Port mode P30 to P33 function as a 4-bit I/O port. P30 to P33 can be set to input or output port in 1-bit units using port mode register 3 (PM3). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 3 (PU3). (2) Control mode P30 to P33 function as external interrupt request input and timer I/O. (a) INTP1 to INTP4 These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. (b) TI51 This is an external count clock input pin to 8-bit timer/event counter 51. (c) TO51 This is a timer output pin from 8-bit timer/event counter 51. User's Manual U18867EJ4V0UD U18867EJ4V0UD 27 CHAPTER 2 PIN FUNCTIONS 2.3.5 P60 to P61 (port 6) P60 to P61 function as a 2-bit I/O port. These pins also function as pins for serial interface data I/O, clock I/O. The following operation modes can be specified in 1-bit units. (1) Port mode P60 to P61 function as a 2-bit I/O port. P60 to P61 can be set to input port or output port in 1-bit units using port mode register 6 (PM6). Output of P60 to P61 is N-ch open-drain output (6V tolerance). (2) Control mode P60 to P61 function as serial interface data I/O, clock I/O. (a) SDA0 This is a serial data I/O pin for serial interface IIC0. (b) SCL0 This is a serial clock I/O pin for serial interface IIC0. 2.3.6 P70 (port 7) P70 function as a 1-bit I/O port. These pins also function as key interrupt input pins. The following operation modes can be specified. (1) Port mode P70 function as a 1-bit I/O port. P70 can be set to input or output port using port mode register 7 (PM7). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 7 (PU7). (2) Control mode P70 function as key interrupt input pins. (a) KR0 This is a key interrupt input pins 28 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS 2.3.7 P120 to P122 (port 12) P120 to P122 function as a 3-bit I/O port. These pins also function as pins for external interrupt request input, potential input for external low-voltage detection, connecting resonator for main system clock, external clock input for main system clock. The following operation modes can be specified in 1-bit units. (1) Port mode P120 to P122 function as a 3-bit I/O port. P120 to P122 can be set to input or output port using port mode register 12 (PM12). Only for P120, use of an on-chip pull-up resistor can be specified by pull-up resistor option register 12 (PU12). (2) Control mode P120 to P122 function as pins for external interrupt request input, potential input for external low-voltage detection, connecting resonator for main system clock, external clock input for main system clock. (a) INTP0 This functions as an external interrupt request input (INTP0) for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. (b) EXLVI This is a potential input pin for external low-voltage detection. (c) X1, X2 These are the pins for connecting a resonator for main system clock. (d) EXCLK This is an external clock input pin for main system clock. 2.3.8 AVREF This is the A/D converter reference voltage input pin and the positive power supply pin of P20 to P24 and A/D converter. When the A/D converter is not used, connect this pin directly to VDDNote. Note Make the AVREF pin the same potential as the VDD pin when port 2 is used as a digital port. 2.3.9 AVSS This is the A/D converter ground potential pin. Even when the A/D converter is not used, always use this pin with the same potential as the VSS pin. 2.3.10 RESET This is the active-low system reset input pin. User's Manual U18867EJ4V0UD U18867EJ4V0UD 29 CHAPTER 2 PIN FUNCTIONS 2.3.11 REGC This is the pin for connecting regulator output (2.5 V) stabilization capacitance for internal operation. Connect this pin to VSS via a capacitor (0.47 to 1 F: recommended). REGC VSS Caution Keep the wiring length as short as possible for the broken-line part in the above figure. 2.3.12 VDD VDD is the positive power supply pin for Micro. 2.3.13 VSS VSS is the ground potential pin. 2.3.14 FLMD0 This is a pin for setting flash memory programming mode. Connect FLMD0 to VSS in the normal operation mode. In flash memory programming mode, connect this pin to the flash programmer. 2.3.15 Dr1, Dr21, Dr22, Dr3, Dr4 These are high voltage driver output pin. Each driver output can control with the Dr1_I, Dr21_I, Dr22_I, Dr3_I, Dr4_I input signal. (a) Dr1 This is a Low side driver output pin. (b) Dr21, Dr22 This is a Low side driver output pin. These pin has dynamic clump function for high voltage protection. (c) Dr3 This is a Low side driver output pin. (d) Dr4 This is a High side driver output pin. This pin has output voltage clump function, overcurrent protection and thermal shutdown function. 30 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS 2.3.16 Dr1_I, Dr21_I, Dr22_I, Dr3_I, Dr4_I These are input pins for high voltage driver control. These pin have a pull-down resistor inside the IC. Table 2-2. Truth table Input Dr1_I Dr1 Dr21 Dr22 Dr3 Dr4 High ON - - - - Low OFF - - - - High - ON - - - Low - OFF - - - High - - ON - - Low - - OFF - - High - - - ON - Low - - - OFF - High - - - - ON Low - - - - OFF Dr21_I Dr22_I Dr3_I Dr4_I 2.3.17 GND1, GND2, GND3 GND1 is a power supply circuit GND. GND2 is an LIN transceiver circuit GND. GND3 is a driver circuit GND. Connect GND1, GND2, and GND3 to the same potential as VSS and AVSS. 2.3.18 HDS This is a power supply pin for high side driver. Connect HDS to the same potential as SUP. 2.3.19 LIN This is a LIN Bus connection pin. 2.3.20 MSLP This pin is used to switch the LIN transceiver between normal and sleep mode. In the normal mode the LIN transceiver goes into sleep mode when MSLP is set to low and in the sleep mode the LIN transceiver goes into normal mode when MSLP is set to high. Moreover, this pin has a pull-down resistor inside the IC. 2.3.21 SUP SUP is the positive power supply pin. User's Manual U18867EJ4V0UD U18867EJ4V0UD 31 CHAPTER 2 PIN FUNCTIONS 2.3.22 UMODE This pin is used as mode pin to enable/disable the LIN transceiver function. This pin is pulled-down inside the IC. UMODE LIN Transceiver Circuit Status P13/TxD6 Pin Status Note (TxL: Pull up input) Low Active Output High Non active (Driver OFF) Input /Output (TxL: Hi-Z) Note P14/RxD6 Pin Status Input Note (RxL: Output) Input /Output (RxL: Hi-Z) When the LIN transceiver function is enabled, leave the P13/TxD6 and P14/RxD6 pins open. Clear PM13 to 0 (P13/TxD6 output setting) and set PM14 to 1 (P14/RxD6 input setting). 2.3.23 VIC VIC is the supply voltage and current monitor pin for voltage regulator. 2.3.24 VRO VRO is voltage regulator output and monitor. 32 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS 2.4 Pin I/O Circuits and Recommended Connection of Unused Pins Table 2-3 shows the types of pin I/O circuit and the recommended connections of unused pins. Refer to Figure 2-1 for the configuration of the I/O circuits of each type. Table 2-3. Pin I/O Circuit Types (1/2) Pin Name I/O Circuit Type 5-AH P00/TI000 P00/TI000 I/O Recommended Connection of Unused Pins Input: I/O Connect independently to VDD or VSS via a resistor. Output: Leave open. P01/TI010/TO00 P01/TI010/TO00 P10/SCK10/TxD0 P11/SI10/RxD0 P12/SO10 P12/SO10 P13/TxD6 5-AG Note 1 P14/RxD6 Note 1 5-AH P15/TOH0 P15/TOH0 5-AG P16/TOH1/INTP5 P16/TOH1/INTP5 5-AH P17/TI50/TO50/FLMD1 P17/TI50/TO50/FLMD1 P20/ANI0 P20/ANI0 to P24/ANI4 P24/ANI4 Note 2 11-G Connect to AVREF or AVSS. Input: Connect independently to VDD or VSS via a resistor. Output: Leave open. P30/INTP1 P30/INTP1 to P32/INTP3 P32/INTP3 Input: 5-AH P33/TI51/TO51/INTP4 P33/TI51/TO51/INTP4 P60/SCL0 P60/SCL0 Connect independently to VDD or VSS via a resistor. Output: Leave open. Input: 13-AD 13-AD Connect to VSS. Output: Leave this pin open at low-level output after clearing P61/SDA0 P61/SDA0 the output latch of the port to 0. Input: 5-AH P70/KR0 P70/KR0 P120/INTP0/EXLVI P120/INTP0/EXLVI Note 3 P121/X1 P121/X1 P122/X2/EXCLK P122/X2/EXCLK Connect independently to VDD or VSS via a resistor. Output: Leave open. Input: 37 Connect independently to VDD or VSS via a resistor. Output: Leave open. Note 3 RESET 2 FLMD0 38 - Input - Connect to VSS. Note 4 AVREF - - Connect directly to VDD AVSS - - Connect directly to VSS. Notes 1. . This pin has alternate functions as UART pin of the microcontroller or as LIN transceiver function pin. When this pin is used as the LIN transceiver function pin, leave it open. When it is used as microcontroller function pin, the UMODE pin must be externally pulled to VDD with a resistor. 2. P20/ANI0 P20/ANI0 to P24/ANI4 P24/ANI4 are in the analog input mode after reset release. 3. Use the recommended connection method described above in I/O port mode when these pins are not used. 4. Use the same potential as the VDD pin when port 2 is used as a digital port. User's Manual U18867EJ4V0UD U18867EJ4V0UD 33 CHAPTER 2 PIN FUNCTIONS Table 2-3. Pin I/O Circuit Types (2/2) Pin Name I/O Circuit Type Dr1 LIN1 Dr21 I/O Recommended Connection of Unused Pins Output Leave open Input Leave open LIN2 Dr22 Dr3 LIN1 Dr4 LIN3 Dr1_I LIN4 Dr21_I LIN5 Dr22_I LIN4 Dr3_I Dr4_I LIN LIN6 I/O Leave open MSLP LIN4 Input Leave open UMODE LIN4 Input Leave open. VIC LIN7 Input Connect directly to SUP Output Connect directly to VDD VRO RxL LIN8 Output - Note 1 TxL LIN9 Input - Note 2 Notes 1. RxL terminal is connected with P14/RxD6 in package. 2. TxL terminal is connected with P13/TxD6 in package. 34 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List (1/4) Type 2 Type 5-AH EVDD Pull-up enable P-ch EVDD IN Data P-ch IN/OUT Schmitt-triggered input with hysteresis characteristics Output disable N-ch EVSS Input enable Type 11-G Type 5-AG EVDD AVREF Data P-ch IN/OUT Output disable Pull-up enable N-ch AVSS P-ch EVDD Data P-ch P-ch Comparator + IN/OUT _ N-ch Series resistor string voltage Output disable AVSS Input enable N-ch EVSS Input enable User's Manual U18867EJ4V0UD U18867EJ4V0UD 35 CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List (2/4) Type 13-AD 13-AD Type 38 IN/OUT Data Output disable IN N-ch EVSS Input enable Input enable Type 37 RESET Data EVDD P-ch X2, XT2 Output disable N-ch EVSS Data EVDD P-ch RESET N-ch Input enable P-ch X1, XT1 Output disable N-ch EVSS Input enable 36 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List (3/4) LIN-1 LIN-2 OUT OUT Clamp N-ch N-ch GND GND LIN-3 LIN-4 VRO HDS P-ch IN P-ch N-ch Clamp OUT GND LIN-5 LIN-6 SUP IN IN/OUT Clamp V REF N-ch GND GND User's Manual U18867EJ4V0UD U18867EJ4V0UD 37 CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List (4/4) 38 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 3 MICROCONTROLLER FUNCTIONS The 8-bit microcontroller is the same as 78K0/KC2 78K0/KC2. The supported functions of the PD78F8014A PD78F8014A, 78F8015A 78F8015A and 78F8016A 78F8016A are different from 78K0/KC2 78K0/KC2, because the PD78F8014A PD78F8014A, 78F8015A 78F8015A, and 78F8016A 78F8016A do not support 78K0/KC2 78K0/KC2 all function pins. This manual describes the differences between this micro's functions and 78K0/KC2 78K0/KC2. See each function of microcontroller parts in 78K0/Kx2 User's Manual (U18598E U18598E). 3.1 Differences between This Micro's Functions and 78K0/KC2 78K0/KC2 The differences between the PD78F8014A PD78F8014A, 78F8015A 78F8015A and 78F8016A 78F8016A's functions and 78K0/KC2 78K0/KC2 are as follows. Item PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A 78K0/KC2 78K0/KC2 (44-pin) PD78F0511A PD78F0511A, 78F0512A 78F0512A, 78F0513A 78F0513A - Subsystem clock XT1 (crystal) oscillation External subsystem clock input (EXCLK) 32.768 kHz (TYP.) : VDD = 1.8 to 5.5 V I/O port Total: 25 Total: 37 CMOS I/O: 23 CMOS I/O: 33 N-ch open-drain I/O(tolerance): 2 Clock out - N-ch open-drain I/O(tolerance): 4 · 156.25 kHz, 312.5 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (peripheral hardware clock: fPRS = 20 MHz operation) · 32.768 kHz (subsystem clock: fSUB = 32.768 kHz operation) A/D converter 10 bit resolution x 5 channels (AVREF = 2.3 to 5.5 V) 10 bit resolution x 8 channels (AVREF = 2.3 to 5.5 V) Key interrupt Key interrupt (INTKR) occurs by detecting falling Key interrupt (INTKR) occurs by detecting falling edge of key input pins (KR0). edge of key input pins (KR0 to KR3). User's Manual U18867EJ4V0UD U18867EJ4V0UD 39 CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.2 Differences between the Special Function Registers and 78K0/KC2 78K0/KC2 The differences between the PD78F8014A PD78F8014A, 78F8015A 78F8015A and 78F8016A 78F8016A's special function registers and 78K0/KC2 78K0/KC2 (44pin) are as follows. PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A 78K0/KC2 78K0/KC2 PD78F0511A PD78F0511A 78F0512A 78F0512A, 78F0513A 78F0513A Address FF02H FF02H Special function register (SFR) name Port register 2 Note 1 Port register 6 FF07H FF07H Port register 7 FF0CH Port register 12 FF22H FF22H Port mode register 2 FF27H FF27H FF29H FF29H Port mode register 7 FF9FH FFA8H FFFBH P12 Port mode register 2 PM2 Port mode register 4 PM4 Port mode register 6 PM6 PM7 Port mode register 7 PM7 ADS Analog input channel specification register ADS PM12 Port mode register12 PM12 ADPC A/D port configuration register ADPC Pull-up resistor option register4 PU4 PU7 Pull-up resistor option register7 PU7 KRM Key return mode register KRM WTM Watch timer operation mode register WTM OSCCTL Clock operation mode select register OSCCTL IICCL0 IIC clock selection register IICCL0 PCC Note 1 Note 1 Analog input channel specification register Note 1 FF2FH FF6FH P7 Port register 12 PM6 Note 1 A/D port configuration register FF6EH Port register 7 - Note 2 Port mode register 12 FF37H FF37H P6 PM2 Note 1 Note 1 - Port register 6 P12 FF2CH FF34H FF34H P4 P7 - Port register 4 P6 Note 1 Port mode register 6 Note 2 Pull-up resistor option register7 Key return mode register Processor clock control register PCC - Note 1 Note 1 Watch timer operation mode register Note 1 Note 1 Clock operation mode select register Note 1 IIC clock selection register Note 1 Processor clock control register Notes 1. Different in bit setting. 2. Be sure not to write this register. 40 Symbol P2 - Note 1 FF24H FF24H Special function register (SFR) name Port register 2 Note 2 Note 1 FF06H FF06H FF26H FF26H P2 - FF04H FF04H Symbol User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3 Differences in Register Bit Setting from 78K0/KC2 78K0/KC2 (44-pin) 3.3.1 Port mode register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Symbol 7 6 5 4 3 2 1 0 Address After reset R/W PM2 1 1 1 PM24 PM23 PM22 PM21 PM20 FF22H FF22H FFH R/W PM6 1 1 1 1 1 1 PM61 PM60 FF26H FF26H FFH R/W PM7 1 1 1 1 1 1 1 PM70 FF27H FF27H FFH R/W PM12 1 1 1 1 1 PM122 PM122 PM121 PM121 PM120 PM120 FF2CH FFH R/W Cautions 1. Be sure to set `1' on PM2 bit 5 to 7. 2. Be sure to set `1' on PM6 bit 2 and 3. 3. Be sure to set `1' on PM7 bit 1 to 3. 4. Be sure to set `1' on PM12 bit 3 and 4. 78K0/KC2 78K0/KC2 Symbol 7 6 5 4 3 2 1 0 Address After reset R/W PM2 PM27 PM26 PM25 PM24 PM23 PM22 PM21 PM20 FF22H FF22H FFH R/W PM6 1 1 1 1 PM63 PM62 PM61 PM60 FF26H FF26H FFH R/W PM7 1 1 1 1 PM73 PM72 PM71 PM70 FF27H FF27H FFH R/W PM12 1 1 1 PM124 PM124 PM123 PM123 PM122 PM122 PM121 PM121 PM120 PM120 FF2CH FFH R/W User's Manual U18867EJ4V0UD U18867EJ4V0UD 41 CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3.2 Port register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Symbol 7 6 5 4 3 2 1 0 Address After reset R/W P2 0 0 0 P24 P23 P22 P21 P20 FF02H FF02H 00H (output latch) R/W P6 0 0 0 0 0 0 P61 P60 FF06H FF06H 00H (output latch) R/W P7 0 0 0 0 0 0 0 P70 FF07H FF07H 00H (output latch) R/W P12 0 0 0 0 0 P122 P121 P120 FF0CH 00H (output latch) R/W Symbol 7 6 5 4 3 2 1 0 Address P2 P27 P26 P25 P24 P23 P22 P21 P20 FF02H FF02H 00H (output latch) R/W P6 0 0 0 0 P63 P62 P61 P60 FF06H FF06H 00H (output latch) R/W P7 0 0 0 0 P73 P72 P71 P70 FF07H FF07H 00H (output latch) R/W P12 0 0 0 P124 P123 P122 P121 P120 FF0CH 00H (output latch) R/W 78K0/KC2 78K0/KC2 After reset R/W 3.3.3 Pull-up resistor option register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Symbol 7 6 5 4 3 2 1 0 Address After reset R/W PU7 0 0 0 0 0 0 0 PU70 FF37H FF37H 00H R/W Caution Be sure to clear `0' on PU7 bit 3 to 7. 78K0/KC2 78K0/KC2 Symbol 7 6 5 4 3 2 1 0 Address After reset R/W PU7 0 0 0 0 PU73 PU72 PU71 PU70 FF37H FF37H 00H R/W 42 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3.4 Analog input channel specification register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FF29H FF29H After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 ADS 0 0 0 0 0 ADS2 ADS1 ADS0 ADS2 ADS1 ADS0 0 0 0 ANI0 0 0 1 ANI1 0 1 0 ANI2 0 1 1 ANI3 1 0 0 ANI4 1 0 1 Setting prohibited 1 1 0 Setting prohibited 1 1 1 Setting prohibited Analog input channel specification Caution Be sure to clear `0' on bit 3 to 7. 78K0/KC2 78K0/KC2 Address: FF29H FF29H After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 ADS 0 0 0 0 0 ADS2 ADS1 ADS0 ADS2 ADS1 ADS0 0 0 0 ANI0 0 0 1 ANI1 0 1 0 ANI2 0 1 1 ANI3 1 0 0 ANI4 1 0 1 ANI5 1 1 0 ANI6 1 1 1 ANI7 Analog input channel specification Caution Be sure to clear `0' on bit 3 to 7. User's Manual U18867EJ4V0UD U18867EJ4V0UD 43 CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3.5 A/D port configuration register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FF2FH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 ADPC 0 0 0 0 0 ADPC2 ADPC1 ADPC0 ADPC2 ADPC1 ADPC0 Analog Input(A)/Digital I/O(D)switching ANI4/P24 ANI4/P24 ANI3/P23 ANI3/P23 ANI2/P22 ANI2/P22 ANI1/P21 ANI1/P21 ANI0/P20 ANI0/P20 0 0 0 A A A A A 0 0 1 A A A A D 0 1 0 A A A D D 0 1 1 A A D D D 1 0 0 A D D D D 1 0 1 D D D D D Other than above Caution Setting prohibit Be sure to clear `0' on bit 3. 78K0/KC2 78K0/KC2 Address: FF2FH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 ADPC 0 0 0 0 ADPC3 ADPC2 ADPC1 ADPC0 ADPC3 ADPC2 ADPC1 ADPC0 Analog input(A) / Digital I/O (D) switching ANI7/ ANI6/ ANI5/ ANI4/ ANI3/ ANI2/ ANI1/ ANI0/ P27 P26 P25 P24 P23 P22 P21 P20 0 0 0 0 A A A A A A A A 0 0 0 1 A A A A A A A D 0 0 1 0 A A A A A A D D 0 0 1 1 A A A A A D D D 0 1 0 0 A A A A D D D D 0 1 0 1 A A A D D D D D 0 1 1 0 A A D D D D D D 0 1 1 1 A D D D D D D D 1 0 0 0 D D D D D D D D Other than above 44 Setting prohibited User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3.6 Key return mode register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FF6EH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 KRM 0 0 0 0 0 0 0 KRM0 Caution Be sure clear `0' on bit 1 to 7. 78K0/KC2 78K0/KC2 Address: FF6EH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 KRM 0 0 0 0 KRM3 KRM2 KRM1 KRM0 3.3.7 Watch timer operation mode register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FF6FH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 WTM 0 WTM6 WTM5 WTM4 WTM3 WTM2 WTM1 WTM0 Caution Bit 7 must always be set to `0'. It is read-only. 78K0/KC2 78K0/KC2 Address: FF6FH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 WTM WTM7 WTM6 WTM5 WTM4 WTM3 WTM2 WTM1 WTM0 WTM7 Watch timer count clock selection (fW) fSUB= 32.768 kHz fPRS = 2 MHz 0 fPRS/27 1 fSUB Remarks 1. fW: - 15.625 kHz fPRS = 5 MHz fPRS = 10 MHz fPRS = 20 MHz 39.062 kHz 78.125 kHz 156.25 kHz - 32.768 kHz 7 Watch timer clock frequency (fPRS/2 or fSUB) 2. fPRS: Peripheral hardware clock frequency 3. fSUB: Subsystem clock frequency User's Manual U18867EJ4V0UD U18867EJ4V0UD 45 CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3.8 Clock operation mode select register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FF9FH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 OSCCTL EXCLK OSCSEL 0 0 0 0 0 AMPH Caution Be sure to clear `0' on bit 4 to 5. 78K0/KC2 78K0/KC2 Address: FF9FH After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 OSCCTL EXCLK OSCSEL EXCLKS OSCSELS 0 0 0 AMPH 3.3.9 Processor clock control register PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FFFBH After reset: 01H R/W Symbol 7 6 5 4 3 2 1 0 PCC 0 0 0 0 0 PCC2 PCC1 PCC0 Cautions 1. 2. Bit 5 is read-only. Be sure to clear `0' on bit 4 and bit 6. 78K0/KC2 78K0/KC2 Address: FFFBH After reset: 01H R/W Symbol 7 6 5 4 3 2 1 0 PCC 0 XTSTART CLS CSS 0 PCC2 PCC1 PCC0 Caution Bit 5 is read-only. 46 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 3 MICROCONTROLLER FUNCTIONS 3.3.10 IIC clock selection register 0 PD78F8014A PD78F8014A, 78F8015A 78F8015A, 78F8016A 78F8016A Address: FFA8H After reset: 00H R/W Symbol 7 5 4 3 2 1 0 0 IICCL0 6 0 CLD0 DAD0 SMC0 DFC0 CL01 CL00 Selection Clock Setting IICX0 Selection Clock Transfer Clock Settable Selection Clock (fW) IICCL0 (fW/m) Operation Mode (fW) Range Bit 0 Bit 3 Bit 1 Bit 0 CLX0 SMC0 CL01 CL00 0 0 0 0 fPRS/2 fW/44 2.00 MHz to 4.19 MHz Normal mode 0 0 0 1 fPRS/2 fW/86 4.19 MHz to 8.38 MHz (SMC0 bit = 0) 0 0 1 0 fPRS/4 fW/86 0 0 1 1 Setting prohibited 0 1 0 × fPRS/2 fW/24 4.00 MHz to 8.38 MHz High-speed mode 0 1 1 0 fPRS/4 fW/24 0 1 1 1 Setting prohibited 1 0 × × Setting prohibited 1 1 0 × fPRS/2 fW/12 1 1 1 0 fPRS/4 fW/12 1 1 1 1 Setting prohibited (SMC0 bit = 1) 4.00 MHz to 4.19 MHz High-speed mode (SMC0 bit = 1) 78K0/KC2 78K0/KC2 Address: FFA8H After reset: 00H R/W Symbol 7 5 4 3 2 1 0 0 IICCL0 6 0 CLD0 DAD0 SMC0 DFC0 CL01 CL00 Selection Clock Setting IICX0 Selection Clock IICCL0 Transfer Clock Settable Selection Clock (fW) (fW/m) (fW) Range Operation Mode Bit 0 Bit 3 Bit 1 Bit 0 CLX0 SMC0 CL01 CL00 0 0 0 0 fPRS/2 fW/44 2.00 to 4.19 MHz Normal mode 0 0 0 1 fPRS/2 fW/86 4.19 to 8.38 MHz (SMC0 bit = 0) 0 0 1 0 fPRS/4 fW/86 0 0 1 1 fEXSCL0 fW/66 6.4 MHz 0 1 0 × fPRS/2 fW/24 4.00 to 8.38 MHz 0 1 1 0 fPRS/4 fW/24 0 1 1 1 fEXSCL0 fW/18 6.4 MHz 1 0 × × Setting prohibited 1 1 0 × fPRS/2 fW/12 4.00 to 4.19 MHz 1 1 1 0 fPRS/4 fW/12 1 1 1 1 Setting prohibited Remarks 1. 2. 3. High-speed mode (SMC0 bit = 1) High-speed mode (SMC0 bit = 1) ×: Don't care fPRS: Peripheral hardware clock frequency fEXSCL0: External clock frequency from EXSCL0 pin User's Manual U18867EJ4V0UD U18867EJ4V0UD 47 CHAPTER 4 WRITING WITH FLASH PROGRAMMER Data can be written to the flash memory on-board or off-board, by using a dedicated flash programmer. (1) On-board programming The contents of the flash memory can be rewritten after the device has been mounted on the target system. The connectors that connect the dedicated flash programmer must be mounted on the target system. (2) Off-board programming Data can be written to the flash memory with a dedicated program adapter (FA series) before the device is mounted on the target system. Remark The FA series is a product of Naito Densei Machida Mfg. Co., Ltd. Table 4-1. Wiring Dedicated Flash Programmer Pin Configuration of Dedicated Flash Programmer Signal Name I/O With CSI10 CSI10 Pin Function Pin name With UART6 Pin No. Pin Name. Pin No. SI/RXD Input Receive signal SO10/P12 SO10/P12 41 TxD6/P13 20 SO/TXD Output Transmit signal SI10/RxD0/P11 42 RxD6/P14 19 SCK Output Transfer clock SCK10/TxD0/P10 43 - Clock to Micro Note 1 - - Note 2 - Note 2 CLK Output /RESET Output Reset signal RESET 2 RESET 2 FLMD0 Output Mode signal FLMD0 3 FLMD0 3 VDD I/O VDD voltage VDD 8 VDD 8 generation/ AVREF 44 AVREF 44 SUP 26 SUP 26 HDS 25 HDS 25 VIC 24 VIC 24 VRO 23 VRO 23 power monitoring - - UMODE 22 VSS 7 45 AVSS 45 27 GND1 27 GND2 39 GND2 39 GND3 GND 7 GND1 - VSS AVSS VSS 34 GND3 34 Notes 1. Only the internal high-speed oscillation clock (fRH) can be used when CSI10 CSI10 is used. 2. Only the X1 clock (fX) or external main system clock (fEXCLK) can be used when UART6 is used. When using the clock out of the flash programmer, connect CLK and EXCLK of the programmer. · PG-FP5, FL-PR5, PG-FP4, FL-PR4: Please connect the programmer's CLK to EXCLK/X2/P122 EXCLK/X2/P122 (pin 4) 48 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 5 POWER SUPPLY CIRCUIT 5.1 Power Supply Function The power supply circuit is a stabilization power supply circuit that generates 5 V (typ.) output voltage from 12 V battery supply voltage. The power supply circuit has the following function. - Overcurrent protection function - Thermal shutdown function 5.2 Power Supply Overcurrent Protection Function This circuit protects the dropper by limiting the current when an overcurrent occurs in the power supply line due to a cause such as a load short. The overcurrent is detected by using the potential difference on a register connected between the SUP and VIC pins. The resistor needs to be connected so that the maximum current between the SUP and VIC pins, is kept less than 65 mA. Current limit = Overcurrent detect voltage (VSUPlim) / ROCD Overcurrent detect voltage (VSUPlim) = VSUP - VIC VSUPlim = 150 mV (typ.) 5.3 Power Supply Thermal Shutdown Function This is a protection circuit for preventing destruction because of over temperature. The temperature of the internal circuit is monitored and when the temperature exceeds the maximum limit the overheating detection temperature is detected and the internal P-ch MOS is forcibly switched off. After the dropper is forcibly switched off, it automatically switches back on after the temperature declines. Caution The purpose of the built-in protection functions is to protect the device from abnormal operation. Try to avoid the use of these functions by designing the system properly. User's Manual U18867EJ4V0UD U18867EJ4V0UD 49 CHAPTER 5 POWER SUPPLY CIRCUIT Figure 5-1. Voltage regulator circuit application example C3 C4 VRO VIC ROCD SUP VB C1 C2 Over current protection Control Thermal shutdown GND1 Voltage regulator External parts target C1 33 F C2 0.01 F 4.7 F C3 100 F C4 0.01 F Caution Place the ceramic capacitor (C2, C4) between the SUP and GND pin, the VRO and GND pins adjacent to the SUP, VRO pin and use the shortest possible wiring. 50 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 6 LIN TRANSCEIVER FUNCTION 6.1 LIN Transceiver Function The LIN transceiver and external specifications comply with LIN Specifications Rev.2.0. The LIN transceiver has the following functions. - Sleep function - Overcurrent protection function - Thermal shutdown function Figure 6-1. LIN Transceiver Block Diagram VRO RxL RxD6 Z2 Filter Por t C1 Z1 VRO TxL TxD6 2 Remarks 1. RxL terminal is connected to P14/RxD6. 2. TxL terminal is connected to P13/TxD6. 3. LIN terminal includes slave pull-up register and diode. User's Manual U18867EJ4V0UD U18867EJ4V0UD 51 CHAPTER 6 LIN TRANSCEIVER FUNCTION 6.2 Operation Mode (1) UMODE = Low (LIN transceiver in operation mode) The LIN transceiver has the following two modes. Figure 6-2. Mode Transition Diagram MSLP = High Sleep mode MSLP = Low LIN communication : OFF CPU : STOP or HALT Normal mode LIN communication : ON CPU : NORMALl · Sleep mode When MSLP becomes low, the sleep mode is entered. In the sleep mode, the LIN driver output becomes OFF (recessive) regardless of the Tx pin input state. To reduce the current consumption, set the microcontroller's operation mode either to HALT or STOP mode. · Normal mode When MSLP becomes high, the normal mode is entered. In the normal mode, the Tx input data can be output to the LIN bus. Cautions 1. When using the LIN transceiver function, leave the UMODE pin open. (The UMODE pin is pulled down within the IC.) 2. When not using the LIN transceiver function, directly connect the UMODE pin to VDD and set it to high level. When the UMODE pin is set to high level, the pull-up resistor of the LIN transceiver circuit (R_Tx) becomes unconnected. 3. The MSLP pin is pulled down within the IC. (2) UMODE = High (LIN transceiver not in operation mode) Unconditionally, LIN communication is OFF. TxL and RxL are High impedance. LIN terminal (N-ch open drain output) is OFF. 52 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 6 LIN TRANSCEIVER FUNCTION 6.3 Overcurrent Limiter The overcurrent limiter prevents the destruction of the device caused by overcurrent during a load short. When a current occurs that exceeds the overcurrent detection value flows to the LIN driver due to a load short, etc., the output current is limited by inhibiting the gate voltage of the LIN driver. 6.4 Thermal Shutdown Circuit This is a protection circuit for preventing destruction of the device due to over temperature. The temperature of the LIN driver is monitored and when a temperature that exceeds the overheating detection temperature (MIN: 150°C) is detected, the LIN driver is forcibly switched off. After the LIN driver is forcibly switched off, it automatically switches back on after the temperature declines. Caution The purpose of the built-in protection functions is to protect the device from abnormal operation. Try to avoid the use of these functions by designing the system properly. User's Manual U18867EJ4V0UD U18867EJ4V0UD 53 CHAPTER 7 DRIVER CIRCUIT The driver circuit has 4 channels of a low side driver and 1 channel of a high side driver circuit. 7.1 Low Side Driver (a) Dr1: 1 ch Application: Pre driver for high side driver The driver control input signal pin is Dr1_I. This pin has a pull-down resistor within the IC. (b) Dr2: 2 ch Application: Relay driver The driver control input signal pins are Dr21_I and Dr22_I. This pin has a pull-down resistor and clamp circuit within the IC. As driver input of Dr21_I and Dr22_I can either the 5V signal or the battery voltage signal either be used. When the battery voltage is input to Dr21_I and Dr22_I the system needs an external resistor. For details, please refer to the application example. The drivers Dr21 and Dr22 have a dynamic clamp circuit for high voltage protection. The dynamic clamp circuit does not operate when the supply voltage VSUP is more than 28V. (c) Dr3: 1 ch Application: LED driver The driver control input signal pin is Dr3_I. This pin has a pull-down resistor within the IC. 7.2 High Side Driver (a) Dr4: 1 ch Application: Hall sensor power supply driver The driver control input signal pin is Dr4_I. This pin has a pull-down resistor within the IC. The driver Dr4 has an output voltage clump function, an overcurrent protection and a thermal shutdown function. The overcurrent limiter prevents destruction of the driver caused by an overcurrent during a load short. When a current that exceeds the overcurrent detection value flows to the Dr4 due to a load short, etc. the output current is limited by inhibiting the gate voltage of Dr4. The temperature of the Dr4 is monitored and when a temperature that exceeds the overheating detection temperature (MIN: 150°C) is detected, the Dr4 is forcibly switched off. After the Dr4 is forcibly switched off, it automatically switches back on after the temperature declines. Caution The purpose of the built-in protection functions is to protect the device from abnormal operation. Try to avoid the use of these functions by designing the system properly. 54 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 7 DRIVER CIRCUIT Table 7-1. Truth Table Input ON - - - - OFF - - - - - ON - - - - OFF - - - High - - ON - - Low - - OFF - - High - - - ON - Low - - - OFF - High - - - - ON Low Dr4_I Dr4 Low Dr3_I Dr3 High Dr22_I Dr22 Low Dr21_I Dr21 High Dr1_I Dr1 - - - - OFF Figure 7-1. Low Side Driver Circuit Application Example SUP Dr1: Low side Driver VRO Dr1 Dr1_I Port M Dr2: Low side Driver 2ch Dr21 Dynamic Clamp Dr21_I Port SUP Clamp R1 CH1 R1>47 k+/-10% Dr22_I Dr22 Port CH2 Dr3: Low side Driver VRO SUP Dr3 Dr3_I Port GND User's Manual U18867EJ4V0UD U18867EJ4V0UD 55 CHAPTER 7 DRIVER CIRCUIT Figure 7-2. High Side Driver Circuit Application Example Dr4: High side Driver SUP SUP HDS VRO Dr4_I Dr4 Port Current limit C1 VRO Port Hall IC Hall IC 56 User's Manual U18867EJ4V0UD U18867EJ4V0UD Port CHAPTER 8 ELECTRICAL SPECIFICATIONS (A) GRADE PRODUCTS 8.1 Absolute Maximum Ratings Absolute Maximum Ratings for Microcontroller block (TA = 25°C) Parameter Ratings Unit VDD -0.5 to +6.5 V VSS Supply voltage Symbol Conditions -0.5 to +0.3 -0.5 to VDD+0.3 AVREF VI1 V -0.5 to +0.3 P00, P01, P10 to P17, P20 to P24, V -0.3 to VDD+0.3 AVSS Input voltage V Note V P30 to P33, P70, P120 to P122, RESET, FLMD0 VI2 REGC pin input voltage Output voltage -0.3 to +6.5 V -0.5 to +3.6 and -0.5 to VDD V P60, P61 (N-ch open drain) VIREGC VO Analog input voltage VAN -0.3 to VDD+0.3 Note -0.3 to AVREF+0.3 ANI0 to ANI4 Note and -0.3 to VDD+0.3 Output current, high IOH1 V V Note -10 Per pin mA mA Total of all pins P00, P01, P120 -25 -80 mA P10 to P17, -55 P30 to P33, P70 IOH2 Per pin P20 to P24 Per pin mA -2 Total of all pins IOH3 -0.5 P121, P122 -1 mA Total of all pins Output current, low IOL1 -4 Per pin 30 mA mA Total of all pins P00, P01, P120 60 200 mA P10 to P17, 140 P30 to P33, P60, P61, P70 IOL2 Per pin P20 to P24 Total of all pins IOL3 Per pin 1 mA 5 P121, P122 Total of all pins 4 mA 10 Note Must be 6.5 V or lower. Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins. User's Manual U18867EJ4V0UD U18867EJ4V0UD 57 CHAPTER 8 ELECTRICAL SPECIFICATIONS (A) GRADE PRODUCTS Absolute Maximum Ratings for Analog block (TA = 25°C) Parameter Symbol Conditions Ratings Unit VSUP, HDS, 400 ms -0.3 to +60 V VSUP, HDS, 2 min -0.3 to +28 V VSUP3 VSUP, HDS -0.3 to +20 V VRO Input voltage VSUP1 VSUP2 Supply voltage VRO -0.3 to +6.5 V VIA1 VIC, LIN, Dr21_I, Dr22_I, 400 ms, -0.3 to +60 V -0.3 to +28 V Dr21_I and Dr22_I are input pin potentials with external 47 k resistors. VIA2 VIC, LIN, Dr21_I, Dr22_I, 2 min, Dr21_I and Dr22_I are input pin potentials with external 47 k resistors. VIA3 -0.3 to +20 VIC, LIN VIA4 MSLP, UMODE, Dr1_I, Dr3_I, Dr4_I Input current IDRin Dr21_I, Dr22_I LIN negative voltage VILlin LIN, 7 VVSUP19 VVSUP19 V, 1 s Output voltage VOA1 -0.3 to VRO+0.3 V Note V mA VSUP-60 VSUP-60 V LIN, Dr1, Dr21, Dr22, Dr3, Dr4, 400 ms -0.3 to +60 V VOA2 LIN, Dr1, Dr21, Dr22, Dr3, Dr4, 2 min -0.3 to +28 V VOA3 LIN, Dr1, Dr21, Dr22, Dr3, Dr4 -0.3 to +20 V ICM1 VRO 25 mA ICM2 VRO 1 s 65 mA ILIN LIN 200 mA IDr1 Dr1 10 mA IDr2 Dr21, Dr22 150 mA IDr3 Dr3 50 mA IDr4 Output current 1.5 Dr4 -40 mA Ratings Unit Note Must be 6.5 V or lower. Absolute Maximum Ratings for Common Item (TA = 25°C) Parameter Symbol Conditions Operation ambient temparatuer TA -40 to +85 °C Storage temperature Tstg -65 to +150 °C Junction temperature Tjmaxv 140 °C Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. 58 User's Manual U18867EJ4V0UD U18867EJ4V0UD CHAPTER 8 ELECTRICAL SPECIFICATIONS (A) GRADE PRODUCTS 8.2 Microcontroller Block Characteristics X1 Oscillator Characteristics (TA = -40 to +85 °C, 1.8 VVDD5.5 V, VSS = AVSS = 0 V) Resonator Recommended Circuit Ceramic resonator, Crystal resonator VSS X1 C1 X2 Parameter X1 Clock Oscillation Note 1 frequency (fX) Conditions 2.7 V VDD 5.5 V 1.8 V VDD < 2.7 V MIN. 1.0 Note 2 1.0 TYP. MAX. 20.0 Unit MHz 5.0 C2 Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time. 2. It is 2.0 MHz (MIN.) when programming on the board via UART6. Cautions 1. When using the X1 oscillator, w