PD789800 PD78F9801 U12978EJ3V3UD00 U12978EJ3V3UD HP9000 U12978EJ3V2UD00 78K/0S - Datasheet Archive

 

Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology

 

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": 8. 9. 10. 11. 12. Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anticrime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. User's Manual µPD789800 PD789800 Subseries 8-Bit Single-Chip Microcontrollers µPD789800 PD789800 µPD78F9801 PD78F9801 Document No. U12978EJ3V3UD00 U12978EJ3V3UD00 (3rd edition) Date Published August 2005 N CP (K) 1998, 2003 Printed in Japan [MEMO] 2 User's Manual U12978EJ3V3UD U12978EJ3V3UD NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. User's Manual U12978EJ3V3UD U12978EJ3V3UD 3 FIP and EEPROM are trademarks of NEC Electronics Corporation. Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of International Business Machines Corporation. HP9000 HP9000 Series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc. Solaris and SunOS are trademarks of Sun Microsystems, Inc. 4 User's Manual U12978EJ3V3UD U12978EJ3V3UD These commodities, technology or software, must be exported in accordance with the export administration regulations of the exporting country. Diversion contrary to the law of that country is prohibited. · The information in this document is current as of August, 2005. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. · No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. · NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. · Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. · While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. · NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1 User's Manual U12978EJ3V3UD U12978EJ3V3UD 5 Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and distributors. They will verify: · Device availability · Ordering information · Product release schedule · Availability of related technical literature · Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth) · Network requirements In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. [GLOBAL SUPPORT] http://www.necel.com/en/support/support.html NEC Electronics America, Inc. (U.S.) NEC Electronics (Europe) GmbH NEC Electronics Hong Kong Ltd. Santa Clara, California Tel: 408-588-6000 800-366-9782 Duesseldorf, Germany Tel: 0211-65030 Hong Kong Tel: 2886-9318 · Sucursal en España Madrid, Spain Tel: 091-504 27 87 · Succursale Française Vélizy-Villacoublay, France Tel: 01-30-67 58 00 · Filiale Italiana Milano, Italy Tel: 02-66 75 41 · Branch The Netherlands Eindhoven, The Netherlands Tel: 040-265 40 10 · Tyskland Filial NEC Electronics Hong Kong Ltd. Seoul Branch Seoul, Korea Tel: 02-558-3737 NEC Electronics Shanghai Ltd. Shanghai, P.R. China Tel: 021-5888-5400 NEC Electronics Taiwan Ltd. Taipei, Taiwan Tel: 02-2719-2377 NEC Electronics Singapore Pte. Ltd. Novena Square, Singapore Tel: 6253-8311 Taeby, Sweden Tel: 08-63 87 200 · United Kingdom Branch Milton Keynes, UK Tel: 01908-691-133 J05.6 6 User's Manual U12978EJ3V3UD U12978EJ3V3UD Major Revisions in This Edition (1/2) Page Throughout Contents Deletion of CU-type and GB-3BS type packages Deletion of indication "under development" for µPD78F9801 PD78F9801 p. 21 Modification of operating ambient temperature when flash memory is written in 1.1 Features p. 27 Addition of outline of timer in 1.7 Functions pp. 29, 31 to 33 Modification of handling of REGC and VPP pins pp. 35, 36 Correction of address values in Figure 3-1 Memory Map (µPD789800 PD789800) and Figure 3-2 Memory Map (µPD78F9801 PD78F9801) p. 75 Modification of Figure 5-3 External Circuit of System Clock Oscillator (b) External clock pp. 98, 103, 105, CHAPTER 8 USB FUNCTION 106, · Modification of chapter composition 108 to 112, · Standardization of buffer name indications as receive token bank, receive data bank, and transmit data 115 to 117, 120, 125, 127 to 130 banks 0 and 1 · Addition of image diagrams for reception and transmission · Addition of register value for SETUP reception · Modification of description on data handshake packet receive mode register (URXMOD) · Addition of description on packet receive status register (RXSTAT) and modification of read-only bit · Addition of Note for token packet receive result store register (TRXRSL) · Addition of Caution for data packet transmit reservation register (DTXRSV) · Modification of description of bit 1 (DNAEN) of handshake packet transmit reservation register (HTXRSV) · Change of contents of 8.5.2 Remote wakeup control operation · Addition of Table 8-4 List of Sources of Interrupts from USB Function · Correction of incorrect flag name in 8.6 Interrupt Request from USB Function · Addition of description on USB reset/Resume detection interrupt (INTUSBRE) · Addition of 8.7 USB Function Control p. 162 Modification of Figure 10-1 Block Diagram of Regulator and USB Driver/Receiver and Cautions p. 164 Addition of Remark in Table 11-1 Interrupt Source List p. 167 Addition of Caution 3 on watchdog timer interrupt to Figure 11-2 Format of Interrupt Request Flag Register p. 184 Addition of 12.2.2 STOP mode (3) Cautions on STOP instruction execution pp. 191 to 199 Revision of contents of flash memory programming as 14.1 Flash Memory Characteristics pp. 210 to 218 Addition of CHAPTER 16 ELECTRICAL SPECIFICATIONS p. 219 Addition of CHAPTER 17 PACKAGE DRAWING p. 220 Addition of CHAPTER 18 RECOMMENDED SOLDERING CONDITIONS pp. 221 to 228 Revision of APPENDIX A DEVELOPMENT TOOLS Deletion of embedded software and addition of notes on target system design pp. 233, 234 Addition of the revision contents in 3rd edition in APPENDIX C REVISION HISTORY Major revisions in modification version (U12978EJ3V2UD00 U12978EJ3V2UD00) p. 88 Modification of Figure 6-8. Timing of External Event Counter Operation (with Rising Edge Specified) p. 213 Modification of conditions of VIL2 and VOL2 in CHAPTER 16 ELECTRICAL SPECIFICATIONS The mark shows major revised points. User's Manual U12978EJ3V3UD U12978EJ3V3UD 7 Major Revisions in This Edition (2/2) Page Contents Major revisions in modification version (U12978EJ3V3UD00 U12978EJ3V3UD00) pp. 22, 23 p. 221 Addition of lead-free products in CHAPTER 1 GENERAL Addition of soldering conditions of lead-free products in Table 18-1 Surface Mounting Type Soldering Conditions The mark 8 shows major revised points. User's Manual U12978EJ3V3UD U12978EJ3V3UD INTRODUCTION Readers This manual is intended for users who wish to understand the functions of the µPD789800 PD789800 Subseries and who design and develop its application systems and programs. Target products: · µPD789800 PD789800 Subseries: µPD789800 PD789800 and µPD78F9801 PD78F9801 Purpose This manual is intended to give users an understanding of the functions described in the Organization below. Organization Two manuals are available for the µPD789800 PD789800 Subseries: This manual and the Instruction Manual (common to the 78K/0S 78K/0S Series). 78K/0S 78K/0S Series µPD789800 PD789800 Subseries User's Manual User's Manual Instruction · Pin functions · CPU function · Internal block functions · Instruction set · Interrupts · Instruction description · Other internal peripheral functions · Electrical specifications How to Read This Manual It is assumed that the readers of this manual have general knowledge in the fields of electrical engineering, logic circuits, and microcontrollers. · To understand the overall functions of the µPD789800 PD789800 Subseries Read this manual in the order of the CONTENTS. · How to read register formats The name of a bit whose number is enclosed in angle brackets (< >) is reserved in the assembler and is defined in the C compiler by the header file sfrbit.h. · To learn the detailed functions of a register whose register name is known See APPENDIX B REGISTER INDEX. · To learn details of the instruction functions of the 78K/0S 78K/0S Series Refer to 78K/0S 78K/0S Series Instruction User's Manual (U11047E U11047E) separately available. · To know the electrical specifications of the µPD789800 PD789800 Subseries Refer to CHAPTER 16 ELECTRICAL SPECIFICATIONS. Conventions Data significance: Higher digits on the left and lower digits on the right Active low representation: xxx (overscore over pin or signal name) Note: Footnote for item marked with Note in the text Caution: Information requiring particular attention Remark: Supplementary information Numerical representation: Binary . xxxx or xxxxB Decimal . xxxx Hexadecimal . xxxxH User's Manual U12978EJ3V3UD U12978EJ3V3UD 9 Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name Document No. µPD789800 PD789800 Subseries User's Manual This manual 78K/0S 78K/0S Series Instructions User's Manual U11047E U11047E Documents Related to Development Tools (Software) (User's Manuals) Document Name RA78K0S RA78K0S Assembler Package Document No. Operation Language U14877E U14877E Structured Assembly Language U11623E U11623E Operation CC78K0S CC78K0S C Compiler U14876E U14876E U14871E U14871E Language SM78K SM78K Series System Simulator Ver. 2.30 or Later U14872E U14872E TM Operation (Windows Based) U15373E U15373E External Part User Open Interface Specifications Operation (Windows Based) ID78K ID78K Series Integrated Debugger U15802E U15802E U15185E U15185E Ver. 2.30 or Later Project Manager Ver. 3.12 or Later (Windows Based) U14610E U14610E Documents Related to Development Tools (Hardware) (User's Manuals) Document Name Document No. IE-78K0S-NS IE-78K0S-NS In-Circuit Emulator U13549E U13549E IE-78K0S-NS-A IE-78K0S-NS-A In-Circuit Emulator U15207E U15207E IE-789801-NS-EM1 IE-789801-NS-EM1 Emulation Board U13390E U13390E Documents Related to Flash Memory Writing Document Name Document No. PG-FP3 Flash Memory Programmer User's Manual U13502E U13502E PG-FP4 Flash Memory Programmer User's Manual U15260E U15260E Other Related Documents Document Name Document No. SEMICONDUCTOR SELECTION GUIDE - Products and Packages - (CD-ROM) X13769X X13769X Semiconductor Device Mounting Technology Manual C10535E C10535E Quality Grades on NEC Semiconductor Devices C11531E C11531E NEC Semiconductor Device Reliability/Quality Control System C10983E C10983E Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E C11892E Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document for designing. 10 User's Manual U12978EJ3V3UD U12978EJ3V3UD TABLE OF CONTENTS CHAPTER 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 Features. 22 Applications . 22 Ordering Information . 22 Pin Configuration (Top View) . 23 78K/0S 78K/0S Series Lineup. 24 Block Diagram . 27 Functions . 28 CHAPTER 2 2.1 2.2 GENERAL. 22 PIN FUNCTIONS . 29 List of Pin Functions. 29 Pin Functions. 31 2.2.1 P00 to P07 (Port 0).31 2.2.2 P10 to P17 (Port 1).31 2.2.3 P20 to P26 (Port 2).31 2.2.4 P40 to P47 (Port 4).32 2.2.5 RESET .32 2.2.6 X1, X2.32 2.2.7 REGC .32 2.2.8 USBDM .32 2.2.9 USBDP .32 2.2.10 VSS0, VSS1 .32 2.2.12 VPP (µPD78F9801 PD78F9801 only).33 2.2.13 2.3 VDD0, VDD1 .32 2.2.11 IC (mask ROM version only) .33 Pin I/O Circuits and Recommended Connection of Unused Pins. 34 CHAPTER 3 3.1 CPU ARCHITECTURE . 36 Memory Space . 36 3.1.1 Internal data memory (internal high-speed RAM) space.38 3.1.3 Special function register (SFR) area.38 3.1.4 3.2 Internal program memory space.38 3.1.2 Data memory addressing .39 Processor Registers . 41 3.2.1 3.2.2 General-purpose registers .44 3.2.3 3.3 Control registers .41 Special function registers (SFRs) .45 Instruction Address Addressing . 49 3.3.1 Relative addressing .49 3.3.2 Immediate addressing .50 3.3.3 Table indirect addressing .51 User's Manual U12978EJ3V3UD U12978EJ3V3UD 11 3.3.4 3.4 Register addressing . 51 Operand Address Addressing.52 3.4.1 Direct addressing . 52 3.4.2 Short direct addressing . 53 3.4.3 Special function register (SFR) addressing. 54 3.4.4 Register addressing . 55 3.4.5 Register indirect addressing. 56 3.4.6 Based addressing . 57 3.4.7 Stack addressing . 57 CHAPTER 4 4.1 4.2 PORT FUNCTIONS.58 Port Functions.58 Port Configuration .60 4.2.1 4.2.2 Port 1 . 62 4.2.3 Port 2 . 63 4.2.4 4.3 4.4 Port 0 . 61 Port 4 . 69 Registers Controlling Port Function.70 Port Function Operation.73 4.4.1 Writing to I/O port. 73 4.4.2 Reading from I/O port . 73 4.4.3 Arithmetic operation of I/O port . 73 CHAPTER 5 5.1 5.2 5.3 5.4 CLOCK GENERATOR .74 Clock Generator Functions.74 Clock Generator Configuration .74 Register Controlling Clock Generator .75 System Clock Oscillators.76 5.4.1 Examples of incorrect resonator connection . 77 5.4.3 5.5 5.6 System clock oscillator. 76 5.4.2 Frequency divider . 78 Clock Generator Operation .78 Changing Setting of CPU Clock .79 5.6.1 Time required for switching CPU clock . 79 5.6.2 Switching CPU clock. 79 CHAPTER 6 6.1 6.2 6.3 6.4 8-BIT TIMER/EVENT COUNTERS 00 AND 01 .80 Functions of 8-Bit Timer/Event Counters 00 and 01 .80 Configuration of 8-Bit Timer/Event Counters 00 and 01.81 Registers Controlling 8-Bit Timer/Event Counters 00 and 01 .83 Operation of 8-Bit Timer/Event Counters 00 and 01 .86 6.4.1 6.4.2 12 Operation as external event counter (timer 01 only) . 88 6.4.3 6.5 Operation as interval timer . 86 Operation as square-wave output (timer 01 only) . 89 Notes on Using 8-Bit Timer/Event Counters 00 and 01 .91 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 7 7.1 7.2 7.3 7.4 WATCHDOG TIMER . 92 Watchdog Timer Functions . 92 Watchdog Timer Configuration . 93 Registers Controlling Watchdog Timer . 94 Watchdog Timer Operation . 96 7.4.1 Operation as watchdog timer.96 7.4.2 Operation as interval timer .97 CHAPTER 8 8.1 8.2 8.3 8.4 8.5 USB FUNCTION . 98 USB Overview . 98 USB Function Features. 99 USB Function Configuration . 99 Registers Controlling USB Function. 110 USB Function Operation. 123 8.5.1 8.5.2 8.6 USB timer operation .123 Remote wakeup control operation .126 Interrupt Request from USB Function . 128 8.6.1 8.6.2 8.7 Interrupt sources.128 Cautions when using interrupts .130 USB Function Control. 131 8.7.1 8.7.2 8.8 Relationship between packets and operation modes.131 Interrupt servicing flow.137 USB Function Internal Circuit Operations . 141 8.8.1 Operation of transmit/receive pointer.141 8.8.2 Receive bank switching ID detection buffer operation .148 8.8.3 Sync detection/USBCLK detector operation .149 8.8.4 NRZI encoder operation .151 8.8.5 Bit stuffing/strip controller operation .152 CHAPTER 9 9.1 9.2 9.3 9.4 SERIAL INTERFACE 10 . 155 Functions of Serial Interface 10. 155 Configuration of Serial Interface 10 . 156 Register Controlling Serial Interface 10. 158 Operation of Serial Interface 10 . 160 9.4.1 Operation stop mode .160 9.4.2 3-wire serial I/O mode .161 CHAPTER 10 REGULATOR . 163 CHAPTER 11 INTERRUPT FUNCTIONS. 164 11.1 11.2 11.3 11.4 Interrupt Function Types . 164 Interrupt Sources and Configuration . 164 Registers Controlling Interrupt Function. 167 Interrupt Servicing Operation . 172 11.4.1 Non-maskable interrupt acknowledgment operation.172 User's Manual U12978EJ3V3UD U12978EJ3V3UD 13 11.4.2 Maskable interrupt acknowledgment operation. 174 11.4.3 Multiplexed interrupt servicing. 176 11.4.4 Interrupt request hold. 178 CHAPTER 12 STANDBY FUNCTION.179 12.1 Standby Function and Configuration .179 12.1.1 Standby function . 179 12.1.2 Register controlling standby function . 180 12.2 Standby Function Operation.181 12.2.1 HALT mode. 181 12.2.2 STOP mode . 184 CHAPTER 13 RESET FUNCTION .187 CHAPTER 14 µPD78F9801 PD78F9801.191 14.1 Flash Memory Characteristics.192 14.1.1 Programming environment. 192 14.1.2 Communication mode . 193 14.1.3 On-board pin processing. 196 14.1.4 Connection of adapter for flash writing. 199 CHAPTER 15 INSTRUCTION SET .201 15.1 Operation .201 15.1.1 Operand identifiers and description methods. 201 15.1.2 Description of "operation" column . 202 15.1.3 Description of "flag operation" column . 202 15.2 Operation List.203 15.3 Instructions Listed by Addressing Type .208 CHAPTER 16 ELECTRICAL SPECIFICATIONS.211 CHAPTER 17 PACKAGE DRAWINGS.220 CHAPTER 18 RECOMMENDED SOLDERING CONDITIONS .221 APPENDIX A DEVELOPMENT TOOLS .222 A.1 A.2 A.3 A.4 A.5 A.6 A.7 Software Package .224 Language Processing Software .224 Control Software .225 Flash Memory Writing Tools.225 Debugging Tools (Hardware).226 Debugging Tools (Software) .227 Notes on Target System Design.228 APPENDIX B 14 REGISTER INDEX .230 User's Manual U12978EJ3V3UD U12978EJ3V3UD B.1 B.2 Register Index (Alphabetic Order of Register Name) . 230 Register Index (Alphabetic Order of Register Symbol). 232 APPENDIX C REVISION HISTORY . 234 User's Manual U12978EJ3V3UD U12978EJ3V3UD 15 LIST OF FIGURES (1/4) Figure No. Title Page 2-1 Pin I/O Circuits. 35 3-1 Memory Map (µPD789800 PD789800). 36 3-2 Memory Map (µPD78F9801 PD78F9801) . 37 3-3 Data Memory Addressing (µPD789800 PD789800) . 39 3-4 Data Memory Addressing (µPD78F9801 PD78F9801) . 40 3-5 Configuration of Program Counter . 41 3-6 Configuration of Program Status Word . 41 3-7 Configuration of Stack Pointer . 43 3-8 Data to Be Saved to Stack Memory. 43 3-9 Data to Be Restored from Stack Memory . 43 3-10 Configuration of General-Purpose Registers . 44 4-1 Port Types . 58 4-2 Block Diagram of P00 to P07. 61 4-3 Block Diagram of P10 to P17. 62 4-4 Block Diagram of P20 . 63 4-5 Block Diagram of P21 . 64 4-6 Block Diagram of P22 . 65 4-7 Block Diagram of P23 and P24. 66 4-8 Block Diagram of P25 . 67 4-9 Block Diagram of P26 . 68 4-10 Block Diagram of P40 to P47. 69 4-11 Format of Port Mode Register. 70 4-12 Format of Pull-up Resistor Option Register 0 . 71 4-13 Format of Port Output Mode Register 0 . 72 4-14 Format of Port Output Mode Register 1 . 72 5-1 Block Diagram of Clock Generator. 74 5-2 Format of Processor Clock Control Register. 75 5-3 External Circuit of System Clock Oscillator. 76 5-4 Examples of Incorrect Resonator Connection. 77 5-5 Switching of CPU Clock . 79 6-1 Block Diagram of 8-Bit Timer 00 . 81 6-2 Block Diagram of 8-Bit Timer/Event Counter 01 . 82 6-3 Format of 8-Bit Timer Mode Control Register 01 . 84 6-5 Format of Port Mode Register 2. 85 6-6 16 Format of 8-Bit Timer Mode Control Register 00 . 83 6-4 Interval Timer Operation Timing of 8-Bit Timer 00 . 87 User's Manual U12978EJ3V3UD U12978EJ3V3UD LIST OF FIGURES (2/4) Figure No. Title Page 6-7 Interval Timer Operation Timing of 8-Bit Timer/Event Counter 01. 87 6-8 Timing of External Event Counter Operation (with Rising Edge Specified) . 88 6-9 Timing of Square-Wave Output . 90 6-10 Start Timing of 8-Bit Timer Counter. 91 6-11 Timing of External Event Counter Operation . 91 7-1 Block Diagram of Watchdog Timer. 93 7-2 Format of Timer Clock Select Register 2. 94 7-3 Format of Watchdog Timer Mode Register. 95 8-1 USB Bus Topology (Desktop Type PC). 98 8-2 Block Diagram of USB Function . 100 8-3 Block Diagram of USB Timer. 101 8-4 Configuration of Receive Token Bank . 103 8-5 Configuration of Receive Data Bank. 104 8-6 Configuration of Transmit Data Bank 0 (Buffer 0). 105 8-7 Configuration of Transmit Data Bank 1 (Buffer 1). 106 8-8 Configuration of TIDCMP and ADRCMP . 108 8-9 Configuration of DIDCMP . 109 8-10 Format of USB Receiver Enable Register . 110 8-11 Format of Data/Handshake Packet Receive Mode Register . 111 8-12 Format of Packet Receive Status Register. 113 8-13 Format of Data/Handshake Packet Receive Result Store Register. 114 8-14 Format of Token Packet Receive Result Store Register . 115 8-15 Format of Data Packet Transmit Reservation Register . 116 8-16 Format of Handshake Packet Transmit Reservation Register. 117 8-17 Configuration of Handshake Packet Transmit Reservation Register . 120 8-18 Format of USB Timer Start Reservation Control Register . 121 8-19 Format of Remote Wakeup Control Register. 122 8-20 Flowchart of USB Timer Operation. 124 8-21 Flow Chart of Remote Wakeup Control Operation . 126 8-22 Configuration of Remote Wakeup Control . 127 8-23 Timing of Data/Handshake Packet Receive Interrupt Request Generation . 128 8-24 Timing of INTUSBRE Generation. 129 8-25 Flowchart of Transmit/Receive Pointer Operation . 141 8-26 Flowchart of Receive Bank Switching ID Detection Buffer Operation. 148 8-27 Timing of Sync Detection/USBCLK Detector Operation . 149 8-28 Timing of Sync Detection/USBCLK Generation Operation . 149 8-29 Flowchart of Sync Detection/USBCLK Detector Operation . 150 8-30 Timing of NRZI Encoder Operation . 151 User's Manual U12978EJ3V3UD U12978EJ3V3UD 17 LIST OF FIGURES (3/4) Figure No. Title Page 8-31 Flow Chart of NRZI Encoder Operation . 151 8-32 Timing of Bit Stuffing/Strip Controller Operation . 152 8-33 Flow Chart of Bit Stuffing Control Operation . 153 8-34 Flow Chart of Bit Strip Control Operation. 154 9-1 Block Diagram of Serial Interface 10. 157 9-2 Format of Serial Operation Mode Register 10 . 158 9-3 3-Wire Serial I/O Mode Timing. 162 10-1 Block Diagram of Regulator and USB Driver/Receiver . 163 11-1 Basic Configuration of Interrupt Function. 166 11-2 Format of Interrupt Request Flag Register. 168 11-3 Format of Interrupt Mask Flag Register . 169 11-4 Format of External Interrupt Mode Register 0. 169 11-5 Configuration of Program Status Word . 170 11-6 Format of Key Return Mode Register 00 . 171 11-7 Block Diagram of Falling Edge Detector . 171 11-8 Flowchart of Non-Maskable Interrupt Request Acknowledgment. 173 11-9 Timing of Non-Maskable Interrupt Request Acknowledgment . 173 11-10 Acknowledging Non-Maskable Interrupt Request . 173 11-11 Interrupt Acknowledgment Program Algorithm . 174 11-12 Timing of Interrupt Request Acknowledgment (Example of MOV A,r) . 175 11-13 Timing of Interrupt Request Acknowledgment (When Interrupt Request Flag Is Generated at Last Clock of Instruction Execution) . 175 11-14 Example of Multiplexed Interrupt Servicing. 177 12-1 Format of Oscillation Stabilization Time Select Register. 180 12-2 Releasing HALT Mode by RESET Input . 183 12-4 Releasing STOP Mode by Interrupt . 185 12-5 Releasing STOP Mode by RESET Input. 186 13-1 Block Diagram of Reset Function . 187 13-2 Reset Timing by RESET Input . 188 13-3 Reset Timing by Overflow in Watchdog Timer. 188 13-4 Reset Timing by RESET Input in STOP Mode. 188 14-1 Environment for Writing Program to Flash Memory . 192 14-2 18 Releasing HALT Mode by Interrupt. 182 12-3 Communication Mode Selection Format . 193 User's Manual U12978EJ3V3UD U12978EJ3V3UD LIST OF FIGURES (4/4) Figure No. Title Page 14-3 Example of Connection with Dedicated Flash Programmer . 194 14-4 VPP Pin Connection Example. 196 14-5 Signal Conflict (Input Pin of Serial Interface) . 197 14-6 Abnormal Operation of Other Device. 197 14-7 Signal Conflict (RESET Pin) . 198 14-8 Wiring Example for Flash Writing Adapter with 3-Wire Serial I/O . 199 14-9 Wiring Example for Flash Writing Adapter with Pseudo-3-Wire Method. 200 A-1 Development Tools . 223 A-2 Distance Between In-Circuit Emulator and Conversion Adapter. 228 A-3 Connection Condition of Target System (NP-H44GB-TQ NP-H44GB-TQ). 229 User's Manual U12978EJ3V3UD U12978EJ3V3UD 19 LIST OF TABLES (1/2) Table No. Title Page 2-1 Type of Pin I/O Circuit Recommended Connection of Unused Pins . 34 3-1 Vector Table . 38 3-2 Special Function Register List . 46 4-1 Functions of Ports. 59 4-2 Configuration of Port . 60 4-3 Port Mode Register and Output Latch Settings When Using Alternate Functions. 71 5-1 Configuration of Clock Generator. 74 5-2 Maximum Time Required for Switching CPU Clock . 79 6-1 Interval Time of 8-Bit Timer 00. 80 6-2 Interval Time of 8-Bit Timer/Event Counter 01. 80 6-3 Square Wave Output Range of 8-Bit Timer/Event Counter 01. 81 6-4 Configuration of 8-Bit Timer/Event Counters 00 and 01. 81 6-5 Interval Time of 8-Bit Timer 00. 86 6-6 Interval Time of 8-Bit Timer/Event Counter 01. 86 6-7 Square-Wave Output Range of 8-Bit Timer/Event Counter 01 . 89 7-1 Inadvertent Loop Detection Time of Watchdog Timer. 92 7-2 Interval Time . 92 7-3 Configuration of Watchdog Timer . 93 7-4 Inadvertent Loop Detection Time of Watchdog Timer. 96 7-5 Interval Time of Interval Timer . 97 8-1 Configuration of USB Function . 99 8-2 Flag of RXSTAT After Reception of USB Reset Signal and Resume Signal . 114 8-3 List of Sources of Interrupts from USB Function. 128 9-1 Configuration of Serial Interface 10. 156 9-2 Operating Mode Settings of Serial Interface 10 . 159 11-1 Interrupt Source List . 165 11-2 Flags Corresponding to Interrupt Request Signals . 167 11-3 Time from Generation of Maskable Interrupt Request to Servicing. 174 12-1 HALT Mode Operation Status. 181 12-2 20 Conditions in Transmit Reservation . 118 8-4 Operation After Release of HALT Mode . 183 User's Manual U12978EJ3V3UD U12978EJ3V3UD LIST OF TABLES (2/2) Table No. Title Page 12-3 STOP Mode Operation Status. 184 12-4 Operation After Release of STOP Mode . 186 13-1 Hardware Status After Reset. 189 14-1 Differences Between µPD78F9801 PD78F9801 and Mask ROM Versions. 191 14-2 Communication Mode List . 193 14-3 Pin Connection List . 195 15-1 Operand Identifiers and Description Methods . 201 18-1 Surface Mounting Type Soldering Conditions . 221 User's Manual U12978EJ3V3UD U12978EJ3V3UD 21 CHAPTER 1 GENERAL 1.1 Features · On-chip USB functions · Implements a USB (Universal Serial Bus) by connecting to Hub and Host. · Transfer speed: 1.5 Mbps (at 6.0 MHz operation with system clock) · On-chip regulator · Controls the USB port voltage by using a bus power supply (VREG = 3.3 ±0.3 V) dedicated to the USB driver/receiver. · On-chip ROM and RAM · Internal ROM: 8 KB Flash memory (for µPD78F9801 PD78F9801 only): 16 KB · Internal high-speed RAM: 256 bytes · Variable minimum instruction execution time: From high-speed (0.33 µs) to low speed (1.33 µs) with the system clock operating at 6.0 MHz · 31 I/O ports · Two serial interface channels · USB function · 3-wire serial I/O mode · Three timers: · 8-bit timer · 8-bit timer/event counter · Watchdog timer · On-chip key return signal detector · 12 vectored interrupt sources · Power supply voltage: VDD = 4.0 to 5.5 V · Operating ambient temperature: TA = ­40 to +85°C (when the USB is not operating) TA = 0 to +70°C (when the USB is operating) TA = 10 to 40°C (when the flash memory is written) 1.2 Applications USB keyboards, etc. 1.3 Ordering Information Part Number µPD789800GB- PD789800GB-×××-8ES µPD78F9801GB-8ES PD78F9801GB-8ES µPD789800GB- PD789800GB-×××-8ES-A µPD78F9801GB-8ES-A PD78F9801GB-8ES-A Package 44-pin plastic LQFP (10 × 10) Internal ROM Mask ROM 44-pin plastic LQFP (10 × 10) Flash memory 44-pin plastic LQFP (10 × 10) Mask ROM 44-pin plastic LQFP (10 × 10) Flash memory Remarks 1. Products that have the part numbers suffixed by "-A" are lead-free products. 2. ××× indicates ROM code suffix. 22 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 1 GENERAL 1.4 Pin Configuration (Top View) · 44-pin plastic LQFP (10 × 10) P26/TI01/TO01/INTP0 P26/TI01/TO01/INTP0 P25 P24 NC P23 P22/SI10 P22/SI10 P21/SO10 P21/SO10 P20/SCK10 P20/SCK10 P07 P06 µPD78F9801GB-8ES PD78F9801GB-8ES µPD78F9801GB-8ES-A PD78F9801GB-8ES-A P05 µPD789800GB- PD789800GB-×××-8ES µPD789800GB- PD789800GB-×××-8ES-A P04 1 44 43 42 41 40 39 38 37 36 35 34 33 USBDP P03 2 32 USBDM P02 3 31 IC (VPP) P01 4 30 REGC 9 25 RESET P15 10 24 P40/KR00 P40/KR00 P14 11 23 12 13 14 15 16 17 18 19 20 21 22 P41/KR01 P41/KR01 Cautions P42/KR02 P42/KR02 P16 P43/KR03 P43/KR03 X2 P44/KR04 P44/KR04 X1 26 P45/KR05 P45/KR05 27 8 P46/KR06 P46/KR06 7 P17 P47/KR07 P47/KR07 VSS1 P10 VSS0 P11 VDD0 28 P12 29 6 NC 5 P13 P00 VDD1 1. Connect the IC pin directly to the VSS0 pin. 2. Directly connect the VPP pin to the VSS0 pin in the normal operation mode. Remark IC: The parenthesized values apply to the µPD78F9801 PD78F9801. Internally connected SI10: INTP0: Interrupt from peripherals KR00 to KR07 : Key return Serial data input SO10: Serial data output TI01: Timer input Timer output NC: No connection TO01: P00 to P07: Port 0 USBDM, USBDP: Universal serial bus data P10 to P17: Port 1 VDD0: Port power supply P20 to P26: Port 2 VDD1: Power supply P40 to P47: Port 4 VPP: Programming power supply RESET : Reset VSS0: Port ground REGC: Voltage regulator for USB function VSS1: Ground SCK10 SCK10 : Serial clock input/output X1, X2: Crystal User's Manual U12978EJ3V3UD U12978EJ3V3UD 23 CHAPTER 1 GENERAL 1.5 78K/0S 78K/0S Series Lineup The products in the 78K/0S 78K/0S Series are listed below. The names enclosed in boxes are subseries names. Products in mass production Products under development Y subseries supports SMB. Small-scale package, general-purpose applications µ PD789074 PD789074 with subsystem clock added µ PD789014 PD789014 with enhanced timer function and expanded ROM and RAM µ PD789074 PD789074 with enhanced timer function and expanded ROM and RAM µ PD789026 PD789026 with enhanced timer function µ PD789046 PD789046 µ PD789026 PD789026 µ PD789088 PD789088 µ PD789074 PD789074 µ PD789014 PD789014 µ PD789062 PD789062 µ PD789052 PD789052 44-pin 42-/44-pin 30-pin 30-pin 28-pin 20-pin 20-pin On-chip UART and capable of low-voltage (1.8 V) operation RC oscillation version of µ PD789052 PD789052 µ PD789860 PD789860 without EEPROMTM, POC, and LVI Small-scale package, general-purpose applications and A/D function µ PD789177 PD789177 µ PD789167 PD789167 µ PD789156 PD789156 µ PD789146 PD789146 µ PD789134A PD789134A µ PD789124A PD789124A µ PD789114A PD789114A µ PD789104A PD789104A 44-pin 44-pin 30-pin 30-pin 30-pin 30-pin 30-pin 30-pin µ PD789177Y PD789177Y µ PD789167Y PD789167Y µ PD789167 PD789167 with 10-bit A/D µ PD789104A PD789104A with enhanced timer µ PD789146 PD789146 with 10-bit A/D µ PD789104A PD789104A with EEPROMTM added µ PD789124A PD789124A with 10-bit A/D RC oscillation version of µ PD789104A PD789104A µ PD789104A PD789104A with 10-bit A/D µ PD789026 PD789026 with 8-bit A/D and multiplier added LCD drive µ PD789835 PD789835 µ PD789830 PD789830 µ PD789489 PD789489 µ PD789479 PD789479 µ PD789417A PD789417A µ PD789407A PD789407A µ PD789456 PD789456 µ PD789446 PD789446 µ PD789436 PD789436 µ PD789426 PD789426 µ PD789316 PD789316 µ PD789306 PD789306 µ PD789467 PD789467 µ PD789327 PD789327 144-pin 88-pin 80-pin 78K/0S 78K/0S Series 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 52-pin 52-pin UART + 8-bit A/D + dot LCD (total display outputs: 96) UART + dot LCD (40 × 16) SIO + 10-bit A/D + internal voltage boosting method LCD (28 × 4) SIO + 8-bit A/D + resistance division method LCD (28 × 4) µ PD789407A PD789407A with 10-bit A/D SIO + 8-bit A/D + resistance division method LCD (28 × 4) µ PD789446 PD789446 with 10-bit A/D SIO + 8-bit A/D + internal voltage boosting method LCD (15 × 4) µ PD789426 PD789426 with 10-bit A/D SIO + 8-bit A/D + internal voltage boosting method LCD (5 × 4) RC oscillation version of µPD789306 PD789306 SIO + internal voltage boosting method LCD (24 × 4) 8-bit A/D + internal voltage boosting method LCD (23 × 4) SIO + resistance division method LCD (24 × 4) USB 44-pin µ PD789800 PD789800 For PC keyboard. On-chip USB function Inverter control 44-pin µ PD789842 PD789842 On-chip inverter controller and UART On-chip bus controller 30-pin µ PD789850 PD789850 On-chip CAN controller Keyless entry 30-pin 20-pin 20-pin µ PD789862 PD789862 µ PD789861 PD789861 µ PD789860 PD789860 µ PD789860 PD789860 with enhanced timer function, SIO, and expanded ROM and RAM RC oscillation version of µ PD789860 PD789860 On-chip POC and key return circuit VFD drive 52-pin µ PD789871 PD789871 On-chip VFD controller (total display outputs: 25) Meter control 64-pin Remark µ PD789881 PD789881 UART + resistance division method LCD (26 × 4) VFD (Vacuum Fluorescent Display) is referred to as FIPTM (Fluorescent Indicator Panel) in some documents, but the functions of the two are same. 24 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 1 GENERAL The major differences between subseries are shown below. Series for General-Purpose and LCD Drive Function Subseries Smallscale package, generalpurpose applications 8-Bit 10-Bit ROM Timer A/D Capacity 8-Bit 16-Bit Watch WDT A/D (Bytes) µPD789046 PD789046 16 K µPD789026 PD789026 4 K to 16 K µPD789088 PD789088 2 K to 8 K 2 K to 4 K 2 ch µPD789062 PD789062 VDD 4K 1 ch 1 ch 1 ch 1 ch - - 1 ch (UART: 1ch) 34 1.8 V µPD789177 PD789177 24 - 22 - 14 RC-oscillation version - 1 ch 1 ch 1ch 8 ch - - 31 1.8 V - - On-chip EEPROM 20 - 4 ch µPD789124A PD789124A 4 ch - µPD789114A PD789114A - 4 ch 4 ch - 3 ch - 1 ch (UART: 1ch) 30 2.7 V 8 ch 2 ch (UART: 1ch) 45 1.8 V 1 ch (UART: 1ch) 43 2 K to 8 K µPD789104A PD789104A µPD789835 PD789835 24 K to 60 K 6 ch µPD789830 PD789830 24 K µPD789489 PD789489 32 K to 48 K 3 ch µPD789479 PD789479 24 K to 48 K 8 ch 12 K to 24 K - 7 ch RC-oscillation version - - µPD789417A PD789417A LCD drive 1 ch (UART: 1ch) 4 ch 4 ch - 8 K to 16 K 1 ch µPD789146 PD789146 µPD789134A PD789134A - 8 ch 16 K to 24 K 3 ch µPD789167 PD789167 µPD789156 PD789156 - - µPD789052 PD789052 Smallscale package, generalpurpose applications + A/D converter Remarks 1 ch µPD789014 PD789014 I/O MIN.Value 16 K to 32 K 3 ch µPD789074 PD789074 Serial Interface 1 ch - 1 ch µPD789407A PD789407A 1 ch 1 ch - 7 ch 6 ch 6 ch - 6 ch µPD789426 PD789426 6 ch Dot LCD supported - - µPD789436 PD789436 Note 1.8 V - - 37 - µPD789456 PD789456 12 K to 16 K 2 ch µPD789446 PD789446 µPD789316 PD789316 30 40 - 8 K to 16 K 2 ch (UART: 1ch) 23 1 ch - 18 µPD789306 PD789306 µPD789467 PD789467 RC-oscillation version - 4 K to 24 K µPD789327 PD789327 - - 1 ch 21 Note Flash memory version: 3.0 V User's Manual U12978EJ3V3UD U12978EJ3V3UD 25 CHAPTER 1 GENERAL Series for ASSP Function Subseries 8-Bit 10-Bit ROM Timer A/D Capacity 8-Bit 16-Bit Watch WDT A/D (Bytes) USB µPD789800 PD789800 8K Inverter control µPD789842 PD789842 8 K to 16 K 3 ch Note 1 1 ch On-chip µPD789850 PD789850 16 K 1 ch 1 ch µPD789861 PD789861 4K 2 ch - 2 ch - - Serial Interface I/O VDD Remarks MIN.Value 1 ch - - 2 ch (USB: 1ch) 31 4.0 V - 1 ch 8 ch - 1 ch (UART: 1ch) 30 4.0 V - - 1 ch 4 ch - 2 ch (UART: 1ch) 18 4.0 V - - 1 ch - - - 14 1.8 V bus controller Keyless entry RC-oscillation version, on-chip EEPROM µPD789860 PD789860 On-chip µPD789862 PD789862 16 K VFD drive µPD789871 PD789871 4 K to 8 K 3 ch Meter control µPD789881 PD789881 16 K 1 ch 2 ch 2 ch 1 ch (UART: 1ch) - 1 ch 1 ch - - 1 ch 33 2.7 V 1 ch - 1 ch - - 1 ch (UART: 1 ch) 28 2.7 V Notes 1. 10-bit timer: 1 channel 2. Flash memory version: 3.0 V 26 EEPROM 22 User's Manual U12978EJ3V3UD U12978EJ3V3UD Note 2 - - CHAPTER 1 GENERAL 1.6 Block Diagram KR00 to KR07 Key return 0 8-bit timer 00 Port 0 8-bit timer/event counter 01 Port 1 P10 to P17 P20 to P26 Port 4 78K/0S 78K/0S CPU core P00 to P07 Port 2 TI01/TO01/P26/INTP0 TI01/TO01/P26/INTP0 ROM Flash memory P40 to P47 Watchdog timer REGC Regulator VREG USBDM USBDP USB function 0 System control SCK10/P20 SCK10/P20 SO10/P21 SO10/P21 SI10/P22 SI10/P22 Serial interface 1 INTP0/P26 INTP0/P26 Remark RAM Interrupt control RESET X1 X2 VDD0 VDD1 VSS0 VSS1 IC (VPP) The parenthesized values apply to the µPD78F9801 PD78F9801. User's Manual U12978EJ3V3UD U12978EJ3V3UD 27 CHAPTER 1 GENERAL 1.7 Functions µPD789800 PD789800 Product µPD78F9801 PD78F9801 Item Internal memory ROM Minimum instruction execution time Instruction set Flash memory 8 KB High-speed RAM Mask ROM 16 KB 256 bytes 0.33 µs/1.33 µs (at 6.0 MHz operation with system clock) · 16-bit operation · Bit manipulation (set, reset, and test) etc. I/O ports CMOS I/O 31 (Of the above COMS I/O ports, 18 ports can be switched to N-ch open-drain I/O ports.) Serial interface · USB (Universal Serial Bus) function: · Three-wired serial I/O mode: Timer · 8-bit timer: 1 channel 1 channel 1 channel · 8-bit timer/event counter: 1 channel · Watchdog timer: 1 channel Incorporated (VREG = 3.3 ±0.3 V) Regulator Maskable sources Internal: 9, external: 2 Non-maskable Vector interrupt Internal: 1 Power supply voltage Operating ambient temperature VDD = 4.0 to 5.5 V · TA = ­40 to +85°C (when the USB is not operating) · TA = 0 to +70°C (when the USB is operating) · TA = 10 to 40°C (when a flash memory is written) 44-pin plastic LQFP (10 × 10) Package An outline of the timer is shown below. 8-Bit Timer 00 8-Bit Timer/ Watchdog Timer Event Counter 01 Operation mode 1 channel - 1 channel Timer outputs - 1 output - - 1 output - Capture - - - Interrupt sources 1 1 2 The watchdog timer has watchdog timer and interval timer functions. However, use the watchdog timer by selecting either the watchdog timer function or interval timer function. 28 1 channel Note - Square-wave outputs Note 1 channel External event counter Function Interval timer User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 2 PIN FUNCTIONS 2.1 List of Pin Functions (1) Port pins Pin Name I/O Function After Reset Alternate Function P00 to P07 I/O Port 0 Input - Input - 8-bit I/O port Input/output can be specified in 1-bit units. When used as an input port, use of on-chip pull-up resistors can be specified by pull-up resistor option register 0 (PU0). When used as an output port, CMOS output or N-ch open-drain output can be specified in 8-bit units by port output mode register 0 (POM0). P10 to P17 I/O Port 1 8-bit I/O port Input/output can be specified in 1-bit units. When used as an input port, use of on-chip pull-up resistors can be specified by pull-up resistor option register 0 (PU0). When used as an output port, CMOS output or N-ch open-drain output can be specified in 8-bit units by port output mode register 0 (POM0). P20 I/O Port 2 Input 7-bit I/O port P21 SCK10 SCK10 SO10 Input/output can be specified in 1-bit units. P22 SI10 When used as an input port, use of on-chip pull-up resistors can be P23 to P25 specified by pull-up resistor option register 0 (PU0). P26 When P25 or P26 is used as an output port, CMOS output or N-ch - INTP0/TI01/TO01 INTP0/TI01/TO01 open-drain output can be specified in 1-bit units by port output mode register 1 (POM1). P40 to P47 I/O Port 4 Input KR00 to KR07 8-bit I/O port Input/output can be specified in 1-bit units. When used as an input port, use of on-chip pull-up resistors can be specified by pull-up resistor option register 0 (PU0). User's Manual U12978EJ3V3UD U12978EJ3V3UD 29 CHAPTER 2 PIN FUNCTIONS (2) Non-port pins Pin Name I/O Function After Reset Alternate Function INTP0 Input External interrupt request input for which valid edge (rising and/or falling edge) can be specified Input P26/TI01/TO01 P26/TI01/TO01 KR00 to Input Input for detecting key return signals Input P40 to P47 KR07 NC - No connection. Can be left open. - - REGC - Internally generated power supply for driving USB driver/receiver. Connect this pin to VSS via a 22 µF capacitor. - - RESET Input System reset input Input SCK10 SCK10 I/O Serial clock input/output for serial interface Input P20 SI10 Input Serial data input for serial interface Input P22 SO10 Output Serial data output for serial interface Input P21 TI01 Input External count clock input to 8-bit timer TM01 Input P26/INTP0/TO01 P26/INTP0/TO01 TO01 Output Output from 8-bit timer TM01 Input P26/INTP0/TI01 P26/INTP0/TI01 USBDM I/O Serial data input/output (negative side) for USB function. The pull-up resistor (1.5 k) for the USBDM pin must be connected Input - USBDP I/O Input - - to the REGC pin. Serial data input/output (positive side) for USB function VDD0 - Positive power supply for ports - - VDD1 - Positive power supply for circuits other than ports - - VSS0 - Ground potential for ports - - VSS1 - Ground potential for circuits other than ports - - X1 Input X2 - IC - VPP - 30 Crystal resonator connection to for system clock oscillator Input - - - Internally connected directly to VSS0 - - Sets flash memory programming mode. Apply high voltage when a program is written or verified. - - User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 2 PIN FUNCTIONS 2.2 Pin Functions 2.2.1 P00 to P07 (Port 0) These pins constitute an 8-bit I/O port and can be set to the input or output port mode in 1-bit units by using port mode register 0 (PM0). When these pins are used as an input port, an on-chip pull-up resistor can be used by setting pull-up resistor option register 0 (PU0). When these pins are used as an output port, CMOS output or N-ch opendrain output can be specified in 8-bit units by setting port output mode register 0 (POM0). 2.2.2 P10 to P17 (Port 1) These pins constitute an 8-bit I/O port. Port 1 can be set to the input or output mode in 1-bit units by using port mode register 1 (PM1). When the port is used as an input port, an on-chip pull-up resistor can be used by setting pull-up resistor option register 0 (PU0). When these pins are used as an output port, CMOS output or N-ch opendrain output can be specified in 8-bit units by setting port output mode register 0 (POM0). 2.2.3 P20 to P26 (Port 2) These pins constitute a 7-bit I/O port. In addition, these pins function as data I/O, and clock I/O to and from the serial interface, external interrupt input, and timer I/O. Port 2 can be specified in the following operation modes in 1-bit units. (1) Port mode In the port mode, P20 to P26 function as a 7-bit I/O port. Port 2 can be set to the input or output mode in 1-bit units by using port mode register 2 (PM2). When the port is used as an input port, an on-chip pull-up resistor can be used by setting pull-up resistor option register 0 (PU0). When P25 or P26 is used as an output port, CMOS output or N-ch open-drain output can be specified by setting in 1-bit units port output mode register 1 (POM1). (2) Control mode In this mode, P20 to P26 function as the data I/O and the clock I/O to and from the serial interface. (a) SI10, SO10 These are the serial data I/O pins of the serial interface. (b) SCK10 SCK10 This is the serial clock I/O pin of the serial interface. (c) TI01 This is the external clock input pin for the 8-bit timer/event counter. (d) TO01 This is the output pin of the 8-bit timer. (e) INTP0 This is an external interrupt input pin for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified. Caution When using P20 to P26 as serial interface pins, the I/O mode and output latch must be set according to the functions to be used. For setting details, see Table 9-2. User's Manual U12978EJ3V3UD U12978EJ3V3UD 31 CHAPTER 2 2.2.4 PIN FUNCTIONS P40 to P47 (Port 4) These pins constitute an 8-bit I/O port. In addition, they also function as key return signal detection pins. The following operation modes can be specified in 1-bit units. (1) Port mode In this mode, port 4 functions as an 8-bit I/O port. Port 4 can be set to the input or output mode in 1-bit units by using port mode register 4 (PM4). When used as an input port an on-chip pull-up resistor can be used by setting pull-up resistor option register 0 (PU0). (2) Control mode In this mode, the pins function as key return signal detection pins (KR00 to KR07). 2.2.5 RESET This pin inputs an active-low system reset signal. 2.2.6 X1, X2 These pins are used to connect a crystal resonator for system clock oscillation. To supply an external clock, input the clock to X1 and input the inverted signal to X2. 2.2.7 REGC This pin is a power supply pin for driving a USB driver/receiver generated internally. Connect this pin to the VSS pin via 22 µF capacitor. 2.2.8 USBDM This pin (negative side) inputs or outputs serial data for the USB function. 2.2.9 USBDP This pin (positive side) inputs or outputs serial data for the USB function. 2.2.10 VDD0, VDD1 These pins are positive power supply pins. 2.2.11 VSS0, VSS1 These pins are ground pins. 32 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 2 PIN FUNCTIONS 2.2.12 VPP (µPD78F9801 PD78F9801 only) A high voltage should be applied to this pin when the flash memory programming mode is set and when the program is written or verified. Handle this pin in either of the following ways. · Independently connect a 10 k pull-down resistor. · Switch this pin to be directly connected to the dedicated flash programmer in programming mode or to VSS0 in normal operation mode using a jumper on the board. 2.2.13 IC (mask ROM version only) The IC (Internally Connected) pin is used to set the µPD789800 PD789800 Subseries in the test mode before shipment. In the normal operation mode, directly connect this pin to the VSS0 pin with as short a wiring length as possible. If a potential difference is generated between the IC pin and VSS0 pin due to a long wiring length between the IC pin and VSS0 pin or an external noise superimposed on the IC pin, a user program may not run correctly. · Directly connect the IC pin to the VSS0 pin. VSS0 IC Keep short User's Manual U12978EJ3V3UD U12978EJ3V3UD 33 CHAPTER 2 PIN FUNCTIONS 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins Table 2-1 lists the types of I/O circuits for each pin and explains how unused pins are handled. Figure 2-1 shows the configuration of each type of I/O circuit. Table 2-1. Type of Pin I/O Circuit Recommended Connection of Unused Pins Pin Name P00 to P07 I/O Circuit Type 5-R I/O Input: I/O P10 to P17 P20/ SCK10 SCK10 Recommended Connection of Unused Pins Independently connect to VDD0, VDD1, VSS0, or VSS1 via a resistor. Output: Leave open. 8-C P21/SO10 P21/SO10 P22/SI10 P22/SI10 P23, P24 P25 8-F P26/INTP0/TI01/TO01 P26/INTP0/TI01/TO01 P40/ KR00 to 8-C P47/ KR07 USBDM Connect to the REGC pin. 24-A USBDP Independently connect to VSS0 or VSS1 via a resistor. RESET 2 Input NC - - Leave open. REGC - - Connect to USBDM pin. IC - - VPP - Connect directly to VSS0. Independently connect a 10 k pull-down resistor, or connect directly to VSS0. 34 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuits Type 2 Type 8-F Pull-up enable P-ch cut IN VDD0 P-ch VDD0 Output data P-ch IN/OUT Schmitt-triggered input with hysteresis characteristics Output disable N-ch VSS0 Type 5-R Pull-up enable P-ch cut Type 24-A VDD0 P-ch VREG VDD0 Output data TXDXP P-ch P-ch IN/OUT RXDX IN/OUT TXDXN Output disable N-ch N-ch VSS0 VSS0 Input enable Type 8-C VDD0 Pull-up enable P-ch VDD0 Output data P-ch IN/OUT Output disable N-ch VSS0 User's Manual U12978EJ3V3UD U12978EJ3V3UD 35 CHAPTER 3 CPU ARCHITECTURE 3.1 Memory Space The µPD789800 PD789800 Subseries can access 64 KB of memory space. Figures 3-1 and 3-2 show the memory maps. Figure 3-1. Memory Map (µPD789800 PD789800) FFFFH Special function register 256 × 8 bits FF 0 0H FEFFH Internal high-speed RAM 256 × 8 bits FE0 0H FDFFH Reserved Data memory space 1 FFFH 2 0 0 0H 1 FFFH Program area Program memory space Internal ROM 8,192 × 8 bits 0 0 8 0H 0 0 7 FH CALLT table area 0 0 4 0H 0 0 3 FH Program area 0 0 1AH 0 0 1 9H Vector table area 0 0 0 0H 36 0 0 0 0H User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 3 CPU ARCHITECTURE Figure 3-2. Memory Map (µPD78F9801 PD78F9801) FFFFH Special function register 256 × 8 bits FF 0 0H FEFFH Internal high-speed RAM 256 × 8 bits FE0 0H FDFFH Reserved Data memory space 3 FFFH 4 0 0 0H 3 FFFH Program area Program memory space Flash memory 16,384 × 8 bits 0 0 8 0H 0 0 7 FH CALLT table area 0 0 4 0H 0 0 3 FH Program area 0 0 1AH 0 0 1 9H Vector table area 0 0 0 0H 0 0 0 0H User's Manual U12978EJ3V3UD U12978EJ3V3UD 37 CHAPTER 3 CPU ARCHITECTURE 3.1.1 Internal program memory space The internal program memory space stores programs and table data. This space is usually addressed by the program counter (PC). The following areas are allocated to the internal program memory space. (1) Vector table area A 26-byte area of addresses 0000H 0000H to 0019H 0019H is reserved as a vector table area. This area stores program start addresses to be used when branching by RESET input or interrupt request generation. Of a 16-bit program address, the lower 8 bits are stored in an even address, and the higher 8 bits are stored in an odd address. Table 3-1. Vector Table Vector Table Address Interrupt Request Vector Table Address Interrupt Request 0000H 0000H RESET input 000EH 000EH INTUSBRE 0004H 0004H INTWDT 0010H 0010H INTP0 0006H 0006H INTUSBTM 0012H 0012H INTCSI10 INTCSI10 0008H 0008H INTUSBRT 0014H 0014H INTTM00 INTTM00 000AH 000AH INTUSBRD 0016H 0016H INTTM01 INTTM01 000CH 000CH INTUSBST 0018H 0018H INTKR00 INTKR00 (2) CALLT instruction table area The subroutine entry address of a 1-byte call instruction (CALLT) can be stored in a 64-byte area of addresses 0040H 0040H to 007FH 007FH. 3.1.2 Internal data memory (internal high-speed RAM) space An internal high-speed RAM is incorporated in the area between FE00H FE00H and FEFFH. The internal high-speed RAM is also used as a stack. 3.1.3 Special function register (SFR) area Special function registers (SFRs) of on-chip peripheral hardware are allocated to an area of FF00H FF00H to FFFFH (see Table 3-2). 38 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 3 CPU ARCHITECTURE 3.1.4 Data memory addressing The µPD789800 PD789800 Subseries provides a variety of addressing modes which take account of memory manipulability, etc. Especially at addresses corresponding to data memory area (FE00H FE00H to FFFFH), particular addressing modes are possible to meet the functions of the special function registers (SFR) and general-purpose registers. Figures 3-3 and 3-4 show the data memory addressing modes. Figure 3-3. Data Memory Addressing (µPD789800 PD789800) FFFFH Special function registers (SFR) 256 × 8 bits SFR addressing FF20H FF20H FF1FH FF00H FF00H FEFFH Short direct addressing Internal high-speed RAM 256 × 8 bits FE20H FE20H FE1FH FE00H FE00H FDFFH Direct addressing Register indirect addressing Reserved Based addressing 2000H 2000H 1FFFH Internal ROM 8,192 × 8 bits 0000H 0000H User's Manual U12978EJ3V3UD U12978EJ3V3UD 39 CHAPTER 3 CPU ARCHITECTURE Figure 3-4. Data Memory Addressing (µPD78F9801 PD78F9801) FFFFH Special function registers (SFR) 256 × 8 bits SFR addressing FF20H FF20H FF1FH FF00H FF00H FEFFH Short direct addressing Internal high-speed RAM 256 × 8 bits FE20H FE20H FE1FH FE00H FE00H FDFFH Direct addressing Register indirect addressing Based addressing Reserved 4000H 4000H 3FFFH Flash memory 16,384 × 8 bits 0000H 0000H 40 User's Manual U12978EJ3V3UD U12978EJ3V3UD CHAPTER 3 CPU ARCHITECTURE 3.2 Processor Registers The µPD789800 PD789800 Subseries provides the following on-chip processor registers. 3.2.1 Control registers The control registers contain special functions to control the program sequence, statuses and stack memory. A program counter, a program status word, and a stack pointer are the control registers. (1) Program counter (PC) The program counter is a 16-bit register which holds the address information of the next program to be executed. In normal operation, the PC is automatically incremented according to the number of bytes of the instruction to be fetched. When a branch instruction is executed, immediate data or register contents are set. RESET input sets the program counter to the reset vector table values at addresses 0000H 0000H and 0001H 0001H. Figure 3-5. Configuration of Program Counter 15 0 PC PC15 PC14 PC13 PC12 PC11 PC10