PD789405A PD789407A 78K/0S PD78F9418A U13952E U11047E PD789406A PD789415A - Datasheet Archive

 

'$7$ 6+(7 026 ,17(*5$7(' &,5&8,7 µPD789405A, 789406A, 789407A, 789415A, 789416A, 789417A %,7 6,1*/(&+,3

 

DATA SHEET '$7$ 6+(7 026 ,17(*5$7(' &,5&8,7 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A %,7 6,1*/(&+,3 0,&52&21752//(56 DESCRIPTION The µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, and 789417A are products of the µPD789407A PD789407A and 789417A Subseries (for LCD drive) in the 78K/0S 78K/0S Series. In addition, a flash memory version (µPD78F9418A PD78F9418A) that can operate within the same power-supply voltage range as the mask ROM version, and a range of development tools are also supported. Detailed function descriptions are provided in the following user's manuals. Be sure to read them before designing. µPD789407A PD789407A, 789417A Subseries User's Manual: U13952E U13952E 78K/0S 78K/0S Series User's Manual Instructions: U11047E U11047E FEATURES · ROM and RAM sizes Data Memory Item Program Memory (ROM) Part Number Internal High-Speed RAM µPD789405A PD789405A, 789415A 12 KB µPD789406A PD789406A, 789416A 16 KB µPD789407A PD789407A, 789417A LCD Display RAM 24 KB · Minimum instruction 512 × 8 bits execution time can be changed from high-speed (0.4 µs @ 5.0 MHz operation with main system clock) to ultra-lowspeed (122 µs @ 32.768 kHz operation with subsystem clock) 28 × 4 bits · 8-bit resolution A/D converter: 7 channels (µPD789405A PD789405A, 789406A, 789407A) · 10-bit resolution A/D converter: 7 channels (µPD789415A PD789415A, 789416A, 789417A) · Timer: 6 channels · I/O ports: 43 · 16-bit timer: · Serial interface: 1 channel · 8-bit timer/event counter: 2 channels 3-wire serial I/O mode/UART mode selectable 1 channel · Common signals: 4 MAX. 1 channel · Watchdog timer: · Segment signals: 28 MAX. 1 channel · Watch timer: · LCD controller/driver · 8-bit timer: 1 channel · Supply voltage: VDD = 1.8 to 5.5 V · 1/2- or 1/3-bias selectable APPLICATION FIELDS APS compact cameras, blood pressure gauges, rice cookers, etc. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. U14024EJ2V0DS00 U14024EJ2V0DS00 (2nd edition) Date Published April 2001 N CP(K) Printed in Japan 7KH PDUN VKRZV PDMRU UHYLVHG SRLQWV 1999, 2000 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A ORDERING INFORMATION 3DUW 1XPEHU 3DFNDJH µ3'$*&×××%7 µ3'$*.×××(8 SLQ SODVWLF 74)3 ILQH SLWFK × SLQ SODVWLF 4)3 × µ3'$*&×××%7 µ3'$*.×××(8 SLQ SODVWLF 74)3 ILQH SLWFK × µ3'$*&×××%7 µ3'$*.×××(8 SLQ SODVWLF 74)3 ILQH SLWFK × µ3'$*&×××%7 µ3'$*.×××(8 SLQ SODVWLF 74)3 ILQH SLWFK × µ3'$*&×××%7 µ3'$*.×××(8 SLQ SODVWLF 74)3 ILQH SLWFK × µ3'$*&×××%7 µ3'$*.×××(8 SLQ SODVWLF 74)3 ILQH SLWFK × SLQ SODVWLF 4)3 [ SLQ SODVWLF 4)3 [ SLQ SODVWLF 4)3 × SLQ SODVWLF 4)3 [ SLQ SODVWLF 4)3 × 5HPDUN ××× LQGLFDWHV 520 FRGH VXIIL[ 2 'DWD 6KHHW 8(-9'6 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A DEVELOPMENT OF 78K/0S 78K/0S SERIES The product development of the 78K/0S 78K/0S Series is shown below. Subseries names are shown enclosed in a solid or dotted line. Products in mass production Products under development Y Subseries products support SMB. Small-scale package, general-purpose applications 44-pin 42-/44-pin 30-pin 30-pin 28-pin µ PD789074 PD789074 with added subsystem clock µ PD789014 PD789014 with enhanced timer and increased ROM, RAM capacity µ PD789074 PD789074 with enhanced timer and increased ROM and RAM capacity µ PD789026 PD789026 with enhanced timer On-chip UART and capable of low voltage (1.8 V) operation µ PD789046 PD789046 µ PD789026 PD789026 µPD789088 PD789088 µ PD789074 PD789074 µ PD789014 PD789014 Small-scale package, general-purpose applications and A/D converter 44-pin 44-pin 30-pin 30-pin 30-pin 30-pin 30-pin 30-pin µ PD789177 PD789177 µ PD789167 PD789167 µ PD789156 PD789156 µ PD789146 PD789146 µ PD789134A PD789134A µ PD789124A PD789124A µ PD789114A PD789114A µ PD789104A PD789104A µ PD789177Y PD789177Y µ PD789167Y PD789167Y µ PD789167 PD789167 with enhanced A/D converter µ PD789104A PD789104A with enhanced timer µ PD789146 PD789146 with enhanced A/D converter µ PD789104A PD789104A with added EEPROMTM µ PD789124A PD789124A with enhanced A/D converter RC oscillation version of the µ PD789104A PD789104A µ PD789104A PD789104A with enhanced A/D converter µ PD789026 PD789026 with added A/D converter and multiplier Inverter control 44-pin µ PD789842 PD789842 On-chip inverter controller and UART VFD drive 78K/0S 78K/0S Series 52-pin µ PD789871 PD789871 80-pin 80-pin 80-pin 64-pin 64-pin 52-pin µ PD789488 PD789488 µ PD789477 PD789477 µ PD789417A PD789417A µ PD789407A PD789407A µ PD789456 PD789456 µ PD789446 PD789446 µ PD789436 PD789436 µ PD789426 PD789426 µ PD789316 PD789316 µ PD789306 PD789306 µ PD789467 PD789467 52-pin µ PD789327 PD789327 Total display outputs: 25 LCD drive 80-pin 64-pin 64-pin 64-pin 64-pin SIO, 10-bit A/D converter, and on-chip voltage booster type LCD (28 × 4) SIO, 8-bit A/D converter, and resistance division type LCD (28 × 4) µ PD789407A PD789407A with enhanced A/D converter SIO, 8-bit A/D converter, and resistance division type LCD (28 × 4) µ PD789446 PD789446 with enhanced A/D converter SIO, 8-bit A/D converter, and on-chip voltage booster type LCD (15 × 4) µPD789426 PD789426 with enhanced A/D converter SIO, 8-bit A/D converter, and on-chip voltage booster type LCD (5 × 4) RC oscillation version of the µPD789306 PD789306 SIO and on-chip voltage booster type LCD (24 × 4) 8-bit A/D converter and on-chip voltage booster type LCD SIO and resistance division type LCD Dot LCD drive 144-pin 88-pin µ PD789835 PD789835 µ PD789830 PD789830 Segment/common outputs: 96 Segments: 40, commons: 16 ASSP 64-pin 44-pin 44-pin 20-pin 20-pin µ PD789803 PD789803 µPD789800 PD789800 µ PD789840 PD789840 µ PD789861 PD789861 µ PD789860 PD789860 For PC keyboard, on-chip USB HUB function For PC keyboard, on-chip USB function For keypad, on-chip POC RC oscillation version of the µPD789860 PD789860 For keyless entry, on-chip POC and key return circuit TM Remark VFD (Vacuum Fluorescent Display) is referred to as "FIP " (Fluorescent Indicator Panel) in some documents, but the functions of the two are the same. Data Sheet U14024EJ2V0DS U14024EJ2V0DS 3 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 7KH PDMRU IXQFWLRQDO GLIIHUHQFHV DPRQJ WKH VXEVHULHV DUH OLVWHG EHORZ )XQFWLRQ 6XEVHULHV 1DPH µ3' 6PDOOVFDOH µ3' SDFNDJH JHQHUDO µ3' SXUSRVH µ3' DSSOLFDWLRQV µ3' 6PDOOVFDOH SDFNDJH JHQHUDO SXUSRVH DSSOLFDWLRQV DQG $' FRQYHUWHU µ3' 520 &DSDFLW\ . 7LPHU %LW FK %LW :DWFK FK . WR . FK :'7 FK %LW %LW $' $' - - - 6HULDO ,QWHUIDFH FK 8$57 FK 9'' ,2 0,1 9DOXH 5HPDUNV 9 - . WR . FK . WR . FK . WR . FK - . WR . FK FK FK - FK FK - - FK FK - - FK FK - 5&RVFLOODWLRQ YHUVLRQ µ3'$ - FK - µ3'$ FK - µ3' µ3' . WR . FK - µ3' µ3'$ . WR . µ3'$ FK 8$57 FK - 2QFKLS (3520 ,QYHUWHU FRQWURO µ3' . WR . FK 490 FK FK FK - FK 8$57 FK 9 - 9)' GULYH µ3' . WR . FK ± FK FK ± ± FK 9 ± /&' GULYH µ3' . FK FK FK FK - . FK 8$57 FK 9 µ3' µ3'$ . WR . FK 8$57 FK µ3'$ ± FK FK - - FK FK - ± FK FK ± µ3' ± FK µ3' FK ± µ3' µ3' µ3' . WR . FK . WR . ± FK 8$57 FK ± µ3' µ3' . WR . ± FK µ3' 'RW /&' GULYH µ3' . WR . FK ± . FK µ3' . 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PIN CONFIGURATION (TOP VIEW) P03 P02 P01 P00 P47 P46 RESET X2 X1 VSS0 µPD789417AGK- PD789417AGK-×××-9EU VDD0 µPD789417AGC- PD789417AGC-×××-8BT XT2 µPD789416AGK- PD789416AGK-×××-9EU XT1 µPD789415AGK- PD789415AGK-×××-9EU µPD789416AGC- PD789416AGC-×××-8BT IC µPD789415AGC- PD789415AGC-×××-8BT P45/KR5 P45/KR5 µPD789407AGK- PD789407AGK-×××-9EU P44/KR4 P44/KR4 µPD789406AGK- PD789406AGK-×××-9EU µPD789407AGC- PD789407AGC-×××-8BT P43/KR3 P43/KR3 µPD789406AGC- PD789406AGC-×××-8BT P42/KR2 P42/KR2 µPD789405AGK- PD789405AGK-×××-9EU P41/KR1 P41/KR1 · 80-pin plastic TQFP (fine pitch) (12 × 12) µPD789405AGC- PD789405AGC-×××-8BT P40/KR0 P40/KR0 · 80-pin plastic QFP (14 x 14) 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 7 54 P22/SI/RxD COM1 8 53 P23/CMPTOUT0/TO2 P23/CMPTOUT0/TO2 COM2 9 52 P24/INTP0/TI0 P24/INTP0/TI0 COM3 10 51 P25/INTP1/TI1 P25/INTP1/TI1 S0 11 50 P26/INTP2/TO5 P26/INTP2/TO5 S1 12 49 P27/INTP3/CPT5 P27/INTP3/CPT5 S2 13 48 AVSS S3 14 47 P60/ANI0/CMPIN0 P60/ANI0/CMPIN0 S4 15 46 P61/ANI1/CMPREF0 P61/ANI1/CMPREF0 S5 16 45 P62/ANI2 P62/ANI2 S6 17 44 P63/ANI3 P63/ANI3 S7 18 43 P64/ANI4 P64/ANI4 S8 19 42 P65/ANI5 P65/ANI5 S9 41 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 P66/ANI6 P66/ANI6 Cautions AVREF COM0 AVDD P21/SO/TxD P80/S27 P80/S27 55 P81/S26 P81/S26 6 P82/S25 P82/S25 VSS1 P83/S24 P83/S24 P20/SCK/ASCK P20/SCK/ASCK P84/S23 P84/S23 P53 56 P85/S22 P85/S22 57 5 P86/S21 P86/S21 4 VLC2 P87/S20 P87/S20 VLC1 P90/S19 P90/S19 P52 P91/S18 P91/S18 58 P92/S17 P92/S17 3 P93/S16 P93/S16 VLC0 S15 P51 S14 59 S13 P50 2 S12 60 BIAS S11 1 S10 VDD1 1. Connect the IC (Internally Connected) pin directly to VSS0 or VSS1. 2. Connect the AVDD pin to VSS0. 3. Connect the AVSS pin to VSS0. Data Sheet U14024EJ2V0DS U14024EJ2V0DS 7 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A $1, WR $1, $QDORJ LQSXW 3 WR 3 3RUW $6&. $V\QFKURQRXV VHULDO LQSXW 3 WR 3 3RUW $9DD $QDORJ SRZHU VXSSO\ 3 WR 3 3RUW $9REF $QDORJ UHIHUHQFH YROWDJH 5(6(7 5HVHW $9SS $QDORJ JURXQG 5[' 5HFHLYH GDWD %,$6 /&' SRZHU VXSSO\ ELDV FRQWURO 6 WR 6 6HJPHQW RXWSXW &03,1 &RPSDUDWRU LQSXW 6&. 6HULDO FORFN &035() &RPSDUDWRU UHIHUHQFH 6, 6HULDO LQSXW &037287 &RPSDUDWRU RXWSXW 62 6HULDO RXWSXW &20 WR &20 &RPPRQ RXWSXW 7, 7, 7LPHU LQSXW &37 &DSWXUH WULJJHU LQSXW 72 72 7LPHU RXWSXW ,& ,QWHUQDOO\ FRQQHFWHG 7[' 7UDQVPLW GDWD ,173 WR ,173 ([WHUQDO LQWHUUXSW LQSXW 9DD0 9DD1 3RZHU VXSSO\ .5 WR .5 .H\ UHWXUQ 9LC0 WR 9LC2 /&' SRZHU VXSSO\ 3 WR 3 3RUW 9SS0 9SS1 *URXQG 3 WR 3 3RUW ; ; &U\VWDO PDLQ V\VWHP FORFN 3 WR 3 3RUW ;7 ;7 &U\VWDO VXEV\VWHP FORFN 3 WR 3 3RUW 8 'DWD 6KHHW 8(-9'6 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 2. BLOCK DIAGRAM TI0/P24 TI0/P24 8-bit timer event/counter 00 Port 0 P00 to P03 TI1/P25 TI1/P25 8-bit timer event/counter 01 Port 2 P20 to P27 TO2/P23 8-bit timer counter 02 Port 4 P40 to P47 TO5/P26 CPT5/P27 CPT5/P27 16-bit timer counter 50 Port 5 P50 to P53 Port 6 P60 to P66 Watchdog timer Port 8 P80 to P87 Serial interface 00 Port 9 P90 to P93 Watch timer SCK/ASCK/P20 SCK/ASCK/P20 SO/TxD/P21 SI/RxD/P22 78K/0S 78K/0S CPU core ROM RAM System control ANI0/P60 ANI0/P60 to ANI6/P66 ANI6/P66 RESET X1 X2 XT1 XT2 Interrupt control INTP0/P24 INTP0/P24 INTP1/P25 INTP1/P25 INTP2/P26 INTP2/P26 INTP3/P27 INTP3/P27 KR0/P40 KR0/P40 to KR5/P45 KR5/P45 A/D converter AVDD AVSS AVREF S0 to S15 S16/P93 S16/P93 to S19/P90 S19/P90 LCD S20/P87 S20/P87 to S27/P80 S27/P80 controller/ Comparator COM0 to COM3 VLC0 to VLC2 BIAS driver 00 VDD0 VSS0 VDD1 CMPTOUT0/P23 CMPTOUT0/P23 CMPIN0/P60 CMPIN0/P60 CMPREF0/P61 CMPREF0/P61 VSS1 IC 5HPDUN 7KH LQWHUQDO 520 FDSDFLW\ GLIIHUV GHSHQGLQJ RQ WKH SURGXFW 'DWD 6KHHW 8(-9'6 9 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 3. 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STANDBY FUNCTION 7KH VWDQGE\ IXQFWLRQ LV XVHG WR ORZHU WKH FXUUHQW FRQVXPSWLRQ DQG FDQ EH XVHG LQ WKH IROORZLQJ WZR PRGHV · +$/7 PRGH ,Q WKLV PRGH WKH &38 RSHUDWLQJ FORFN LV VWRSSHG 7KH DYHUDJH FXUUHQW FRQVXPSWLRQ FDQ EH UHGXFHG E\ LQWHUPLWWHQW RSHUDWLRQ FRPELQLQJ WKLV PRGH ZLWK WKH QRUPDO RSHUDWLQJ PRGH · 6723 PRGH ,Q WKLV PRGH WKH PDLQ V\VWHP FORFN RVFLOODWLRQ LV VWRSSHG $OO RSHUDWLRQV SHUIRUPHG ZLWK WKH PDLQ V\VWHP FORFN DUH VXVSHQGHG WKXV PLQLPL]LQJ SRZHU FRQVXPSWLRQ )LJXUH 6WDQGE\ )XQFWLRQ System clock operation HALT instruction Interrupt request STOP instruction Interrupt request STOP mode main system clock oscillation stopped HALT mode clock supply to CPU stops with oscillation maintained 8. RESET FUNCTION 7KH PLFURFRQWUROOHU FDQ EH UHVHW LQ WKH IROORZLQJ WZR ZD\V · ([WHUQDO UHVHW E\ 5(6(7 VLJQDO LQSXW · ,QWHUQDO UHVHW E\ ZDWFKGRJ WLPHU LQDGYHUWHQW SURJUDP ORRS GHWHFWLRQ 9. MASK OPTION 7KH µ3'$ $ $ $ $ DQG $ KDYH WKH IROORZLQJ PDVN RSWLRQV · 0DVN RSWLRQ RI 3 WR 3 &RQQHFWLRQ RI D SXOOXS UHVLVWRU FDQ EH VHOHFWHG · 0DVN RSWLRQ RI 9LC0 WR 9LC2 SLQV DQG %,$6 SLQ &RQQHFWLRQ RI GLYLGHU UHVLVWRU IRU /&' GULYH FDQ EH VHOHFWHG )RU WKH UHVLVWDQFH YDOXHV RI WKH SXOOXS UHVLVWRU DQG GLYLGHU UHVLVWRU IRU /&' GULYH UHIHU WR (/(&75,&$/ 63(&,),&$7,216 26 'DWD 6KHHW 8(-9'6 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 10. INSTRUCTION SET OVERVIEW The instruction set for the µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, and 789417A is listed in this section. 10.1 Conventions 10.1.1 Operand identifiers and description methods Operands are described in the "Operand" column of each instruction in accordance with the description method of the instruction operand identifier (refer to the assembler specifications for details). When there are two or more description methods, select one of them. Alphabetic letters in capitals and the symbols, #, !, $, and [ ], are keywords and must be described as they are. Each symbol has the following meaning. · #: Immediate data specification · $: Relative address specification · !: Absolute address specification · [ ]: Indirect address specification In the case of immediate data, describe an appropriate numeric value or a label. When using a label, be sure to describe the #, !, $, or [ ] symbols. For operand register identifiers, r and rp, either function names (X, A, C, etc.) or absolute names (names in parentheses in the table below, R0, R1, R2, etc.) can be used for description. Table 10-1. Operand Formats and Descriptions Format Description r X (R0), A (R1), C (R2), B (R3), E (R4), D (R5), L (R6), H (R7) rp AX (RP0), BC (RP1), DE (RP2), HL (RP3) sfr Special function register symbol saddr FE20H FE20H to FF1FH Immediate data or label saddrp FE20H FE20H to FF1FH Immediate data or label (even addresses only) addr16 0000H 0000H to FFFFH Immediate data or label (even address only when 16-bit data transfer instruction is used) addr5 0040H 0040H to 007FH 007FH Immediate data or label (even addresses only) word 16-bit immediate data or label byte 8-bit immediate data or label bit 3-bit immediate data or label Data Sheet U14024EJ2V0DS U14024EJ2V0DS 27 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 10.1.2 Operation field definitions A: A register (8-bit accumulator) X: X register B: B register C: C register D: D register E: E register H: H register L: L register AX: AX register pair (16-bit accumulator) BC: BC register pair DE: DE register pair HL: HL register pair PC: Program counter SP: Stack pointer PSW: Program status word CY: Carry flag AC: Auxiliary carry flag Z: Zero flag IE: Interrupt request enable flag NMIS: Flag to indicate that a non-maskable interrupt is being processed ( ): Contents of a memory location indicated by a parenthesized address or resister name XH, XL: Higher and lower 8 bits of a 16-bit register : Logical product (AND) : Logical sum (OR) : Exclusive OR : Inverted data addr16: 16-bit immediate data or label jdisp8: Signed 8-bit data (displacement value) 10.1.3 Flag operation field definitions (Blank): Not affected 0: Clear to 0 1: Set to 1 ×: Set or clear according to the result R: Restore to the previous value 28 Data Sheet U14024EJ2V0DS U14024EJ2V0DS µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 10.2 Operations 0QHPRQLF 029 2SHUDQG U %\WH E\WH VDGGU VIU &ORFN E\WH E\WH 2SHUDWLRQ VDGGU E\WH VIUE\WH Note 1 $U U $ Note 1 U$ $ VDGGU $ VDGGU VDGGU $ $ VIU $VIU VIU $ VIU$ $ DGGU $ DGGU VDGGU $ DGGU $ DGGU $ 36: 36:E\WH $ 36: $36: 36: $ 36:$ $ >'(@ $ '( >'(@ $ $ >+/@ >+/@ $ $ >+/ E\WH@ >+/ E\WH@ $ $; E\WH $ ; Note 2 $ U × × × × × '( $ +/ $ $ +/ E\WH +/ E\WH $ $U $ VDGGU $ VIU $ VIU $ >'(@ $ '( $ >+/@ $ +/ $ >+/ E\WH@ $ +/ E\WH US USZRUG $; VDGGUS ZRUG $; VDGGUS VDGGUS $; $; US Note 3 US $; ;&+: × $ +/ $ VDGGU 029: = $& &< UE\WH $ U ;&+ )ODJ Note 3 US$; $; US Note 3 $;US 1RWHV ([FHSW ZKHQ U ([FHSW ZKHQ U 2QO\ ZKHQ US VDGGUS $; $;US $ $ RU ; %& '( RU +/ 5HPDUN 2QH LQVWUXFWLRQ FORFN F\FOH LV EDVHG RQ WKH &38 FORFN ICPU VSHFLILHG E\ WKH SURFHVVRU FORFN FRQWURO UHJLVWHU 3&& 'DWD 6KHHW 8(-9'6 29 µPD789405A PD789405A, 789406A, 789407A, 789415A, 789416A, 789417A 0QHPRQLF $'' 2SHUDQG $ E\WH %\WHV &ORFNV $ U $ VDGGU $ DGGU VDGGU E\WH 2SHUDWLRQ $ &