PD780988 PD780982 PD780983 PD780984 PD780986 PD78F0988A U13029EJ7V0UD00 - Datasheet Archive

 

µPD780988 Subseries 8-Bit Single-Chip Microcontrollers µPD780982 µPD780983 µPD780984 µPD780986

 

User's Manual µPD780988 PD780988 Subseries 8-Bit Single-Chip Microcontrollers µPD780982 PD780982 µPD780983 PD780983 µPD780984 PD780984 µPD780986 PD780986 µPD780988 PD780988 µPD78F0988A PD78F0988A µPD780982 PD780982(A) µPD780983 PD780983(A) µPD780984 PD780984(A) µPD780986 PD780986(A) µPD780988 PD780988(A) µPD78F0988A PD78F0988A(A) Document No. U13029EJ7V0UD00 U13029EJ7V0UD00 (7th edition) Date Published September 2002 N CP(K) © Printed in Japan 1997, 2000, 2002 [MEMO] 2 User's Manual U13029EJ7V0UD U13029EJ7V0UD NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. FIP and IEBus are trademarks of NEC Corporation. Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of International Business Machines Corporation. HP9000 HP9000 Series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc. Solaris and SunOS are trademarks of Sun Microsystems, Inc. Ethernet is a trademark of Xerox Corporation. TRON is an acronym of The Realtime Operating system Nucleus. ITRON is an abbreviation of Industrial TRON. User's Manual U13029EJ7V0UD U13029EJ7V0UD 3 The export of these products from Japan is regulated by the Japanese government. The export of some or all of these products may be prohibited without governmental license. To export or re-export some or all of these products from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. License not needed: The customer must judge the need for license: 4 µPD78F0988ACW PD78F0988ACW, 78F0988AGC-AB8 78F0988AGC-AB8, 78F0988AGC-8BS 78F0988AGC-8BS, 78F0988AGC 78F0988AGC(A)-AB8 µPD780982CW- PD780982CW-×××, 780982GC- 780982GC-×××-AB8, 780982GC- 780982GC-×××-8BS, µPD780983CW- PD780983CW-×××, 780983GC- 780983GC-×××-AB8, 780983GC- 780983GC-×××-8BS, µPD780984CW- PD780984CW-×××, 780984GC- 780984GC-×××-AB8, 780984GC- 780984GC-×××-8BS, µPD780986CW- PD780986CW-×××, 780986GC- 780986GC-×××-AB8, 780986GC- 780986GC-×××-8BS, µPD780988CW- PD780988CW-×××, 780988GC- 780988GC-×××-AB8, 780988GC- 780988GC-×××-8BS, µPD780982GC PD780982GC(A)-×××-AB8, 780982GC 780982GC(A)-×××-8BS, µPD780983GC PD780983GC(A)-×××-AB8, 780983GC 780983GC(A)-×××-8BS, µPD780984GC PD780984GC(A)-×××-AB8, 780984GC 780984GC(A)-×××-8BS, µPD780986GC PD780986GC(A)-×××-AB8, 780986GC 780986GC(A)-×××-8BS, µPD780988GC PD780988GC(A)-×××-AB8, 780988GC 780988GC(A)-×××-8BS User's Manual U13029EJ7V0UD U13029EJ7V0UD · The information in this document is current as of July, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. · No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. · NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. · Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. · While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. · NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4 User's Manual U13029EJ7V0UD U13029EJ7V0UD 5 Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: · Device availability · Ordering information · Product release schedule · Availability of related technical literature · Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth) · Network requirements In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. NEC Electronics Inc. (U.S.) Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288 NEC do Brasil S.A. Electron Devices Division Guarulhos-SP, Brasil Tel: 11-6462-6810 Fax: 11-6462-6829 · Filiale Italiana Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99 NEC Electronics Hong Kong Ltd. · Branch The Netherlands Eindhoven, The Netherlands Tel: 040-244 58 45 Fax: 040-244 45 80 NEC Electronics Hong Kong Ltd. · Branch Sweden Taeby, Sweden Tel: 08-63 80 820 NEC Electronics (Europe) GmbH Fax: 08-63 80 388 Duesseldorf, Germany · United Kingdom Branch Tel: 0211-65 03 01 Milton Keynes, UK Fax: 0211-65 03 327 Tel: 01908-691-133 Fax: 01908-670-290 · Sucursal en España Madrid, Spain Tel: 091-504 27 87 Fax: 091-504 28 60 Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411 NEC Electronics Shanghai, Ltd. Shanghai, P.R. China Tel: 021-6841-1138 Fax: 021-6841-1137 NEC Electronics Taiwan Ltd. Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951 NEC Electronics Singapore Pte. Ltd. Novena Square, Singapore Tel: 253-8311 Fax: 250-3583 · Succursale Française Vélizy-Villacoublay, France Tel: 01-30-67 58 00 Fax: 01-30-67 58 99 J02.4 6 User's Manual U13029EJ7V0UD U13029EJ7V0UD Major Revisions in This Edition (1/2) Page Throughout Description · Addition of package 64-pin plastic LQFP (14 x 14) µPD780982GC- PD780982GC-×××-8BS, 780983GC- 780983GC-×××-8BS, 780984GC- 780984GC-×××-8BS µPD780986GC- PD780986GC-×××-8BS, 780988GC- 780988GC-×××-8BS, 78F0988AGC-8BS 78F0988AGC-8BS µPD780982GC PD780982GC(A)-×××-8BS, 780983GC 780983GC(A)-×××-8BS, 780984GC 780984GC(A)-×××-8BS µPD780986GC PD780986GC(A)-×××-8BS, 780988GC 780988GC(A)-×××-8BS · Change of power supply voltage range as shown below. VDD = 4.0 to 5.5 V VDD = 3.0 to 5.5 V (expanded-specification products), VDD = 4.0 to 5.5 V (conventional products) · Change of system clock oscillation frequency (fX) as shown below. fX = 8.38 MHz fX = 12 MHz (expanded-specification products only), fX =8.38 MHz · Change of minimum instruction execution time p.26 Addition of 1.1 Expanded-Specification Products and Conventional Products 1.6 Pin Configuration (Top View) p.30 · Addition of Cautions 2 and 3 to 64-pin plastic SDIP (19.05 mm (750) p.31 · Addition of Cautions 2 and 3 to 64-pin plastic QFP (14 x 14), 64-pin plastic LQFP (14 x 14) p.56 3.1.2 Internal data memory space Addition of description on (1) Internal high-speed RAM and (2) Internal expansion RAM p.99 Modification of Table 5-2 Relationship Between CPU Clock and Minimum Instruction Execution Time p.105 Modification of Figure 5-5 Switching Between System Clock and CPU Clock p.117 Modification of Figure 6-9 Format of Prescaler Mode Register 00 p.118 Modification of Figure 6-10 Format of Prescaler Mode Register 01 p.123 Addition of Figure 6-16 Configuration Diagram of PPG Output p.123 Addition of Figure 6-17 PPG Output Operation Timing p.146 Modification of Figure 7-7 Format of Timer Clock Select Register 50 p.147 Modification of Figure 7-8 Format of Timer Clock Select Register 51 p.147 Modification of Figure 7-9 Format of Timer Clock Select Register 52 p.164 Modification of Figure 8-2 Format of Inverter Timer Control Register 7 p.173 Modification of Table 9-1 Loop Detection Time of Watchdog Timer p.174 Modification of Table 9-2 Interval Time p.175 Modification of Figure 9-2 Format of Watchdog Timer Clock Select Register p.177 Modification of Figure 9-4 Format of Oscillation Stabilization Time Select Register p.178 Modification of Table 9-4 Loop Detection Time of Watchdog Timer p.179 Modification of Table 9-5 Interval Time of Interval Timer p.204 11.2 Configuration of A/D Converter Addition of register figure to (2) A/D conversion result register 0 (ADCR0) p.206 Modification of Figure 11-2 Format of A/D Converter Mode Register 0 p.214 11.5 Notes on A/D Converter Addition of (6) Input impedance of ANI0 to ANI7 pins p.232 Modification of Figure 12-9 Format of Baud Rate Generator Control Register 0 p.233 Modification of Figure 12-10 Format of Baud Rate Generator Control Register 1 User's Manual U13029EJ7V0UD U13029EJ7V0UD 7 Major Revisions in This Edition (2/2) Page Description 12.4.2 Asynchronous serial interface (UART) mode p.234 p.235 · Modification of description · Modification of (1) Register setting (c) Baud rate generator control registers 0, 1 (BRGC00 BRGC00, BRGC01 BRGC01) p.240 Modification of Table 12-2 Relationship Between Source Clock of 5-Bit Counter and Value of m (with UART00 UART00) p.240 Modification of Table 12-3 Relationship Between Source Clock of 5-Bit Counter and Value of m (with UART01 UART01) p.241 Modification of Table 12-4 Relationship Between System Clock and Baud Rate p.248 Addition of Remark to 12.4.3 Infrared data transfer mode p.249 Modification of Table 12-7 Baud Rate That Can Be Set in Infrared Data Transfer Mode p.254 Modification of Figure 13-2 Format of Serial Operation Mode Register 3 p.280 Addition of Caution to 15.1 External Device Expansion Function p.284 Change of R/W to W in Figure 15-2 Format of Memory Expansion Mode Register p.294 Modification of Figure 16-1 Format of Oscillation Stabilization Time Select Register p.297 Modification of Figure 16-3 Releasing HALT Mode by RESET Input p.300 Modification of Figure 16-5 Releasing STOP Mode by RESET Input p.308 Revision of descriptions on flash memory programming as 18.3 Flash Memory Features p.329 18.4.5 Entry RAM area Modification of (c) Write time data p.357 Addition of CHAPTER 20 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS) p.377 Addition of CHAPTER 21 ELECTRICAL SPECIFICATIONS (CONVENTIONAL PRODUCTS) p.396 Addition of CHAPTER 22 PACKAGE DRAWINGS p.399 Addition of CHAPTER 23 RECOMMENDED SOLDERING CONDITIONS p.401 Modification of APPENDIX A DEVELOPMENT TOOLS p.413 Addition of APPENDIX B NOTES ON DESIGNING TARGET SYSTEM The mark 8 shows major revised points. User's Manual U13029EJ7V0UD U13029EJ7V0UD INTRODUCTION Target Readers This manual is intended for users who wish to understand the functions of the µPD780988 PD780988 Subseries and to design and develop application systems and programs using these microcontrollers. Purpose This manual is intended to give users an understanding of the functions described in the organization below. Organization The µPD780988 PD780988 Subseries User's Manual is divided into two parts: this manual and instructions (common to the 78K/0 78K/0 Series). µPD780988 PD780988 Subseries 78K/0 78K/0 Series User's Manual User's Manual (This manual) Instructions · Pin functions · CPU functions · Internal block functions · Instruction set · Interrupt functions · Explanation of instruction · Other on-chip peripheral functions · Electrical specifications How to Read This Manual It is assumed that the reader of this manual has general knowledge in the fields of electrical engineering, logic circuits, and microcontrollers. To those who use this manual as the manual of the µPD780982 PD780982(A), 780983(A), 780984(A), 780986(A), 780988(A), and 78F0988A 78F0988A(A): Unless there are functional differences, the µPD780982 PD780982, 780983, 780984, 780986, 780988, and 78F0988A 78F0988A are treated as representative devices, therefore, when this is used as a manual for the µPD780982 PD780982(A), 780983(A), 780984(A), 780986(A), 780988(A), and 78F0988A 78F0988A(A) read the product names as µPD780982 PD780982(A), 780983(A), 780984(A), 780986(A), 780988(A), and 78F0988A 78F0988A(A). To understand the functions in general: Read this manual in the order of the contents. How to interpret register format: The bit name of a bit whose number is encircled is defined as a reserved word in the RA78K0 RA78K0, and in the header file sfrbit.in the CC78K0 CC78K0. When you know a register name and want to confirm its details: Read APPENDIX C REGISTER INDEX. To know the µPD789830 PD789830 Subseries instruction functions in detail: Refer to 78K/0 78K/0 Series Instructions User's Manual (U12326E U12326E). Caution Examples in this manual employ the "standard" quality grade for general electronics. When using examples in this manual for applications that require the "special" quality grade, review the quality grade of each part and/or circuit actually used. User's Manual U13029EJ7V0UD U13029EJ7V0UD 9 Conventions Data significance: Higher digits on the left and lower digits on the right Active low representation: ××× (overscore over pin or signal name) Note: Footnote for item marked with Note in the text Caution: Information requiring particular attention Remark: Supplementary information Numerical representation: Binary . ×××× or ××××B Decimal . ×××× Hexadecimal . ××××H Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name Document No. µPD780988 PD780988 Subseries User's Manual This manual µPD780988 PD780988 Subseries Inverter Control Application Note U13119E U13119E 78K/0 78K/0 Series Instructions User's Manual U12326E U12326E 78K/0 78K/0 Series Basics (I) Application Note U12704E U12704E Documents Related to Development Software Tools (User's Manuals) Document Name RA78K0 RA78K0 Assembler Package Document No. Operation Language U14446E U14446E Structured Assembly Language U11789E U11789E Operation CC78K0 CC78K0 C Compiler U14445E U14445E U14297E U14297E U14298E U14298E Language SM78K0S SM78K0S, SM78K0 SM78K0 System Simulator Ver.2.10 or Later Operation (Windows Based) U14611E U14611E SM78K SM78K Series System Simulator Ver.2.10 or Later External Part User Open Interface Specifications U15006E U15006E ID78K ID78K Series Integrated Debugger Ver. 2.30 or Later Operation (Windows Based) U15185E U15185E RX78K0 RX78K0 Real-Time OS Fundamentals U11537E U11537E Installation U11536E U11536E Project Manager Ver. 3.12 or Later (Windows Based) U14610E U14610E Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document for designing. 10 User's Manual U13029EJ7V0UD U13029EJ7V0UD Documents Related to Development Hardware Tools (User's Manuals) Document Name Document No. IE-78K0-NS IE-78K0-NS In-Circuit Emulator U13731E U13731E IE-78K0-NS-A IE-78K0-NS-A In-Circuit Emulator U14889E U14889E To be prepared IE-78K0-NS-PA IE-78K0-NS-PA Performance Board U14142E U14142E IE-78001-R-A IE-78001-R-A In-Circuit Emulator To be prepared IE-78K0-R-EX1 IE-78K0-R-EX1 In-Circuit Emulator Documents Related to Flash Memory Writing Document Name Document No. PG-FP3 Flash Memory Programmer User's Manual U13502E U13502E PG-FP4 Flash Memory Programmer User's Manual U15260E U15260E Other Related Documents Document Name Document No. SEMICONDUCTOR SELECTION GUIDE - Products & Packages - X13769E X13769E Semiconductor Device Mounting Technology Manual C10535E C10535E Quality Grades on NEC Semiconductor Devices C11531E C11531E NEC Semiconductor Device Reliability/Quality Control System C10983E C10983E Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E C11892E Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document for designing. User's Manual U13029EJ7V0UD U13029EJ7V0UD 11 CONTENTS CHAPTER 1 GENERAL . 26 1.1 Expanded-Specification Products and Conventional Products . 26 1.2 Features . 27 1.3 Applications . 27 1.4 Ordering Information . 28 1.5 Quality Grades . 29 1.6 Pin Configuration (Top View) . 30 1.7 78K/0 78K/0 Series Lineup . 33 1.8 Block Diagram . 36 1.9 Functional Outline . 37 1.10 Differences Between Standard Quality Grade Products and (A) Products . 38 1.11 Differences Between Flash Memory Products µPD78F0988A PD78F0988A and µPD78F0988 PD78F0988 . 38 CHAPTER 2 PIN FUNCTIONS . 39 2.1 List of Pin Functions . 39 2.2 Description of Pin Functions . 42 2.2.1 P00 to P03 (Port 0) . 42 2.2.2 P10 to P17 (Port 1) . 42 2.2.3 P20 to P26 (Port 2) . 43 2.2.4 P30 to P37 (Port 3) . 43 2.2.5 P40 to P47 (Port 4) . 43 2.2.6 P50 to P57 (Port 5) . 44 2.2.7 P64 to P67 (Port 6) . 44 2.2.8 TO70 to TO75 . 45 2.2.9 AVREF . 45 2.2.10 AVDD . 45 2.2.11 AVSS . 45 2.2.12 RESET . 45 2.2.13 X1 and X2 . 45 2.2.14 VDD0 and VDD1 . 45 2.2.15 VSS0 and VSS1 . 45 2.2.16 VPP (µPD78F0988A PD78F0988A only) . 45 2.2.17 TEST (Mask ROM version only) . 45 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins . 46 CHAPTER 3 CPU ARCHITECTURE . 48 3.1 Memory Space . 48 3.1.1 Internal program memory space . 55 3.1.2 Internal data memory space . 56 3.1.3 Special function register (SFR) area . 56 3.1.4 External memory space . 56 12 User's Manual U13029EJ7V0UD U13029EJ7V0UD 3.1.5 Data memory addressing . 57 3.2 Processor Registers . 63 3.2.1 Control registers . 63 3.2.2 General-purpose registers . 66 3.2.3 Special function registers (SFRs) . 68 3.3 Instruction Address Addressing . 73 3.3.1 Relative addressing . 73 3.3.2 Immediate addressing . 74 3.3.3 Table indirect addressing . 75 3.3.4 Register addressing . 76 3.4 Operand Address Addressing . 77 3.4.1 Implied addressing . 77 3.4.2 Register addressing . 78 3.4.3 Direct addressing . 79 3.4.4 Short direct addressing . 80 3.4.5 Special function register (SFR) addressing . 81 3.4.6 Register indirect addressing . 82 3.4.7 Based addressing . 83 3.4.8 Based indexed addressing . 84 3.4.9 Stack addressing . 84 CHAPTER 4 PORT FUNCTIONS . 85 4.1 Function of Ports . 85 4.2 Configuration of Ports . 87 4.2.1 Port 0 . 87 4.2.2 Port 1 . 88 4.2.3 Port 2 . 89 4.2.4 Port 3 . 90 4.2.5 Port 4 . 91 4.2.6 Port 5 . 92 4.2.7 Port 6 . 94 4.3 Registers Controlling Port Functions . 95 4.4 Operation of Port Functions . 97 4.4.1 Writing to I/O port . 97 4.4.2 Reading from I/O port . 97 4.4.3 Arithmetic operation of I/O port . 97 CHAPTER 5 CLOCK GENERATOR . 98 5.1 Function of Clock Generator . 98 5.2 Configuration of Clock Generator . 98 5.3 Register Controlling Clock Generator . 99 5.4 System Clock Oscillators . 100 5.4.1 System clock oscillator . 100 5.4.2 Divider . 102 5.5 Operation of Clock Generator . 103 User's Manual U13029EJ7V0UD U13029EJ7V0UD 13 5.6 Changing Setting of CPU Clock . 104 5.6.1 Time required for switching CPU clock . 104 5.6.2 Switching CPU clock . 105 CHAPTER 6 16-BIT 16-BIT TIMER/EVENT COUNTER . 106 6.1 Outline of 16-Bit Timer/Event Counter . 106 6.2 Function of 16-Bit Timer/Event Counter . 106 6.3 Configuration of 16-Bit Timer/Event Counter . 107 6.4 Registers Controlling 16-Bit Timer/Event Counter . 110 6.5 Operation of 16-Bit Timer/Event Counter . 120 6.5.1 Interval timer operation . 120 6.5.2 PPG output operation . 122 6.5.3 Pulse width measurement operation . 124 6.5.4 External event counter operation . 131 6.5.5 Square-wave output operation . 132 6.6 Notes on 16-Bit Timer/Event Counter . 134 CHAPTER 7 8-BIT TIMER/EVENT COUNTER . 138 7.1 Outline of 8-Bit Timer/Event Counter . 138 7.2 Function of 8-Bit Timer/Event Counter . 138 7.3 Configuration of 8-Bit Timer/Event Counter . 139 7.4 Registers Controlling 8-Bit Timer/Event Counter . 142 7.5 Operation of 8-Bit Timer/Event Counter . 149 7.5.1 Interval timer (8-bit) operation . 149 7.5.2 External event counter operation . 152 7.5.3 Square-wave output (8-bit resolution) operation . 153 7.5.4 8-bit PWM output operation . 154 7.5.5 Interval timer (16-bit) operation . 157 7.6 Notes on 8-Bit Timer/Event Counter . 159 CHAPTER 8 10-BIT 10-BIT INVERTER CONTROL TIMER . 160 8.1 Outline of 10-Bit Inverter Control Timer . 160 8.2 Function of 10-Bit Inverter Control Timer . 160 8.3 Configuration of 10-Bit Inverter Control Timer . 160 8.4 Registers Controlling 10-Bit Inverter Control Timer . 163 8.5 Operation of 10-Bit Inverter Control Timer . 167 CHAPTER 9 WATCHDOG TIMER . 173 9.1 9.2 Function of Watchdog Timer . 173 9.3 Configuration of Watchdog Timer . 174 9.4 Registers Controlling Watchdog Timer . 175 9.5 14 Outline of Watchdog Timer . 173 Operation of Watchdog Timer . 178 User's Manual U13029EJ7V0UD U13029EJ7V0UD 9.5.1 Operation as watchdog timer . 178 9.5.2 Operation as interval timer . 179 CHAPTER 10 REAL-TIME OUTPUT PORT . 180 10.1 Function of Real-Time Output Port . 180 10.2 Configuration of Real-Time Output Port . 180 10.3 Registers Controlling Real-Time Output Port . 185 10.4 Operation of Real-Time Output Port . 191 10.5 Using Real-Time Output Port . 201 10.6 Notes on Real-Time Output Port . 201 CHAPTER 11 A/D CONVERTER . 202 11.1 Function of A/D Converter . 202 11.2 Configuration of A/D Converter . 202 11.3 Registers Controlling A/D Converter . 205 11.4 Operation of A/D Converter . 208 11.4.1 Basic operation of A/D converter . 208 11.4.2 Input voltage and conversion result . 210 11.4.3 Operation mode of A/D converter . 211 11.5 Notes on A/D Converter . 213 11.6 How to Read A/D Converter Characteristics Tables . 219 CHAPTER 12 SERIAL INTERFACES UART00 UART00 AND UART01 UART01 . 222 12.1 Function of Serial Interfaces . 222 12.2 Configuration of Serial Interfaces . 223 12.3 Registers Controlling Serial Interfaces . 227 12.4 Operation of Serial Interfaces . 234 12.4.1 Operation stop mode . 234 12.4.2 Asynchronous serial interface (UART) mode . 234 12.4.3 Infrared data transfer mode . 248 CHAPTER 13 SERIAL INTERFACE SIO3 . 251 13.1 Function of Serial Interface SIO3 . 251 13.2 Configuration of Serial Interface . 252 13.3 Register Controlling Serial Interface . 253 13.4 Operation of Serial Interface . 255 13.4.1 Operation stop mode . 255 13.4.2 3-wire serial I/O mode . 256 CHAPTER 14 INTERRUPT FUNCTIONS . 259 14.1 Types of Interrupt Functions . 259 14.2 Interrupt Sources and Configuration . 259 14.3 Registers Controlling Interrupt Functions . 264 User's Manual U13029EJ7V0UD U13029EJ7V0UD 15 14.4 Interrupt Servicing Operation . 270 14.4.1 Non-maskable interrupt request acknowledgement operation . 270 14.4.2 Maskable interrupt request acknowledgement operation . 273 14.4.3 Software interrupt request acknowledgement operation . 275 14.4.4 Multiple interrupt servicing . 276 14.4.5 Pending interrupt requests . 279 CHAPTER 15 EXTERNAL DEVICE EXPANSION FUNCTION . 280 15.1 External Device Expansion Function . 280 15.2 Registers Controlling External Device Expansion Function . 284 15.3 Timing of External Device Expansion Function . 287 15.4 Example of Connection with Memory . 292 CHAPTER 16 STANDBY FUNCTION . 293 16.1 Standby Function and Configuration . 293 16.1.1 Standby function . 293 16.1.2 Register controlling standby function . 294 16.2 Operation of Standby Function . 295 16.2.1 HALT mode . 295 16.2.2 STOP mode . 298 CHAPTER 17 RESET FUNCTION . 301 CHAPTER 18 µPD78F0988A PD78F0988A . 305 18.1 Internal Memory Size Switching Register . 306 18.2 Internal Expansion RAM Size Switching Register . 307 18.3 Flash Memory Characteristics . 308 18.3.1 Programming environment . 308 18.3.2 Communication mode . 309 18.3.3 On-board pin processing . 312 18.3.4 Connection of adapter for flash writing . 315 18.4 Flash Memory Programming by Self Write . 323 18.4.1 Flash memory configuration . 323 18.4.2 Flash programming mode control register . 324 18.4.3 Self-write procedure . 324 18.4.4 CPU resources . 328 18.4.5 Entry RAM area . 328 18.4.6 Self-write subroutines . 330 18.4.7 Self-write circuit configuration . 342 CHAPTER 19 INSTRUCTION SET . 343 19.1 Conventions . 343 19.1.1 Operand representation and description formats . 343 19.1.2 Description of operation column . 344 16 User's Manual U13029EJ7V0UD U13029EJ7V0UD 19.1.3 Description of flag operation column . 344 19.2 Operation List . 345 19.3 Instruction List by Addressing . 353 CHAPTER 20 ELECTRICAL SPECIFICATIONS (EXPANDED-SPECIFICATION PRODUCTS) . 357 CHAPTER 21 ELECTRICAL SPECIFICATIONS (CONVENTIONAL PRODUCTS) . 377 CHAPTER 22 PACKAGE DRAWINGS . 396 CHAPTER 23 RECOMMENDED SOLDERING CONDITIONS . 399 APPENDIX A DEVELOPMENT TOOLS . 401 A.1 Software Package . 403 A.2 Language Processing Software . 403 A.3 Control Software . 404 A.4 Flash Memory Writing Tools . 404 A.5 Debugging Tools (Hardware) . 405 A.5.1 When using the in-circuit emulator IE-78K0-NS IE-78K0-NS or IE-78K0-NS-A IE-78K0-NS-A . 405 A.5.2 When using the in-circuit emulator IE-78001-R-A IE-78001-R-A . 406 A.6 Debugging Tools (Software) . 407 A.7 Embedded Software . 408 A.8 Upgrading from Former In-Circuit Emulator for 78K/0 78K/0 Series to IE-78001-R-A IE-78001-R-A . 409 A.9 Package Drawings for Conversion Socket and Conversion Adapter . 410 APPENDIX B NOTES ON DESIGNING TARGET SYSTEM . 413 APPENDIX C REGISTER INDEX . 417 C.1 Register Index (In Alphabetical Order with Respect to Register Name) . 417 C.2 Register Index (In Alphabetical Order with Respect to Register Symbol) . 420 APPENDIX D REVISION HISTORY . 423 User's Manual U13029EJ7V0UD U13029EJ7V0UD 17 LIST OF FIGURES (1/6) Figure No. Title Page 2-1 Pin I/O Circuits . 47 3-1 Memory Map (µPD780982 PD780982) . 49 3-2 Memory Map (µPD780983 PD780983) . 50 3-3 Memory Map (µPD780984 PD780984) . 51 3-4 Memory Map (µPD780986 PD780986) . 52 3-5 Memory Map (µPD780988 PD780988) . 53 3-6 Memory Map (µPD78F0988A PD78F0988A) . 54 3-7 Data Memory Addressing (µPD780982 PD780982) . 57 3-8 Data Memory Addressing (µPD780983 PD780983) . 58 3-9 Data Memory Addressing (µPD780984 PD780984) . 59 3-10 Data Memory Addressing (µPD780986 PD780986) . 60 3-11 Data Memory Addressing (µPD780988 PD780988) . 61 3-12 Data Memory Addressing (µPD78F0988A PD78F0988A) . 62 3-13 Program Counter Configuration . 63 3-14 Program Status Word Configuration . 63 3-15 Stack Pointer Configuration . 64 3-16 Data Saved to Stack Memory . 65 3-17 Data Restored from Stack Memory . 65 3-18 General-Purpose Register Configuration . 67 4-1 Types of Ports . 85 4-2 Block Diagram of P00 to P03 . 88 4-3 Block Diagram of P10 to P17 . 88 4-4 Block Diagram of P20 to P26 . 89 4-5 Block Diagram of P30 to P37 . 90 4-6 Block Diagram of P40 to P47 . 91 4-7 Block Diagram of P50 . 92 4-8 Block Diagram of P51 to P57 . 93 4-9 Block Diagram of P64 to P67 . 94 4-10 Format of Pull-up Resistor Option Register . 96 5-1 Clock Generator Block Diagram . 98 5-2 Format of Processor Clock Control Register . 99 5-3 External Circuit of System Clock Oscillator . 100 5-4 Examples of Incorrect Resonator Connection . 101 5-5 Switching Between System Clock and CPU Clock . 105 6-1 Block Diagram of 16-Bit Timer/Event Counter 00 . 107 6-2 Block Diagram of 16-Bit Timer/Event Counter 01 . 108 6-3 Format of 16-Bit Timer Mode Control Register 00 . 111 6-4 Format of 16-Bit Timer Mode Control Register 01 . 112 6-5 18 Format of Port Mode Register . 95 4-11 Format of Capture/Compare Control Register 00 . 113 User's Manual U13029EJ7V0UD U13029EJ7V0UD LIST OF FIGURES (2/6) Figure No. Title Page 6-6 Format of Capture/Compare Control Register 01 . 114 6-7 Format of Timer Output Control Register 00 . 115 6-8 Format of Timer Output Control Register 01 . 116 6-9 Format of Prescaler Mode Register 00 . 117 6-10 Format of Prescaler Mode Register 01 . 118 6-11 Format of Port Mode Register 5 . 119 6-12 Control Register Settings for Interval Timer Operation . 120 6-13 Interval Timer Configuration Diagram . 121 6-14 Timing of Interval Timer Operation . 121 6-15 Control Register Settings for PPG Output Operation . 122 6-16 Configuration Diagram of PPG Output . 123 6-17 PPG Output Operation Timing . 123 6-18 Control Register Settings for Pulse Width Measurement with Free-Running Counter and One Capture Register . 124 6-19 Configuration Diagram for Pulse Width Measurement with Free-Running Counter . 125 6-20 Timing of Pulse Width Measurement Operation with Free-Running Counter and One Capture Register (with Both Edges Specified) . 125 6-21 Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter . 126 6-22 CR01n Capture Operation with Rising Edge Specified . 127 6-23 Timing of Pulse Width Measurement Operation with Free-Running Counter (with Both Edges Specified) . 127 6-24 Control Register Settings for Pulse Width Measurement with Free-Running Counter and Two Capture Registers . 128 6-25 Timing of Pulse Width Measurement Operation by Free-Running Counter and Two Capture Registers (with Rising Edge Specified) . 129 6-26 6-27 Control Register Settings for Pulse Width Measurement by Means of Restart . 130 Timing of Pulse Width Measurement Operation by Means of Restart (with Rising Edge Specified) . 130 6-28 Control Register Settings in External Event Counter Mode . 131 6-29 External Event Counter Configuration Diagram . 132 6-30 External Event Counter Operation Timings (with Rising Edge Specified) . 132 6-31 Control Register Settings in Square-Wave Output Mode . 133 6-32 Square-Wave Output Operation Timing . 133 6-33 16-Bit Timer Counter Start Timing . 134 6-34 Timing After Change of Compare Register During Timer Count Operation . 134 6-35 Capture Register Data Retention Timing . 135 6-36 Operation Timing of OVF0n Flag . 136 7-1 Block Diagram of 8-Bit Timer/Event Counter 50 . 139 7-2 Block Diagram of 8-Bit Timer/Event Counter 51 . 140 7-3 Block Diagram of 8-Bit Timer/Event Counter 52 . 140 7-4 Format of 8-Bit Timer Mode Control Register 50 . 143 7-5 Format of 8-Bit Timer Mode Control Register 51 . 144 7-6 Format of 8-Bit Timer Mode Control Register 52 . 145 User's Manual U13029EJ7V0UD U13029EJ7V0UD 19 LIST OF FIGURES (3/6) Figure No. Title Page 7-7 Format of Timer Clock Select Register 51 . 147 7-9 Format of Timer Clock Select Register 52 . 147 7-10 Format of Port Mode Register 2 . 148 7-11 Interval Timer Operation Timing . 149 7-12 External Event Counter Operation Timing (with Rising Edge Specified) . 152 7-13 Square-Wave Output Operation Timing . 153 7-14 PWM Output Operation Timing . 155 7-15 Operation Timing When CR5n Is Changed . 156 7-16 16-Bit Resolution Cascade Mode (with TM50 and TM51) . 157 7-17 16-Bit Resolution Cascade Mode (with TM51 and TM52) . 158 7-18 Start Timing of 8-Bit Timer Counter . 159 7-19 Timing After Changing Values of Compare Registers During Timer Count Operation . 159 8-1 Block Diagram of 10-Bit Inverter Control Timer . 161 8-2 Format of Inverter Timer Control Register 7 . 164 8-3 Format of Inverter Timer Mode Register 7 . 165 8-4 TM7 Operation Timing (Basic Operation) . 169 8-5 TM7 Operation Timing (CMn (BFCMn) CM3 (BFCM3) . 170 8-6 TM7 Operation Timing (CMn (BFCMn) = 000H) . 171 8-7 TM7 Operation Timing (CMn (BFCMn) = CM3 ­ 1/2DTM, CMn (BFCMn) > CM3 ­ 1/2DTM) . 172 9-1 Watchdog Timer Block Diagram . 174 9-2 Format of Watchdog Timer Clock Select Register . 175 9-3 Format of Watchdog Timer Mode Register . 176 9-4 Format of Oscillation Stabilization Time Select Register . 177 10-1 Block Diagram of Real-Time Output Port . 181 10-2 Configuration of Real-Time Output Buffer Register 0 . 183 10-3 Configuration of Real-Time Output Buffer Register 1 . 184 10-4 Format of Port Mode Register 3 . 185 10-5 Format of Real-Time Output Port Mode Register 0 . 185 10-6 Format of Real-Time Output Port Mode Register 1 . 186 10-7 Format of Real-Time Output Port Control Register 0 . 187 10-8 Format of Real-Time Output Port Control Register 1 . 188 10-9 Format of DC Control Register 0 . 189 10-10 Format of DC Control Register 1 . 190 10-11 Real-Time Output Port Operation Timing Example (8 Bits × 1) . 193 10-12 Real-Time Output Port Operation Timing Example (6 Bits × 1) . 198 11-1 A/D Converter Block Diagram . 203 11-2 Format of A/D Converter Mode Register 0 . 206 11-3 Format of Analog Input Channel Specification Register 0 . 207 11-4 20 Format of Timer Clock Select Register 50 . 146 7-8 Basic Operation of A/D Converter . 209 User's Manual U13029EJ7V0UD U13029EJ7V0UD LIST OF FIGURES (4/6) Figure No. Title Page 11-5 Relationship Between Analog Input Voltage and A/D Conversion Result . 210 11-6 A/D Conversion by Hardware Start (with Falling Edge Specified) . 211 11-7 A/D Conversion by Software Start . 212 11-8 Example of Reducing Current Consumption in Standby Mode . 213 11-9 Processing Analog Input Pin . 214 11-10 A/D Conversion End Interrupt Request Generation Timing . 215 11-11 Processing of AVDD Pin . 215 11-12 Timing of Reading Conversion Result (When Conversion Result Is Undefined) . 216 11-13 Timing of Reading Conversion Result (When Conversion Result Is Normal) . 216 11-14 Example of Connecting Capacitor to AVREF Pin . 217 11-15 Internal Equivalent Circuit of Pins ANI0 to ANI7 . 218 11-16 Example of Connection if Signal Source Impedance Is High . 218 11-17 Overall Error . 220 11-18 Quantization Error . 220 11-19 Zero-Scale Error . 221 11-20 Full-Scale Error . 221 11-21 Integral Linearity Error . 221 11-22 Differential Linearity Error . 221 12-1 Block Diagram of Serial Interface UART00 UART00 . 223 12-2 Block Diagram of UART00 UART00 Baud Rate Generator . 224 12-3 Block Diagram of Serial Interface UART01 UART01 . 225 12-4 Block Diagram of UART01 UART01 Baud Rate Generator . 225 12-5 Format of Asynchronous Serial Interface Mode Register 0 . 228 12-6 Format of Asynchronous Serial Interface Mode Register 1 . 229 12-7 Format of Asynchronous Serial Interface Status Register 0 . 230 12-8 Format of Asynchronous Serial Interface Status Register 1 . 231 12-9 Format of Baud Rate Generator Control Register 0 . 232 12-10 Format of Baud Rate Generator Control Register 1 . 233 12-11 Baud Rate Tolerance Including Sampling Error (When k = 0) . 242 12-12 Asynchronous Serial Interface Transmit/Receive Data Format . 243 12-13 Timing of Asynchronous Serial Interface Transmission Completion Interrupt Request Generation . 245 12-14 Timing of Asynchronous Serial Interface Reception Completion Interrupt Request Generation . 246 12-15 Receive Error Timing . 247 12-16 Comparison of Data Format in Infrared Data Transfer Mode and UART Mode . 248 13-1 Block Diagram of Serial Interface 3 . 252 13-2 Format of Serial Operation Mode Register 3 . 254 13-3 Timing of 3-Wire Serial I/O Mode . 258 14-1 Basic Configuration of Interrupt Function . 262 14-2 Format of Interrupt Request Flag Registers . 265 14-3 Format of Interrupt Mask Flag Register . 266 User's Manual U13029EJ7V0UD U13029EJ7V0UD 21 LIST OF FIGURES (5/6) Figure No. Title Page 14-4 Format of Priority Specification Flag Register . 267 14-5 Format of External Interrupt Rising Edge Enable Register and External Interrupt Falling Edge Enable Register . 268 14-6 Format of External Interrupt Rising Edge Enable Register 5 and External Interrupt Falling Edge Enable Register 5 . 269 14-7 Configuration of Program Status Word . 270 14-8 Flowchart from Non-Maskable Interrupt Request Generation to Acknowledgement . 271 14-9 Timing of Non-Maskable Interrupt Request Acknowledgement . 271 14-10 Acknowledgement Operation of Non-Maskable Interrupt Request . 272 14-11 Interrupt Request Acknowledgement Program Algorithm . 274 14-12 Interrupt Request Acknowledgement Timing (Minimum Time) . 275 14-13 Interrupt Request Acknowledgement Timing (Maximum Time) . 275 14-14 Multiple Interrupt Example . 277 14-15 Pending Interrupt Request . 279 15-1 Memory Map When External Device Expansion Function Used . 281 15-2 Format of Memory Expansion Mode Register . 284 15-3 Format of Memory Expansion Wait Setting Register . 285 15-4 Format of Memory Size Switching Register . 286 15-5 Instruction Fetch from External Memory . 288 15-6 Read Timing of External Memory . 289 15-7 Write Timing of External Memory . 290 15-8 Read-Modify-Write Timing of External Memory . 291 15-9 Example of Connecting µPD780984 PD780984 and Memory . 292 16-1 Format of Oscillation Stabilization Time Select Register . 294 16-2 Releasing HALT Mode by Interrupt Request . 296 16-3 Releasing HALT Mode by RESET Input . 297 16-4 Releasing STOP Mode by Interrupt Request . 299 16-5 Releasing STOP Mode by RESET Input . 300 17-1 Reset Function Block Diagram . 301 17-2 Reset Timing by RESET Input . 302 17-3 Reset Timing by Overflow in Watchdog Timer . 302 17-4 Reset Timing by RESET Input in STOP Mode . 302 18-1 Format of Memory Size Switching Register . 306 18-2 Format of Internal Expansion RAM Size Switching Register . 307 18-3 Environment for Writing Program to Flash Memory . 308 18-4 Communication Mode Selection Format . 309 18-5 VPP Pin Connection Example . 312 18-7 Signal Conflict (Input Pin of Serial Interface) . 313 18-8 22 Example of Connection with Dedicated Flash Programmer . 310 18-6 Abnormal Operation of Other Device . 313 User's Manual U13029EJ7V0UD U13029EJ7V0UD LIST OF FIGURES (6/6) Figure No. Title Page 18-9 Signal Conflict (RESET Pin) . 314 18-10 Wiring Example for Flash Writing Adapter with 3-Wire Serial I/O (SIO3) . 315 18-11 Wiring Example for Flash Writing Adapter with 3-Wire Serial I/O (SIO3) with Handshake . 317 18-12 Wiring Example for Flash Writing Adapter with UART (UART00 UART00) . 319 18-13 Wiring Example for Flash Writing Adapter with Pseudo 3-Wire Serial I/O . 321 18-14 Flash Memory Configuration . 323 18-15 Format of Flash Programming Mode Control Register . 324 18-16 Self Programming Flowchart . 325 18-17 Self-Write Timing . 327 18-18 Self-Write Circuit Configuration . 342 A-1 Configuration of Development Tools . 402 A-2 EV-9200GC-64 EV-9200GC-64 Package Drawing (For Reference Only) . 410 A-3 EV-9200GC-64 EV-9200GC-64 Footprints (For Reference Only) . 411 A-4 TGC-064SAP TGC-064SAP Package Drawing (For Reference Only) . 412 B-1 Distance Between In-Circuit Emulator and Conversion Socket or Conversion Adapter (1) . 413 B-2 Distance Between In-Circuit Emulator and Conversion Socket or Conversion Adapter (2) . 414 B-3 Distance Between In-Circuit Emulator and Conversion Socket or Conversion Adapter (3) . 414 B-4 Connection Condition of Target System (1) . 415 B-5 Connection Condition of Target System (2) . 416 B-6 Connection Condition of Target System (3) . 416 User's Manual U13029EJ7V0UD U13029EJ7V0UD 23 LIST OF TABLES (1/2) Table No. Title Page 1-1 Differences Between Standard Quality Grade Products and (A) Products . 38 1-3 Differences Between µPD78F0988A PD78F0988A and µPD78F0988 PD78F0988 . 38 2-1 Types of Pin I/O Circuits . 46 3-1 Internal ROM Capacity . 55 3-2 Vector Table . 55 3-3 Absolute Addresses of General-Purpose Registers . 66 3-4 Special Function Register List . 69 4-1 Port Functions . 86 4-2 Port Configuration . 87 5-1 Configuration of Clock Generator . 98 5-2 Relationship Between CPU Clock and Minimum Instruction Execution Time . 99 5-3 Maximum Time Required for Switching CPU Clock . 104 6-1 Configuration of 16-Bit Timer/Event Counter . 107 6-2 TI00n Pin Valid Edge and CR00n, CR01n Capture Triggers . 109 6-3 TI01n Pin Valid Edge and CR00n Capture Trigger . 109 7-1 Configuration of 8-Bit Timer/Event Counter . 139 8-1 Configuration of 10-Bit Inverter Control Timer . 160 9-1 Loop Detection Time of Watchdog Timer . 173 9-2 Interval Time . 174 9-3 Configuration of Watchdog Timer . 174 9-4 Loop Detection Time of Watchdog Timer . 178 9-5 Interval Time of Interval Timer . 179 10-1 Configuration of Real-Time Output Port . 180 10-2 Operation During Manipulation of Real-Time Output Buffer Register 0 . 183 10-3 Operation During Manipulation of Real-Time Output Buffer Register 1 . 184 10-4 Real-Time Output Port Operation Mode and Output Trigger . 187 10-5 Real-Time Output Port Operation Mode and Output Trigger . 188 10-6 Relationship Between Settings of Each Bit of Control Register and Real-Time Output . 192 10-7 Relationship Between Settings of Each Bit of Control Register and Real-Time Output . 197 11-1 Configuration of A/D Converter . 202 11-2 24 Differences Between Expanded-Specification Products and Conventional Products . 26 1-2 Resistances and Capacitances of Equivalent Circuit (Reference Values) . 218 User's Manual U13029EJ7V0UD U13029EJ7V0UD LIST OF TABLES (2/2) Table No. Title Page 12-1 Configuration of Serial Interfaces . 223 12-2 Relationship Between Source Clock of 5-Bit Counter and Value of m (with UART00 UART00) . 240 12-3 Relationship Between Source Clock of 5-Bit Counter and Value of m (with UART01 UART01) . 240 12-4 Relationship Between System Clock and Baud Rate . 241 12-5 Receive Error Causes . 247 12-6 Bit Rate and Pulse Width . 249 12-7 Baud Rate That Can Be Set in Infrared Data Transfer Mode . 249 13-1 Configuration of Serial Interface 3 . 252 14-1 Interrupt Source List . 260 14-2 Flags Corresponding to Respective Interrupt Request Sources . 264 14-3 Time from Generation of Maskable Interrupt Request to Servicing . 273 14-4 Interrupt Requests Enabled for Multiple Interrupt During Interrupt Servicing . 276 15-1 Pin Functions in External Memory Expansion Mode . 280 15-2 Status of Ports 4 and 6 in External Memory Expansion Mode . 280 15-3 Set Value of Internal Memory Size Switching Register . 286 16-1 Operation Status in HALT Mode . 295 16-2 Operation After Release of HALT Mode . 297 16-3 Operation Status in STOP Mode . 298 16-4 Operation After Release of STOP Mode . 300 17-1 Status of Each Hardware After Reset . 303 18-1 Differences Between µPD78F0988A PD78F0988A and Mask ROM Versions . 305 18-2 Set Values of Memory Size Switching Register . 306 18-3 Set Values of Internal Expansion RAM Size Switching Register . 307 18-4 Communication Mode List . 309 18-5 Pin Connection List . 311 18-6 Entry RAM Area . 328 18-7 List of Self-Write Subroutines . 330 19-1 Operand Representation and Description Formats . 343 23-1 Surface Mounting Type Soldering Conditions . 399 23-2 Insertion Type Soldering Conditions . 400 A-1 Upgrading from Former In-Circuit Emulator for 78K/0 78K/0 Series to IE-78001-R-A IE-78001-R-A . 409 B-1 Distance Between In-Circuit Emulator and Conversion Socket or Conversion Adapter . 413 User's Manual U13029EJ7V0UD U13029EJ7V0UD 25 CHAPTER 1 GENERAL 1.1 Expanded-Specification Products and Conventional Products The expanded-specification product and conventional product refer to the following products. Expanded-specification product: Products with a rankNote other than K · Mask ROM versions for which orders were received after December 1, 2001. · Flash memory versions that were shipped after January 1, 2002. Conventional product: Products with rankNote K · Products other than the above expanded specification products. Note The rank is indicated by the 5th digit from the left in the lot number marked on the package. Lot number O O O O Year code Week code × × × × NEC control code Rank Expanded-specification products and conventional products differ in the power supply voltage range and operating frequency ratings. The differences are shown in Table 1-1. Table 1-1. Differences Between Expanded-Specification Products and Conventional Products Power Supply Voltage (VDD) Guaranteed Operating Speed (Operating Frequency) Conventional Products Expanded-Specification Products 4.5 to 5.5 V 8.38 MHz (0.238 µs) 12 MHz (0.166 µs) 4.0 to 5.5 V 8.38 MHz (0.238 µs) 8.38 MHz (0.238 µs) 3.0 to 5.5 V - 8.38 MHz (0.238 µs) Remark The parenthesized values indicates the minimum instruction execution time. 26 User's Manual U13029EJ7V0UD U13029EJ7V0UD CHAPTER 1 GENERAL 1.2 Features · Internal ROM and RAM Item Program Memory Data Memory Part Number Internal ROM Flash Memory Internal High-Speed RAM Internal Expansion RAM µPD780982 PD780982 16 KB - 1,024 bytes - µPD780983 PD780983 24 KB - - µPD780984 PD780984 32 KB - - µPD780986 PD780986 48 KB - 1,024 bytes µPD780988 PD780988 60 KB - µPD78F0988A PD78F0988A Notes - 60 KB Note 1 1,024 bytes Note 2 1. 16, 24, 32, 48, or 60 KB are selectable by using the internal memory size switching register (IMS). 2. 0 or 1,024 bytes are selectable by using the internal expansion RAM size switching register (IXS). · Less EMI (Electro Magnetic Interference) noise than existing µPD78014 PD78014 and 78018F 78018F Subseries · External memory expansion space: 256 bytes (except µPD780988 PD780988) · Minimum instruction execution time: 0.166 µs (@ fX = 12 MHz operationNote), 0.238 µs (@ fX = 8.38 MHz operation) · Instruction set suitable for system control · Bit processing in entire address space · Multiply/divide instructions · I/O ports: 47 · A/D converter · 10-bit resolution × 8 channels · Serial interface: 3 channels · UART mode: 2 channels · 3-wire serial I/O mode: 1 channel · Timer: 7 channels · 10-bit inverter control timer: 1 channel · 16-bit timer/event counter: 2 channels · 8-bit timer/event counter: 3 channels · Watchdog timer: 1 channel · Vectored interrupts: 26 · Power supply voltage: VDD = 3.0 to 5.5 V (expanded-specification products) VDD = 4.0 to 5.5 V (conventional products) Note Expanded-specification products only. 1.3 Applications Motor control for inverter air conditioners, washing machines, refrigerators, etc. User's Manual U13029EJ7V0UD U13029EJ7V0UD 27 CHAPTER 1 GENERAL 1.4 Ordering Information Part Number Package Internal ROM µPD780982CW- PD780982CW-××× 64-pin plastic SDIP (19.05 mm (750) Mask ROM µPD780982GC- PD780982GC-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780982GC- PD780982GC-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780983CW- PD780983CW-××× 64-pin plastic SDIP (19.05 mm (750) Mask ROM µPD780983GC- PD780983GC-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780983GC- PD780983GC-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780984CW- PD780984CW-××× 64-pin plastic SDIP (19.05 mm (750) Mask ROM µPD780984GC- PD780984GC-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780984GC- PD780984GC-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780986CW- PD780986CW-××× 64-pin plastic SDIP (19.05 mm (750) Mask ROM µPD780986GC- PD780986GC-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780986GC- PD780986GC-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780988CW- PD780988CW-××× 64-pin plastic SDIP (19.05 mm (750) Mask ROM µPD780988GC- PD780988GC-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780988GC- PD780988GC-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780982GC PD780982GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780982GC PD780982GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780983GC PD780983GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780983GC PD780983GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780984GC PD780984GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780984GC PD780984GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780986GC PD780986GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780986GC PD780986GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD780988GC PD780988GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Mask ROM µPD780988GC PD780988GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Mask ROM µPD78F0988ACW PD78F0988ACW 64-pin plastic SDIP (19.05 mm (750) Flash memory µPD78F0988AGC-AB8 PD78F0988AGC-AB8 64-pin plastic QFP (14 x 14) Flash memory µPD78F0988AGC-8BS PD78F0988AGC-8BS 64-pin plastic LQFP (14 x 14) Flash memory µPD78F0988AGC PD78F0988AGC(A)-AB8 64-pin plastic QFP (14 x 14) Flash memory Remark 28 ××× indicates ROM code suffix. User's Manual U13029EJ7V0UD U13029EJ7V0UD CHAPTER 1 GENERAL 1.5 Quality Grades Part Number Package Quality Grade µPD780982CW- PD780982CW-××× 64-pin plastic SDIP (19.05 mm (750) Standard µPD780982GC- PD780982GC-×××-AB8 64-pin plastic QFP (14 x 14) Standard µPD780982GC- PD780982GC-×××-8BS 64-pin plastic LQFP (14 x 14) Standard µPD780983CW- PD780983CW-××× 64-pin plastic SDIP (19.05 mm (750) Standard µPD780983GC- PD780983GC-×××-AB8 64-pin plastic QFP (14 x 14) Standard µPD780983GC- PD780983GC-×××-8BS 64-pin plastic LQFP (14 x 14) Standard µPD780984CW- PD780984CW-××× 64-pin plastic SDIP (19.05 mm (750) Standard µPD780984GC- PD780984GC-×××-AB8 64-pin plastic QFP (14 x 14) Standard µPD780984GC- PD780984GC-×××-8BS 64-pin plastic LQFP (14 x 14) Standard µPD780986CW- PD780986CW-××× 64-pin plastic SDIP (19.05 mm (750) Standard µPD780986GC- PD780986GC-×××-AB8 64-pin plastic QFP (14 x 14) Standard µPD780986GC- PD780986GC-×××-8BS 64-pin plastic LQFP (14 x 14) Standard µPD780988CW- PD780988CW-××× 64-pin plastic SDIP (19.05 mm (750) Standard µPD780988GC- PD780988GC-×××-AB8 64-pin plastic QFP (14 x 14) Standard µPD780988GC- PD780988GC-×××-8BS 64-pin plastic LQFP (14 x 14) Standard µPD780982GC PD780982GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Special µPD780982GC PD780982GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Special µPD780983GC PD780983GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Special µPD780983GC PD780983GC(A)-×××-8BS 64-pin plastic LQFP (14 x 14) Special µPD780984GC PD780984GC(A)-×××-AB8 64-pin plastic QFP (14 x 14) Speci