NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| SN74199N-00 | Texas Instruments | IC TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24, Shift Register | 
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| SN74199N-10 | Texas Instruments | IC TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24, Shift Register |
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| SN74199J-00 | Texas Instruments | IC TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP24, Shift Register |
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| SN74199J | Texas Instruments | IC TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP24, Shift Register |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: O3Q0 IK cl[ïT Ï4] MR GN0Q2 13] CP CD06140S CD06140S 74199 Shift Register 8-Bit Parallel-Access Shift Register Product Specification TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT 74199 35MHz 90mA ORDERING CODE , Signetics Logic Products Product Specification Shift Register 74199 LOGIC DIAGRAM Vcc - Pin 24 GND = , 5-396 Signetics Logic Products Product Specification Shift Register 74199 TYPICAL CLEAR, LOAD , Logic Products Product Specification Shift Register 74199 DC ELECTRICAL CHARACTERISTICS (Over ... | OCR Scan |
5 pages, |
N74199N 74LS 400H 1N916 1N3064 74199 ttl 74199 datasheet abstract |
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| Abstract: serial, parallel, serial to parallel, or parallel to serial data transfers at very high speeds. 74199 , SUPPLY CURRENT 74199 35MHz 90mA ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V±5%; Ta = 0°C to +70°C , Respective Manufacturer Signetics Logic Products Product Specification Shift Register 74199 LOGIC , Products Product Specification Shift Register 74199 TYPICAL CLEAR, LOAD, RIGHT-SHIFT, LEFT-SHIFT , 74199 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless ... | OCR Scan |
5 pages, |
N74199N 74LS 1N916 1N3064 ttl 74199 datasheet abstract |
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| Abstract: Signetics 74199 Shift Register 8-Bit Parallel-Access Shift Register Product Specification Logic , CURRENT 74199 35MHz 90mA ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V±5%; TA = 0°C to +70°C , Specification Shift Register 74199 LOGIC DIAGRAM Vcc - Pin 24 GND = Pin 12 ( ) = Pin number MODE , 74199 TYPICAL CLEAR, LOAD, RIGHT-SHIFT, LEFT-SHIFT, INHIBIT AND CLEAR SEQUENCES 5 ABSOLUTE MAXIMUM , Manufacturer Signetics Logic Products Product Specification Shift Register 74199 PC ELECTRICAL ... | OCR Scan |
5 pages, |
ttl 74199 N74199N 74LS 400H 1N916 1N3064 74199 equivalent datasheet abstract |
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| Abstract: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D170 54/74199 23 3 5 i I I 7 9 16 18 I I I I 20 22 I I PE Po Pi J P2 P3 P4 P5 Pe P7 K CP MR Qo Qi Û2 Q3 04 05 06 Û7 n DIGITAL-TTL D171 D172 54LS/74LS295 54LS/74LS295, 54LS/74LS295A 54LS/74LS295A 54/74194, 54S/74S194 54S/74S194, 54LS/74LS194 54LS/74LS194 6 2 3 4 5 u PE Po Pi P2 P3 Ds CP OE , 07 T-Í Vcc = Pin 16 GND = Pin 8 13-65 FAIRCHILD DIGITAL TTL REGISTERS I Item I Function DEVICE , 39 17 70 D163 4L,6B,9B 14 Parallel-in/Parallel-out Shift Right 54/74199 8 J,K 8S S 35 20 360 D170 4M ... | OCR Scan |
2 pages, |
ttl 7495 D170 D171 74194 logic diagram D173 D174 D175 TTL 74194 ttl 74199 ci 7495 74198 74194 shift register D172 74179 datasheet abstract |
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| Abstract: TTL. SAMSUNG gate array design activity is performed on the computer aided design system which , (famout: 2) • Maximum Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O , Respective Manufacturer 177 KG10000 KG10000 SERIES SEMI-CUSTOM CMOS GATE ARRAY EQUIVALENT CELL COUNTS OF LS TTL TTL Pari No. Count TTL Part No. Count TTL Part No. Count TTL Part No. Count 7400 4 7470 16 74152 24 , 74377 48 7452 8 74139 20 74199 85 74378 34 7453 7 74141 16 74225 450 74379 24 7454 7 74142 90 74226 ... | OCR Scan |
6 pages, |
74274 74266 74284 74144 74259 7408, 7404, 7486, 7432 4001 4011 cmos 74226 ttl 74395 74381 LS 74141 7404 7408 7432 ttl 74183 CMOS 4017 series KG10000 KG10000 KG10000 abstract |
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| Abstract: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D170 54/74199 23 3 5 i I I 7 9 16 18 I I I I 20 22 I I PE Po Pi J P2 P3 P4 P5 Pe P7 K CP MR Qo Qi Û2 Q3 04 05 06 Û7 n DIGITAL-TTL D171 D172 54LS/74LS295 54LS/74LS295, 54LS/74LS295A 54LS/74LS295A 54/74194, 54S/74S194 54S/74S194, 54LS/74LS194 54LS/74LS194 6 2 3 4 5 u PE Po Pi P2 P3 Ds CP OE Qo Ol Q2 Q3 14 4 6 8 10 15 17 19 21 13 12 11 10 2 3 4 5 6 7 Dsr Po Pi P2 P3 Dsl 9- So 10- Si , 07 T-Í Vcc = Pin 16 GND = Pin 8 13-65 FAIRCHILD DIGITAL TTL REGISTERS (Cont'd) I Item I ... | OCR Scan |
2 pages, |
74164 74198 74ls164 74ls175 pin diagram 74ls377 D170 D171 D172 D173 D174 D175 Parallel-Out ttl 74164 74LS165 74LS194 datasheet abstract |
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| Abstract: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D170 54/74199 23 3 5 i I I 7 9 16 18 I I I I 20 22 I I PE Po Pi J P2 P3 P4 P5 Pe P7 K CP MR Qo Qi Û2 Q3 04 05 06 Û7 n DIGITAL-TTL D171 D172 54LS/74LS295 54LS/74LS295, 54LS/74LS295A 54LS/74LS295A 54/74194, 54S/74S194 54S/74S194, 54LS/74LS194 54LS/74LS194 6 2 3 4 5 u PE Po Pi P2 P3 Ds CP OE Qo Ol Q2 Q3 14 4 6 8 10 15 17 19 21 13 12 11 10 2 3 4 5 6 7 Dsr Po Pi P2 P3 Dsl 9- So 10- Si , 07 T-Í Vcc = Pin 16 GND = Pin 8 13-65 FAIRCHILD DIGITAL TTL REGISTERS (Cont'd) Item Function ... | OCR Scan |
2 pages, |
ttl 74166 74194 74LS295A D170 D171 74164 D173 D174 D175 74194 shift register 74LS165 D172 ttl 74165 74198 74164 14 PIN DIAGRAM datasheet abstract |
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| Abstract: 7 9 11 Vcc = Pin 14 Vcc = Pin 16 GND = Pin 7 GND = Pin 8 13-64 FAIRCHILD DIGITAL TTL , 54LS/74LS195 54LS/74LS195 4 J,K 4S S 39 17 70 D163 4L,6B,9B 14 Parallel-in/Parallel-out Shift Right 54/74199 8 J,K ... | OCR Scan |
2 pages, |
74194 shift register 7495 pin 74LS95 93H00 93H72 93L00 93S00 pin diagram of 74195 TTL 74150 ttl 74199 D166 D165 D164 D163 93H00 abstract |
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| Abstract: compatible with most other TTL and MSI logic families. All inputs are buffered to lower the drive , contain the equivalent of 79 TTL gates. Average power dissipation per gate is typically 4.55 rr>W. '199 , SN74198 SN74198 SIM 74199 UNIT MIN NOM MAX MIN NOM MAX Supply voltage.VcC 4.5 5 5.5 4.7b 5 5.25 V High-level , , SN 74198 Serial Input, Sn. Si Clock Cleai\ Inputs A thru H SN54199 SN54199, SM 74199 J. K, Inputs A thru H ... | OCR Scan |
10 pages, |
SN74199 SN74198 SN54199 SN54198 otter controls 74198 shift register SN74199N SDLS078 SNS4199 SM74198 SM74199 1972-REVISED SDLS078 abstract |
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| Abstract: 7 9 11 Vcc = Pin 14 Vcc = Pin 16 GND = Pin 7 GND = Pin 8 13-64 FAIRCHILD DIGITAL TTL , 54LS/74LS195 54LS/74LS195 4 J,K 4S S 39 17 70 D163 4L,6B,9B 14 Parallel-in/Parallel-out Shift Right 54/74199 8 J,K , = asynchronous, S = synchronous 9-12 FAIRCHILD DIGITAL TTL REGISTERS (Cont'd) Item Function ... | OCR Scan |
3 pages, |
93L00 74LS958 74LS195 D163 93H00 D165 D166 dl 0165 ttl 7491 74LS165 74194 shift register 74195 TTL shift register TTL 74ls195 D164 74195 93H00 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| .info> SN54198 SN54198, SN54199 SN54199 SN54199 SN54199, SN74198 SN74198 SN74198 SN74198, SN74199 >description These 8–bit shift registers are compatible with most other TTL and MSI logic families. All www.datasheetarchive.com/files/texas-instruments/asl_data/aslbooks/graphics/sdls078/sdls078.fea |
Texas Instruments | 19/12/1996 | 1.93 Kb | FEA | sdls078.fea |
| - * 4-Bit Parallel Access Shift Register * * The TTL Logic Data Book, 1988, TI Pages 2-655 to 2 Parallel Access Shift Register * Philips FAST TTL Data Handbook, 1992, pages 287 to 292 * jat 7 * -74F195A- -74F195A- -74F195A- -74F195A- * 4 Bit Parallel Access Shift Register * Philips FAST TTL Data Handbook, 1992 * - 74LS195A 74LS195A 74LS195A 74LS195A - * 4-Bit Parallel Access Shift Register * * The TTL Logic Data Book, 1988, TI * * * - 74S195 74S195 74S195 74S195 - * 4-Bit Parallel Access Shift Register * * The TTL Logic Data Book, 1988, TI Pages www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/dig195.lib |
Spice Models | 18/04/2010 | 169.82 Kb | LIB | dig195.lib |
| * Library of Standard 74 TTL Family Digital Models * * Copyright OrCAD, Inc. 1998 All Rights :32:32 $ * * *$ *- * 7400 Quadruple 2-input Positive-Nand Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 + ) *$ *- * 7401 Quadruple 2-input Positive-Nand Gates with Open-Collector Outputs * * The TTL Data Book, Vol 2 + ) *$ *- * 7402 Quadruple 2-input Positive-Nor Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 + ) *$ *- * 7403 Quadruple 2-input Positive-Nand Gates with Open-Collector Outputs * * The TTL Data Book www.datasheetarchive.com/files/spicemodels/misc/spice_model_cd/mixed part list/spice-models-collection/7400.lib |
Spice Models | 29/07/2012 | 282.15 Kb | LIB | 7400.lib |
| * Library of Standard 74 TTL Family Digital Models * * Copyright Cadence Design Systems, Inc :26:32 $ * * *$ *- * 7400 Quadruple 2-input Positive-Nand Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 + ) *$ *- * 7401 Quadruple 2-input Positive-Nand Gates with Open-Collector Outputs * * The TTL Data Book, Vol 2 + ) *$ *- * 7402 Quadruple 2-input Positive-Nor Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 + ) *$ *- * 7403 Quadruple 2-input Positive-Nand Gates with Open-Collector Outputs * * The TTL Data Book www.datasheetarchive.com/files/spicemodels/misc/7400.lib |
Spice Models | 19/12/2001 | 282.17 Kb | LIB | 7400.lib |
| Ground. P0[7:0], P1[7:0]: ( Input/Output , TTL or CMOS compatible ). 16 lines grouped into I /O Port Lines (Input/Output, TTL or CMOS compati- ble). I/O lines grouped into I/O ports of 8 bits, bit , compatible with TTL or CMOS levels (except where Schmitt Trig- ger is present). Each bit can be programmed indi- vidually (Refer to the I/O ports chapter). TTL/CMOS Input For all those port bits where no input schmitt trig- ger is implemented, it is always possible to pro- gram the input level as TTL or www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5464-v1.htm |
STMicroelectronics | 09/02/2001 | 421.62 Kb | HTM | 5464-v1.htm |
| Supply Voltage. V SS : Digital Circuit Ground. P0[7:0], P1[7:0]: ( Input/Output , TTL or [7:0], P8[7:0], P9[7:4], P9[2:0]: I/O Port Lines (Input/Output, TTL or CMOS compati- ble). I/O lines device can be programmed as Input/Output or in Input mode, compatible with TTL or CMOS levels /O ports chapter). TTL/CMOS Input For all those port bits where no input schmitt trig- ger is implemented, it is always possible to pro- gram the input level as TTL or CMOS compatible by programming www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5464-v4.htm |
STMicroelectronics | 26/01/2001 | 408.05 Kb | HTM | 5464-v4.htm |
| ="DECODE1">Multiplexers NAND Gates Non-TTL >5.25 6.5 TTL TTL .75-5.25 -0.4/8 2.2 20 TTL TTL .75-5.25 -1/20 19.9 5.5 TTL TTL .75-5.25 -0.4/8 1.8 20 TTL TTL www.datasheetarchive.com/files/texas-instruments/asl_data/aslbooks/books/asl/asl.sgm |
Texas Instruments | 09/01/1997 | 3378.32 Kb | SGM | asl.sgm |