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Part Manufacturer Description Datasheet BUY
CDB5341 Cirrus Logic Evaluation, Design Tools Eval Bd visit Digikey
CDB42518 Cirrus Logic Evaluation, Design Tools Eval Bd visit Digikey
CDB42528 Cirrus Logic Evaluation, Design Tools Eval Bd visit Digikey
CDB4398 Cirrus Logic Evaluation, Design Tools Eval Bd visit Digikey
CDB2300-DC-LCO-CP Cirrus Logic Evaluation, Design Tools Eval Bd Gen. Purpose PLL visit Digikey
CDB3310 Cirrus Logic Evaluation, Design Tools Eval Bd Stereo Dig. Vol Cont. visit Digikey

tms+320+code+generation+tools+getting+started+gui

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: TMS-CCUV-SLEEVE-1-X-65mm 65 3.20 0.125 1.60 0.063 1.80-2.80 0.071-0.110 2.40 0.094 N/A TMS-CCUV-SLEEVE-1-X-65mm 65 3.20 0.125 1.60 0.063 1.80-2.80 0.071-0.110 3.20 0.125 22-18 TMS-CCUV-SLEEVE-2-X-65mm 65 4.80 0.187 2.40 0.094 2.60-3.70 , 3.20 0.126 3.50-5.10 0.138-0.201 9.50 0.375 8-4 TMS-CCUV-SLEEVE-4-X-65mm 65 , mm inches 32 6.40 0.250 3.20 0.126 N/A 6.40 0.250 TMS-CCUV-SLEEVE Tyco Electronics
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MS-CCUV-SLEEVE-15 TMS-CCUV-SLEEVE-16 TMS-CCUV-SLEEVE-17 TMS-CCUV-SLEEVE-18 TMS-CCUV-SLEEVE-19 TMS-CCUV-SLEEVE-20
Abstract: following features: - Capture up to 320-bit wide data. Capture always 1024 samples of data at the user , , 2013 Defined Value {80, 160, 240, 320} User-defined based on how many signals need to be , Stimuli outputs to enable fast usr_clk speeds Default Value 320 "none_specified" 0 7 , MNTR_WIDTH = 80; ///// This above parameter should be varied (80, 160, 240, 320) depending on user signals , /////////////////////// /* RAM_SIZE Monitor-Channel-Width 80 160 240 320 */ users_logic Achronix Semiconductor
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UG016
Abstract: Applications in the 5-to-320 Gbps Range The AMCC Packet Routing Switch (PRS) fabric is a family of scalable , Non-blocking, protocol-independent switch fabric · 5 Gbps to 320 Gbps of full-duplex user bandwidth · RoHS , range from 40 Gbps to 320 Gbps, including a 40-Gbps board and an 80-Gbps board for standard ATCA shelf , -64G and PRS Q-80G Switch Devices Highlights · Scalable switch fabric for applications of up to 320 Gbps , ) or 320 Gbps (eight devices) of full-duplex aggregate user bandwidth · One OC-192c / 10-Gbps NP/TM or Applied Micro Circuits
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Q-64G C192X 320-Gbps 624 CCGA 14 gbps 405EP C192
Abstract: MOS LSI TMS 4020 NC 2048-BIT DYNAMIC RANDOM-ACCESS MEMORY featu es Low power dissipation Full decode Access time â'" 320 nsec max Cycle time â'" 640 nsec max High output-current capability (2 mA typ) Low-threshold technology 24-pin plastic package description The TMS 4020 NC is a 1024-word by 2-bit random-access memory, constructed on a single chip, with MOS P-channel enhancement-mode transistors. The device , min 290 320 ns $1 to output access time PaCC2 ' OS (LOW) = 0-2 mA min 410 440 ns Address Capacitance -
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27-33pF TMS4020
Abstract: ) (MAX) s 320 ns 330 ns 200 ns 135 ns 375 m 420 ns 250 ns 165 ns 375 ns , MIN MAX MIN MAX MIN MAX d) Read cycle time 320 375 375 il s ffl Write cycle time 320 375 375 Read -
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10-PIN IC 4027 pin diagram 4027 ram 4027 pin diagram CI 4027 IC 4027 pin configuration IC 4027 4096-BIT
Abstract: TMà 4ÛÃ0 HC 2048-BIT DYNAMIC RANDOM-ACCESS MEMORY features â'¢ Low power dissipation â'¢ Put I decode â'¢ Access time â'" 320 nsec max â'¢ Cycle time - 640 nsec max â'¢ High output-current capability (2 mA typ) â'¢ Low-threshold technology â'¢ 24-pin plastic package description The TMS 4020 NC is a 1024-word by 2-bit random-access memory, constructed on a single chip, with MOS P-channel , £2 70 100 ns Address to output access time PACC1 'OS(HIGH) = 0-8 mA min 290 320 ns 01 to output -
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7S222
Abstract: -128 M5-192/1 M5-256/1 M5LV-256 M5-320 M5LV-320 M5-384 M5LV-384 M5-512 M5LV-512 5 , 256 320 320 384 384 512 512 Maximum User I/O Pins 120 120 120 160 , , I C, I C, I I M5-320 C C, I C, I C, I C, I I M5LV-320 C C, I , -512 M5LV-512 68 104 5 M5-384 M5LV-384 68*, 74 68* M5-320 M5LV-320 3.3 5 3.3 , I0 32 16 Block A/Macrocells 0-15 BLOCK DIAGRAM - M5(LV)-320/XXX 20446G-010 17 Lattice Semiconductor
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5d7 diode 16 macrocells 20446G-004 5d3 diode 6A15 transistor 7B12 M5LV-128/68 M5LV-128/120 M5LV-320/120 M5LV-128/74 M5LV-128/104 M5LV-320/160
Abstract: INTEGRATED CIRCUITS PZ3320C/PZ3320N 320 macrocell SRAM CPLD Product specification Supersedes , Semiconductors Product specification 320 macrocell SRAM CPLD PZ3320C/PZ3320N FEATURES DESCRIPTION · 320 macrocell SRAM based CPLD · Configuration times of under 1.0 second · IEEE 1149.1 compliant , Usable gates 10,000 Maximum inputs 192 Maximum I/Os 192 Number of macrocells 320 , Product specification 320 macrocell SRAM CPLD PZ3320C/PZ3320N ORDERING INFORMATION ORDER CODE Philips Semiconductors
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PZ3320C10BE PZ3320C10EB PZ3320C7BE PZ3320C7EB PZ3320N8BE PZ3320N8EB PZ3320
Abstract: 4.0 6.0 125 55 Yes Yes 3.3 256 160 5.5 3.0 4.5 182 55 Yes Yes M5-320 M5LV-320 5 320 192 7.5 4.0 6.0 125 70 Yes Yes 3.3 320 192 7.5 4.0 6.0 125 70 Yes Yes M5-384 M5LV-384 5 384 192 7.5 4.0 6.0 125 75 Yes , 256 160 5.5 3.0 4.5 182 TBD Yes Yes 5 256 160 5.5 3.0 4.5 182 TBD Yes Yes M5A3-320 M5A3-384 M5A3-512 3.3 320 192 5.5 3.0 4.5 182 TBD Yes Yes 3.3 384 192 5.5 3.0 4.5 182 TBD Yes Yes 3.3 512 256 5.5 3.0 , Speed Grades Speed Grade1 Device M5-128 M5LV-128 M5-192 M5-256 M5LV-256 M5-320 M5LV-320 M5-384 M5LV Lattice Semiconductor
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mac 7a8 5LV-256/160 M5A3-256/160 LV-512/256-7AC-10AI M5A3-320/120 M5A3-320/160 M5LV-320/184
Abstract: -192 M5-256 M5LV-256 M5-320 M5LV-320 M5-384 M5LV-384 M5-512 M5LV-512 5 3.3 5 5 3.3 5 3.3 5 3.3 5 3.3 Macrocells 128 128 192 256 256 320 320 , -192 M5A5-192 M5A3-256 M5A5-256 M5A3-320 M5A3-384 M5A3-512 Supply Voltage (V) 3.3 5 3.3 5 3.3 5 3.3 3.3 3.3 Macrocells 128 128 192 192 256 256 320 , M5LV-256 C M5-320 C C, I C, I C, I I M5LV-320 C C, I C, I C, I I Vantis
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diode 6a6 5D2 6 2c7 power diode making 5A6 diode 6a4 5D6 diode M5LV-384/160 M5A3-192/104 M5A3-384/160 M5LV-384/184 M5LV-384/192 M5A3-384/192
Abstract: -128 M5-192/1 M5-256/1 M5LV-256 M5-320 M5LV-320 M5-384 M5LV-384 M5-512 M5LV-512 5 , 256 320 320 384 384 512 512 Maximum User I/O Pins 120 120 120 160 , , I C, I C, I I M5-320 C C, I C, I C, I C, I I M5LV-320 C C, I , * 68* 68* M5-384 M5LV-384 M5-512 M5LV-512 68*, 74 100-pin PQFP M5-320 M5LV-320 , I0 32 16 Block A/Macrocells 0-15 BLOCK DIAGRAM - M5(LV)-320/XXX 20446G-010 17 Lattice Semiconductor
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M5-2562 7b12 DIODES MARKING M5 0d12 3B14 marking 1d4 M5LV-320/192 M5LV-384/120 M5LV-256/74 M5LV-256/104 M5LV-256/120 M5LV-256/160
Abstract: version 2.10 (7-16-97) and the hardware modifications to program all `310, `320 and `330 devices. Burning , software version 2.10B and the hardware modifications to programm all `310, `320 and `330 devices , 3-20 MSP430 Family MSP430 Family Hardware 3-21 Hardware MSP430 Family Upgrade of , application must provide an external voltage supply to the TDI/VPP pin (`310,'320 and `330 configurations) or , the datasheets. *) The programming voltage is applied to TDI/VPP pin in `310, `320 and `330 Texas Instruments
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MSP-PRG430A MSP-PRG430B MSP-PRG430C MSP430C313DL MSP430P313DL MSP430C311SDL 9 pole sub-d male IC51-0644-807 MSP430x110 pin diagram of MSP430 IC51-0684-390-1
Abstract: Family. For more technical or sales information, please see: www.xilinx.com XCR3320 320 macrocell , Semiconductors 1999 Apr 16 Philips Semiconductors Product specification 320 macrocell SRAM CPLD , technical or sales information, please see: www.xilinx.com FEATURES DESCRIPTION · 320 macrocell SRAM , gates 10,000 Maximum inputs 192 Maximum I/Os 192 Number of macrocells 320 , Product specification 320 macrocell SRAM CPLD PZ3320C/PZ3320N ORDERING INFORMATION ORDER CODE Xilinx
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Abstract: Features1 M5-128 M5LV-128 Feature Supply Voltage (V) M5-192 M5-256 M5LV-256 M5-320 M5LV-320 , Macrocells 128 128 192 256 256 320 320 384 384 512 512 Maximum User I/O , -256 M5A5-256 M5A3-320 M5A3-384 M5A3-512 Supply Voltage (V) 3.3 5 3.3 5 3.3 5 3.3 3.3 3.3 Macrocells 128 128 192 192 256 256 320 384 512 , ,I C,I I M5-256 c C,I C,I C,I I C,I C,I C,I I M5-320 c C -
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M5A3-256/74 M5A3-512/120 M5LV-512/160 M5A3-256/104 M5A3-512/160 M5LV-512/184
Abstract: 55 Yes Yes M5-320 M5LV-320 5 320 192 6.52 3.02 5.02 1672 70 Yes Yes 3.3 320 160 6.52 3.02 5.02 1672 , M5LV-256 M5-320 M5LV-320 M5-384 M5LV-384 M5-512 M5LV-512 C C C C C 3 -5 C C C -6 -7 C C, I C , * 120* 160 184* 192* 120 160 184* 192* 120* 160 184* 192* 256 120 160 184* 192* 256 M5-320 M5LV-320 5 , Allocator 64 PT I0 32 Macrocells 16 2 I/O Cells 16 BLOCK DIAGRAM - M5(LV)-320/XXX , Parameter Description Output HIGH Voltage (For M5-128/1, M5-192/1, M5-256/1, M5-320, M5-384, M5-512 Devices Lattice Semiconductor
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0d13 M5LV-256/68 M5LV-512/256-7AC-10AI M5LV-512/120 M5LV-512/192 M5LV-512/256
Abstract: ­58 ­59 ­60 A (8,13) .320 B (2,54) .100 C (3,05) .120 (4,45) .175 (11,43) .450 (5,84 Samtec
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F-197 1-800-SAMTEC-9
Abstract: ROM-clock output (160 KHz) CRU-clock output (320 KHz) Drain supply voltage Oscillator input Oscillator input -
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TMS 5100 TMS 1100 TMS5100 tms 1000 TMS 6100 TMS1000
Abstract: -192 M5-256 M5LV-256 M5-320 M5LV-320 M5-384 M5LV-384 M5-512 M5LV-512 5 3.3 5 5 3.3 5 3.3 5 3.3 5 3.3 Macrocells 128 128 192 256 256 320 320 , -192 M5A5-192 M5A3-256 M5A5-256 M5A3-320 M5A3-384 M5A3-512 Supply Voltage (V) 3.3 5 , 320 384 512 Maximum User I/O Pins 120 120 120 120 160 160 192 192 , C, I I M5-320 C C, I C, I C, I I M5LV-320 C C, I C, I C, I I Lattice Semiconductor
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MACH Programmer 6B15 2D15 5D10 PAL 007 A 1C12 5LV-384/120 M5A3-128/120 M5A3-384/120 M5A3-192/68 M5A3-192/74 M5A3-512/192
Abstract: Voltage (V) M5-192 M5-256 M5LV-256 M5-320 M5LV-320 M5-384 M5LV-384 M5-512 M5LV-512 5 , 256 320 320 384 384 512 512 Maximum User I/O Pins 120 120 160 160 , Feature M5A3-128 M5A5-128 M5A3-192 M5A5-192 M5A3-256 M5A5-256 M5A3-320 M5A3-384 M5A3 , 192 192 256 256 320 384 512 Maximum User I/O Pins 120 120 120 120 , ,I I M5-320 c C,I C,I C,I I M5LV-320 c C,I C,I C,I I M5 -
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M5A3-25 M5LV-25 M5A3-256/120 M5A3-256/1 M5A3-512/25 M5A3-192/120
Abstract: ) .230 (3,05) .120 Tin tail (8,13) .320 (2,54) .100 (12,83) .505 (5,84) .230 (4,45) .175 (10,41) .410 (4 Samtec
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vp 485 F-198-1
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