NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 107G Vibration Solderability 204D 208F 211A A Terminal Fatigue Mechanical Shock 211A 213B C C 10 A Terminal Strength REF AA 0� 12 1 I2 I1 Case is , Outline Drawing .190 REF Maximum Ratings SIG .030 DIA 9010-51 I2 Input Power Q2 I1 Q1 +13 dBm Max Temperature Range 0�C to 85�C .20 TYP .400 MAX .80 SQ Block , SIG REF 7 10 4 3 2 1 I2 GROUND Glass bead on Pin 1 a different color All ... | Original |
1 pages, |
terminal block i2 213B 204D datasheet abstract |
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| Abstract: Outline Drawing .190 REF Maximum Ratings SIG .030 DIA 9010-51 I2 Input Power +13 dBm Max Temperature Range Q2 I1 Q1 .20 TYP 0°C to 85°C .400 MAX .80 SQ Block , 107G 204D 208F AA A Terminal Strength Terminal Fatigue Mechanical Shock 211A 211A 213B A C C 7 SIG Condition REF 10 0° 12 I2 1 I1 Case is Signal Ground , 4 3 2 1 I2 GROUND Glass bead on Pin 1 a different color All characteristics of ... | Original |
1 pages, |
213B 204D datasheet abstract |
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| Abstract: ) 1.5:1 Max I1 REF Q1 Input Level Angular Accuracy� Q2 SIG REF Amplitude Balance I2 , ARC TAN (SIN/COS) I2 REF I1 .070 .100 typ .020 typ .015 .770 .250 All unused pins must be connected to signal ground Maximum Ratings Input Power +17 dBm Max Block , Temperature Cycle Thermal Cycle Seal Vibration Solderability Terminal Strength Terminal Fatigue , I2 COS I1 Footprint .100 typ .650 .100 typ .100 typ A C C .040 typ ... | Original |
1 pages, |
213B 204D datasheet abstract |
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| Abstract: REF SIN & COS Outputs I2 GROUND Conversion Loss SSB Mixer Outline Drawing 10 dB Max , Min I2 REF 5xI/Q 55 dBc Min Note: All Specifications apply in a 50 Ohm system at specified , Input Current Q2 SIN Q1 40 mA Max Temperature Range Block Diagram 0°C to 85°C -90° , 112E A AA D Vibration Solderability Terminal Strength Terminal Fatigue Mechanical Shock , I2 COS I1 Footprint .100 typ .650 .100 typ .100 typ A C C All ... | Original |
1 pages, |
213B 204D datasheet abstract |
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| Abstract: the partitions on the W terminal block insulating body. Be careful to not cut out the jumpered terminal blocks partitions at both ends of the assembly in order to maintain the IP20, Nema1 protection , JB26 Jumper Bars Terminal Blocks Accessories Catalogue Page 1SNK 160 034 S0201 S0201 Features , +104 F Ex e 630 V Not authorized 8000 V JB85 Cross Spacing Jumpers Terminal Blocks , Allows power distribution between 8 mm 0.315 in and 5.2 mm 0.205 in spacing feed-through terminal blocks. ... | Original |
1 pages, |
S0201 JB26-2 datasheet abstract |
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| Abstract: (surface finishing:nickel plating) t=1.0 � Case : PBT � Dimensions in mm � Terminal block screw tighting , block screw tighting torque M4:1.6N-m (16.9kgf-cm) max DIN rail 7 15 Input Terminal 6-M4 Terminal , Single Phase 250 VAC Selectable leakage current Quick and easy push-down terminal. Just connect the wires , Options D :DIN rail installation type The terminal cover is retracted inside the unit DIN rail , VAC - Quick and easy push-down terminal Just connect the wires, push down and tighten the screws with ... | Original |
3 pages, |
NAC-20-472 UL1283 EN133200 VDE0565 NAC-06-472 NAC-10-472 NAC-16-472 NAC-30-472 NAC-04-472 UL1283 abstract |
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| Abstract: � Case : PBT � Dimensions in mm � Terminal block screw tighting torque M4:1.6N-m (16.9kgf-cm) max , : PBT (9) � Dimensions in mm 7 � Terminal block screw tighting torque M4:1.6N-m (16.9kgf-cm , characteristic is different. 4Options D :DIN rail installation type The terminal cover is retracted inside , 150kHz to 1MHz - Single Phase 250 VAC - Quick and easy push-down terminal Just connect the wires , CY : Line to ground capacitor I-2 : Mounting Plate -30 -20 40 50 55 60 Ambient ... | Original |
2 pages, |
NAC-30-472 NAC-16-472 NAC-10-472 NAC-06-472 NAC-04-472 earth leakage diagram 100MW NAC-20-472 datasheet abstract |
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| Abstract: function By connecting SO terminal, it is able to select functions as below: 1) Boot up and stop operation according to AC input or output (shortcircuit SO teminal to VDD terminal) 2) Signal output form SO terminal when AC input is low and transmit to the secondary side (connect an external element to SO terminal) Built-in jitter function Power consumption 30 mW or less at a no load is achieved , : November 2010 Ver. AEF 1 MIP2M40MS MIP2M40MS Block Diagram 2 Ver. AEF MIP2M40MS MIP2M40MS Electrical ... | Original |
8 pages, |
V6 marking code diode MARKING CODE V4 MARKING CODE V6 marking i2 marking V6 MIP2 diode Marking code v3 MIP55 MIP803 V3 marking code marking code V3 V4 MARKING MIP2M40 MIP2M40MS MIP2M40MS abstract |
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| Abstract: .250 .800 Temperature Range -20°C to 70°C SIG REF 7 10 I2 GROUND Reliability All unused pins must be connected to signal ground Block Diagram 12 2,3,6,8,9,11 SIN Q2 All , Vibration Solderability Terminal Strength Terminal Fatigue Mechanical Shock 204D 208F 211A 211A , 0° I2 COS I1 Footprint .190 typ 1 2 3 4 5 6 .930 7 8 9 10 11 12 .060 typ ... | Original |
1 pages, |
213B 204D datasheet abstract |
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| Abstract: function connecting SO terminal, it is able to select functions as below: By 1) Boot up and stop operation according to AC input or output (shortcircuit SO teminal to VDD terminal) 2) Signal output form SO terminal when AC input is low and transmit to the secondary side (connect an external element to SO terminal) Built-in jitter function Power consumption 30 mW or less at a no load is achieved , : November 2010 Ver. AEF 1 MIP2M20MS MIP2M20MS Block Diagram 2 Ver. AEF MIP2M20MS MIP2M20MS Electrical ... | Original |
8 pages, |
V4 MARKING MIP55 mip2 marking V6 MARKING CODE V6 mip2*2 MIP9L mip2m2 MIP2M20MS MIP2M20MS abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| C entry file - for NXP LPC23xx/24xx Family Microprocessors * I2S card header file */ #include "./i2s/inc/i2s.h" #include "./L3/inc/l3.h" #include "./inc/i2s board with * an attached I2S Audio demo board. The daughter board * includes a UDA1341 UDA1341 UDA1341 UDA1341 Audio Chip data interface using I2S * * The L3 interface uses GPIO and timer0. Timer0 captures the * the . * (NOTE: Timer0 is also used as the word clock signal (WS or LRCK depending on literature) * for the I2S www.datasheetarchive.com/download/58398878-595975ZC/i2s.usb.audio.demo.zip (main.c) |
NXP | 23/10/2007 | 8019.41 Kb | ZIP | i2s.usb.audio.demo.zip |
| and Control Voltage Regulator with I 2 C Interface for Advanced Satellite Set-top Box Designs and a low-noise linear regulator, along with the circuitry required for I 2 C device interfacing and ) through the I 2 C bus. Additionally, to compensate for the voltage drop in the coaxial cable, the voltage I 2 C bus provides standby mode control for the PWM and linear combination, disabling the output to are 2.5V logic compatible I 2 C Compatible Interface for Remote Device Control Registered Slave www.datasheetarchive.com/files/intersil/device_pages/device_isl6425.html |
Intersil | 08/09/2006 | 24.59 Kb | HTML | device_isl6425.html |
| and Control Voltage Regulator with I 2 C Interface for Advanced Satellite Set-top Box Designs and a low-noise linear regulator, along with the circuitry required for I 2 C device interfacing and ) through the I 2 C bus. Additionally, to compensate for the voltage drop in the coaxial cable, the voltage I 2 C bus provides standby mode control for the PWM and linear combination, disabling the output to Digital Cable Length Compensation (1V) External Pin to Select 13V/18V Options I 2 C Compatible www.datasheetarchive.com/files/intersil/device_pages/device_isl6421.html |
Intersil | 08/09/2006 | 24.54 Kb | HTML | device_isl6421.html |
| 400kHz I2C INT 20.04.01 1.1 MEN V30L26 V30L26 V30L26 V30L26 using I2C interface 26.10.01 1.2 tka totally revised = Description : This sample project uses the I2C (400kHz) interface of the MB91F362 MB91F362 MB91F362 MB91F362. The MCU is communicating , Interrupts are used to control the I2C communication. NOTE: Make sure that the SCK and SDA pins are , on the MB91F362 MB91F362 MB91F362 MB91F362 two I2C Macros are available! These have different register sets!!!!!!! In order to www.datasheetarchive.com/download/84980791-119105ZC/91362_i2c_400khz_irq-v21.zip (readme.txt) |
Fujitsu | 01/02/2012 | 120.14 Kb | ZIP | 91362_i2c_400khz_irq-v21.zip |
| I2C version 20.04.01 1.0 MEN V30L26 V30L26 V30L26 V30L26 using I2C interface 26.10.01 1.1 tka totally : This sample project uses the I2C (100kHz) interface of the MB91F362 MB91F362 MB91F362 MB91F362. The MCU is communicating with an I2C communication. NOTE: Make sure that the SCK and SDA pins are connected witha pull-up resistor (e.g. 10K) otherwise no transmission/reception is possble! Take care, on the MB91F362 MB91F362 MB91F362 MB91F362 two I2C www.datasheetarchive.com/download/92777258-119103ZC/91362_i2c_100khz_irq-v13.zip (readme.txt) |
Fujitsu | 01/02/2012 | 98.69 Kb | ZIP | 91362_i2c_100khz_irq-v13.zip |
| Type I 2 C Resistance Options (kΩ) 10, 50 V CC Range (V) 2.7 to 5.5 DCP Differential Terminal Voltage elements and CMOS switches. The position of the wipers are controlled by the user through the I 2 C bus one package 256 resistor taps - 0.4% resolution I 2 C serial interface Three address pins, up to Datasheet(s): Low Noise, Low Power, I 2 C Bus, 256 Taps Technical Brief(s): Converting a Fixed PWM to Digital Controlled Potentiometers (XDCP); Low Noise, Low Power, I 2 C® Bus, 256 Taps Contact Us www.datasheetarchive.com/files/intersil/device_pages/device_isl90840.html |
Intersil | 08/09/2006 | 24.2 Kb | HTML | device_isl90840.html |
| Supply and Control Voltage Regulator with I 2 C Interface for Advanced Satellite Set-top Box Designs , along with the circuitry required for I 2 C device interfacing and for providing DiSEqC standard be set to either 13V or 18V by use of the voltage select command bit (VSEL) through the I 2 C bus dissipation I 2 C Compatible Interface for Remote Device Control Registered Slave Address 0001 00XX Protection and Diagnostics Internal Overload and Over Temperature Flags (Visible on I 2 C) Output Back www.datasheetarchive.com/files/intersil/device_pages/device_isl6421a.html |
Intersil | 07/09/2006 | 24.88 Kb | HTML | device_isl6421a.html |
| = I2C : This sample project uses the I2C ch.0 interface of the MB90550A MB90550A MB90550A MB90550A series. The MCU is communicating with control the I2C communication. 2 Variables are used inside the ISR: - to check if Write or Read data to/from slave - counting the interrupts to be able to perform correct I2C protocol. NOTE: Make precaution done to ensure the timing between subsequent access cycles to the I2C bus. To ensure proper www.datasheetarchive.com/download/73349237-118888ZC/90550_i2c_irq-v10.zip (readme.txt) |
Fujitsu | 01/02/2012 | 45.68 Kb | ZIP | 90550_i2c_irq-v10.zip |
| Potentionmeters (XDCP); Low Noise/Low Power/I 2 C® Bus/256 Taps Datasheet & Related Docs Description Key . Status Temp. Package MSL Price US $ X95840UV20I-2.7 Active Ind 20 Ld TSSOP 1 2.86 X95840UV20I-2.7T1 Active Ind 20 Ld TSSOP T+R 1 2.86 X95840UV20IZ-2 X95840UV20IZ-2 X95840UV20IZ-2 X95840UV20IZ-2 +R 3 2.86 X95840WV20I-2.7 Active Ind 20 Ld TSSOP 1 2.86 X95840WV20I-2.7T1 Active N/A 91.77 X95840WP20I-2.7 To Be Discontinued Ind 20 Ld TSSOP N/A 2 www.datasheetarchive.com/files/intersil/device_pages/device_x95840.html |
Intersil | 08/09/2006 | 30.95 Kb | HTML | device_x95840.html |
| and CMOS switches. The position of the wipers are controlled by the user through the I 2 C bus taps I 2 C serial interface Two address pins, up to four devices/bus Non-volatile storage of anneal product (RoHS compliant) Related Documentation Datasheet(s): Low Noise, Low Power I 2 C® Bus Single Number of Taps 128 Memory Type Non-Volatile Bus Interface Type I 2 C Resistance Options (kΩ) 10 Potentiometer (XDCP) Low Noise, Low Power, I 2 C® Bus, 128 Taps, Wiper Only ISL22416 ISL22416 ISL22416 ISL22416 Low Noise, Low Power www.datasheetarchive.com/files/intersil/device_pages/device_isl22316.html |
Intersil | 07/09/2006 | 27.94 Kb | HTML | device_isl22316.html |