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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: slave devices. The signals need to be attached to the SPI bus are VCC, MISO, MOSI, SCLK, GND. The four chip selects (SSO, SS1, SS2, SS3) need to be connected to the SPI slave devices so one chip select is for one SPI slave device. Thus, up to four SPI slave devices can be connected to the SC18IS602/603 SC18IS602/603 o If the four chip-selects are not used to select the SPI slave devices. They can be used for , capability and multiple SPI slave devices · · · The host with I2C master interface capability sends ... | Original |
2 pages, |
SC18IS602 i2c and spi communication program SC18IS602/603 SC18IS603 SC18IS602/603 abstract |
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| Abstract: AN10428 AN10428 UART-SPI Gateway for Philips SPI slave bridges Rev. 01 - 7 March 2006 Application , , the users will be able to control the SPI slave device remotely from the PC. The usage of the , Bridge ICs: SC16IS740/750/760/752/762 SC16IS740/750/760/752/762 (SPI slave to high-speed UART(s); and SC18IS600/601 SC18IS600/601 (SPI slave to I2C-bus controller). AN10428 AN10428 Philips Semiconductors UART-SPI gateway for Philips SPI slave , Philips SPI slave bridges 1. Introduction The Serial Peripheral Interface (SPI) offers easy interface ... | Original |
8 pages, |
cable gateway reference design UART-SPI gateway Philips slave bridges spi slave SC16IS740 AN10428 software uart SC16IS740 SPI to RS232 UART abstract RS-232 SC16IS740/750/760/752/762 SC18IS600/601 AN10428 abstract |
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| Abstract: date 29th July 2010 The SPI Slave interface of the Revision A silicon was non-functional. The SPI Slave interface has been modified and is now functional. Update to part numbers for clarity. The , silicon had a functional issue with the SPI slave interface. All other interfaces of Revision A were ... | Original |
1 pages, |
VNC2-64Q1B VNC2-32L1B vnc2-32Q1B VNC2-48L1B VNC2 datasheet abstract |
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| Abstract: SPI SLAVE 3 2 Bit SPI 2 NVM Bridge 1 6 Bit eNVM M IS O PLL C LOC K RC-OSC , Devices Design Example The block diagram (Figure 1) shows an SPI Slave, SPI 2 NVM bridge, and eNVM , compliant with Verilog 2001: Spi_s.v This is the 32-bit SPI slave. Spi_Nvm_Bridge This is the 32-bit , Description Once slave select is asserted, the SPI slave monitors the serial line MOSI input signal for , supported commands is described below: · · FAST_READ: When this command is received and SPI slave is ... | Original |
7 pages, |
AC270 AC270 abstract |
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| Abstract: SPI SLAVE 3 2 Bit SPI 2 NVM Bridge 1 6 Bit eNVM M IS O PLL C LOC K RC-OSC Figure 1 · Block Diagram The block diagram (Figure 1) shows an SPI Slave, SPI 2 NVM bridge, and eNVM , : Spi_s.v This is the 32-bit SPI slave. Spi_Nvm_Bridge_32bit.v This is the 32-bit SPI to 32-bit eNVM , Functional Description Once slave select is asserted, the SPI slave monitors the serial line MOSI input , RCD_DATA. The SPI slave asserts the RCD_DATA_VALID signal to indicate to SPI2NVM bridge that it has valid ... | Original |
9 pages, |
AC270 AC270 abstract |
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| Abstract: I2C Slave to SPI Master Bridge June 2010 Reference Design RD1094 RD1094 Introduction I2C and SPI , reduce development time and cost. This reference design implements an I2C slave to SPI master bridge. It , microcontroller to communicate directly with the SPI bus through its I2C bus. Features The I2C Slave to SPI , 7-bit I2C slave addressing mode · 128-byte data buffer · SPI master interface supporting SPI clocking modes 0, 1, 2, 3 · Configurable SPI serial clock (SCLK) frequency · Up to five SPI slave select ... | Original |
7 pages, |
LCMXO1200C-3T100C spi slave RD1094 RD1094 abstract |
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| Abstract: SPI Interface - Transmission on Master Mode SPI Interface - SPI SS pin Limitation on Master/Slave SPI - SPI Slave Responding in a Multislave Configuration When Not Selected by the Master and its SPDAT Register Loaded SPI - SPI Slave Not Responding When Selected and Not Loaded ALE Disabled Toggles , Rate Generator - Long Start Time SPI Slave Mode/Data Corrupted 32 kHz Oscillator for AT83C51IC2 AT83C51IC2 , divide by 4 and X2 mode. 3. SPI Interface - SPI SS pin Limitation on Master/Slave The SS pin of the SPI ... | Original |
4 pages, |
atmel 8051 datasheet AT83C51RC2 AT83C51RB2 AT80C51RD2 80C51 spi slave AT80C51ID2 AT83C51IC2/T80C51ID2 AT83C51IC2 AT83C51IC2/T80C51ID2 abstract |
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| Abstract: SPI Interface - Transmission on Master Mode SPI Interface - SPI SS pin Limitation on Master/Slave SPI - SPI Slave Responding in a Multislave Configuration When Not Selected by the Master and its SPDAT Register Loaded SPI - SPI Slave Not Responding When Selected and Not Loaded ALE Disabled Toggles , Rate Generator - Long Start Time SPI Slave Mode/Data Corrupted 32 kHz Oscillator for AT83C51IC2 AT83C51IC2 , by 4 and X2 mode. 3. SPI Interface - SPI SS pin Limitation on Master/Slave The SS pin of the SPI ... | Original |
4 pages, |
AT83C51IC2/T80C51ID2 80C51 AT83C51RB2 AT83C51RC2 AT83C51IC2 AT80C51ID2 AT83C51IC2/T80C51ID2 abstract |
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| Abstract: Generate Unexpected IT Internal Resistor on Reset Pin SPI SPI SS Pin Limitation on Master/Slave SPI SPI Slave Responding in a Multislave Configuration When Not Selected by the Master and its SPDAT Register is Loaded SPI SPI Slave Does Not Respond When Selected and Not Loaded ALE Disabled Toggles , Rate Generator Long Start Time EEPROM Read After Write SPI Slave Mode/Data Corrupted Errata , None. 3. SPI SPIi SS Pin Limitation on Master/Slave The SS pin of the SPI does not got back to I/O ... | Original |
3 pages, |
T89C51RC2 T89C51RB2 80C51 80C51 abstract |
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| Abstract: Resistor on Reset Pin · SPI Interface - SPIi SS Pin Limitation on Master/Slave · SPI SPI , is Loaded · SPI - SPI Slave not responding when Selected and not Loaded · ALE Disabled , pin: 20 k Problem Fix/Workaround None. 9. SPI interface SPIi SS pin Limitation on Master/Slave The SS pin of the SPI does not got back to I/O when a One-to-One Master/Slave intercommunication is performed. Problem Fix/Workaround None. 8. SPI SPI Slave Responding in a Multislave Configuration ... | Original |
3 pages, |
T89C51RC2 T89C51RB2 Atmel 8051 Microcontrollers 80C51 8051 spi eeprom 8051 40 pin datasheet atmel 8051 datasheet datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| $WS_DIR$\spi_slave.ewp www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (spi_slave.eww) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| , used for communicating with SPI slave devices * * The default format is set to 8-bits, mode 0, and . These * can be controlled using pins * * Example: * > // Send a byte to a SPI slave the specified pins * * Variables: * mosi - SPI Master Out, Slave In pin * miso - SPI Master In, Slave Out pin * sclk - SPI Clock pin * name - (optional) A string frequency(int hz = 1000000); /* Function: write * Write to the SPI Slave and return the www.datasheetarchive.com/download/77213371-30006ZC/apnt207.zip (SPI.h) |
ARM | 01/04/2010 | 597.72 Kb | ZIP | apnt207.zip |
| Table Offset Register } LOAD RAM\spi_slave.axf INCREMENTAL // Download Setup www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (RAM.ini) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| . */ @Example description: Purpose: This example describes how to use SPI as slave to connect with SPI - MSTR = 1: SPI operates in Slave mode After initialize buffer, SPI slave will wait to receive example makefile: Example's makefile (to build with GNU toolchain) spi_slave.c: Main program @How SPI connection: - P0.15 - SCK on slave connects to P0.15 - SCK on master board; - P0 : Build "Slave\spi_slave" example - Step 4: Burn this hex file into master board. - Step 5: Connect www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (abstract.txt) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| 140 Demo - USART0 SPI 3-Wire SPI Slave // // Description: SPI slave talks to SPI master using 3 + WDTHOLD; // Stop WDT P3SEL = 0x0E; // Setup P3 for SPI mode U0CTL = CHAR + SYNC + SWRST; // 8-bit, SPI, Slave U0TCTL = CKPL + STC ; // SPI enable IE1 |= URXIE0; // Recieve interrupt enable _EINT =USART0RX_VECTOR _interrupt void SPI0_rx (void) { while (IFG1 & UTXIFG0) = 0); // USART0 www.datasheetarchive.com/download/14722950-922170ZC/slac015.zip (fet140_spi0_slav.c) |
Texas Instruments | 24/01/2005 | 138.42 Kb | ZIP | slac015.zip |
| 0 0 0 1 .\Flash\ spi_slave spi_slave.c 1 .\spi_slave \ spi_slave 1 0 0 1 1 .\RAM \source\debug_frmwrk.c Main spi_slave.c 1 .\spi_slave > www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (spi_slave.uvproj) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| . ######################################################################## EXECNAME =spi_slave EXDIR =SPI www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (makefile) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| /* * $Id$ spi_slave.c 2010-05-21 *//* * @file spi_slave.c * @brief This example describes how to use SPI in slave mode - */ /* @defgroup SPI_slave slave * @ingroup SPI_Examples * @{ */ /* PRIVATE mode to test the SPI driver \n\r" " This example uses SPI in slave mode to communicate with SPI slave _ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST; SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE; SPI_ConfigStruct.Mode = SPI_SLAVE www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (spi_slave.c) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| 120 Demo - USART0, SPI 3-Wire Slave // // Description: SPI slave talks to SPI master using 3-wire + WDTHOLD; // Stop WDT P3SEL = 0x0E; // Setup P3 for SPI mode U0CTL = CHAR + SYNC + SWRST; // 8-bit, SPI, Slave U0TCTL = CKPL + STC handle communication, CPU normally in LPM4. // Prior to inital data exchange, master pulses slaves RST ; // SPI enable IE2 |= URXIE0; // Receive interrupt enable _EINT www.datasheetarchive.com/download/11441619-851924ZC/slac067a.zip (fet120_spi0_slav.c) |
Texas Instruments | 26/08/2008 | 70.64 Kb | ZIP | slac067a.zip |
| 120 Demo - USART0, SPI 3-Wire Slave // // Description: SPI slave talks to SPI master using 3-wire + WDTHOLD; // Stop WDT P3SEL = 0x0E; // Setup P3 for SPI mode U0CTL = CHAR + SYNC + SWRST; // 8-bit, SPI, Slave U0TCTL = CKPL + STC handle communication, CPU normally in LPM4. // Prior to inital data exchange, master pulses slaves RST ; // SPI enable IE2 |= URXIE0; // Receive interrupt enable _EINT www.datasheetarchive.com/download/98933666-851198ZC/slac164.zip (fet120_spi0_slav.c) |
Texas Instruments | 26/08/2008 | 595.22 Kb | ZIP | slac164.zip |