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ISL95810WIRT8ZR5481 Intersil Corporation ISL95810W PRE-PROGRAMMED TO LOWEST RESISTANCE SETTING, XDCP, visit Intersil
HI5714/6CB Intersil Corporation 1-CH 8-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO24 visit Intersil
HI5714/7CB Intersil Corporation 1-CH 8-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO24 visit Intersil
HI5714/8CB-T Intersil Corporation 1-CH 8-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO24 visit Intersil
HI5714/4CB-T Intersil Corporation 1-CH 8-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO24 visit Intersil
ISL43L712IRZ-T Intersil Corporation Ultra Low ON-Resistance, Single Supply, Differential SPST Analog Switches; DFN8; Temp Range: -40° to 85°C visit Intersil Buy

sot23-8 thermal resistance

Catalog Datasheet MFG & Type PDF Document Tags

mark EA SOT23-5

Abstract: rca sot23-5 -10 113.1 SOIC-8 163.0 SOT223 57.3 DPAK-3 59.2 Table 2 shows the thermal resistance , ) 152.0 DATA SUMMARY The thermal resistance data is summarized in Table 8. Data for the 2 , Thermal Conductivity Standard. The MSOP-8 thermal resistance for this particular application is lower by , -Layer data, the SOT23-5 has a lower thermal resistance than the MSOP-8 by approximately 15%. For this case , higher than the MSOP-8. The thermal resistance for Junction-to-Case shown in the right hand column is a
Microchip Technology
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JEDEC JESD51-8

Abstract: tps73615drb characterization parameter (8) 17.8 30.1 N/A qJCbot Junction-to-case (bottom) thermal resistance (9 , TPS736xx (3) THERMAL METRIC (1) (2) DRB Junction-to-ambient thermal resistance (4) qJA (5 , ) thermal resistance 83 70 qJB Junction-to-board thermal resistance (6) N/A N/A 35 , , see the Power Dissipation section of this data sheet. The junction-to-ambient thermal resistance , JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is
Texas Instruments
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SBVS038T JEDEC JESD51-8 tps73615drb G30-88 TPS73601 TPS73633 TPS736
Abstract: 180 64 35 N/A N/A N/A UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8) (9) For more information about traditional and new thermal metrics, see the IC , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard Texas Instruments
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ZTX653 equivalent

Abstract: ZTX753 equivalent thermal resistance within minimal footprints and it's easy to see why bipolars can also outperform , MOSFETs 29 Package outlines 38 Thermal data 42 Article: Applications dictate bipolar or , Bipolar transistors MOSFETs Package outlines Thermal data Article Alpha numeric index , product data 8 10 20 21 21 22 22 23 Devices from 60 to 100V NPN transistors 12 PNP , Thermal data Multichip devices that combine transistors and Schottky diodes within leadless QFN
Zetex Semiconductors
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ZTX653 equivalent ZTX753 equivalent fzt651 ztx1056A ZDT1049 ztx651 equivalent D-81541 2002/95/EC

DR-B 2003

Abstract: 180 64 35 N/A N/A N/A UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8) (9) For more information about traditional and new thermal metrics, see the IC , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard
Texas Instruments
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DR-B 2003
Abstract: DRB Junction-to-ambient thermal resistance (4) DCQ DBV 8 PINS 6 PINS 5 PINS 47.8 70.4 180 64 qJCtop Junction-to-case (top) thermal resistance 83 70 qJB Junction-to-board thermal resistance (6) N/A N/A 35 yJT Junction-to-top characterization parameter (7 , qJCbot Junction-to-case (bottom) thermal resistance (9) 12.1 6.3 UNITS N/A (1) (2) (3 , Power Dissipation section of this data sheet. The junction-to-ambient thermal resistance under natural Texas Instruments
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ISO/TS16949

eup7907

Abstract: sot23-5 mosfet driver -260 Thermal Resistance JA (SOT23-5) -220/W 60/W Thermal Resistance JA (TDFN-8 , standard thermal test board. For TDFN-8 package, the thermal resistance JA is 60°C/W on the standard , protection, thermal shutdown. The device can be available in the TDFN-8 package or SOT23-5 package. 2.5V , maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of
EUTECH Microelectronics
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DS7907 eup7907 sot23-5 mosfet driver OCT SOT23-5 sot23-5 thermal resistance EUP7907-12VIR1 EUP7907

DR-B 2003

Abstract: drb 2003 180 64 35 N/A N/A N/A UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8) (9) For more information about traditional and new thermal metrics, see the IC , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard
Texas Instruments
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drb 2003 DR-B 2003 POWER SUPPLY

Marking L2 Packaging SOT23-5

Abstract: DFN PACKAGE thermal resistance ).-40°C to +125°C Thermal Resistance, SOT-23-5 ( 1 Thermal Resistance, SOT-23-6 ( 1 Remark: The device is , 25 0.4 %/W µs µs µs V V Thermal Regulation, Note 7 Wake-Up Time (TWU), Note 8 (from shutdown mode , junction-to-ambient thermal resistance. JC is 6°C/W for this package. Exceeding the maximum allowable power , junction-to-ambient thermal resistance for the regulator and is layout dependent. The SOT-23-5 package has a JA of
Sipex
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SP6203 Marking L2 Packaging SOT23-5 DFN PACKAGE thermal resistance SIPEX Marking jedec MO229 dfn-8 SP6203/6205 SP6205 SP6205ER-ADJ/TR SP6205ER-L-ADJ/TR

ADT6502SRJZP115RL7

Abstract: 6c sot-23 . ADT6502 Output Source Resistance vs. Temperature 120 Figure 8. Output Sink Resistance vs. Temperature , commonly specified using the symbol Q and can be thought of as thermal resistance. It is commonly specified , recommended that the thermal resistance between the ADT6501/ADT6502 GND pins and the GND of the heat source be , temperature. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 6. 7. 8. 9. - based temperature measurement gives high , . 8 Circuit class="hl">8
Analog Devices
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ADT6501 ADT6502SRJZP115RL7 6c sot-23 BRANDING D06096-0-9/07
Abstract: UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8 , INFORMATION TPS732xx (3) THERMAL METRIC qJA qJCtop qJB yJT yJB qJCbot (1) (2) (3) (1) (2) DRB 8 PINS 47.8 , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard Texas Instruments
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TPS732 SBVS037O

DR-B 2003

Abstract: drb 2003 180 64 35 N/A N/A N/A UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8) (9) For more information about traditional and new thermal metrics, see the IC , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard
Texas Instruments
Original
voltage regulator 78 series

G30-88

Abstract: JESD51-7 characterization parameter (8) 17.8 30.1 N/A qJCbot Junction-to-case (bottom) thermal resistance (9 , TPS732xx (3) THERMAL METRIC (1) (2) DRB Junction-to-ambient thermal resistance (4) qJA (5 , ) thermal resistance 83 70 qJB Junction-to-board thermal resistance (6) N/A N/A 35 , , see the Power Dissipation section of this data sheet. The junction-to-ambient thermal resistance , JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is
Texas Instruments
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TPS73201 TPS73233

ADT6501

Abstract: ADT6502 . Trip Threshold Accuracy Figure 8. Output Sink Resistance vs. Temperature 45 120 40 5V , of as thermal resistance. It is commonly specified in units of degrees per watt of power , in amplitude due to wiring resistance and inductance. 06096-010 THERMAL RESPONSE TIME , . Therefore, to monitor the temperature of a heat source, it is recommended that the thermal resistance , . Pin-selectable temperature hysteresis of 2°C or 10°C. 8. Temperature resolution of 0.0625°C. Rev. PrB
Analog Devices
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ADT6503 ADT6504 ADT6501/ADT6503 ADT6502/ADT6504 ADT6501/ADT6502/ADT6503/ADT6504 ADT6504SRJZN045RL71 ADT6504SRJZN035RL71 ADT6504SRJZN025RL71
Abstract: UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8 , INFORMATION TPS732xx (3) THERMAL METRIC qJA qJCtop qJB yJT yJB qJCbot (1) (2) (3) (1) (2) DRB 8 PINS 47.8 , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard Texas Instruments
Original
Abstract: UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8 , INFORMATION TPS732xx (3) THERMAL METRIC qJA qJCtop qJB yJT yJB qJCbot (1) (2) (3) (1) (2) DRB 8 PINS 47.8 , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard Texas Instruments
Original

SP6203

Abstract: SP6205AER Junction Temperature (TJ) . -40°C to +125°C Thermal Resistance, SOT-23-5 (JA) . Note 1 Thermal Resistance, 8 Pin DFN (JA , Thermal Regulation, Note 7 Wake-Up Time (TWU), Note 8 (from shutdown mode) Turn-On Time (TON), Note 9 , ambient temperature and JA is the junction-to-ambient thermal resistance. JC is 6ºC/W for this package , thermal resistance for the regulator and is layout dependent. The SOT-23-5 package has a JA of
Sipex
Original
SP6205AER A1 SOT-23 MOSFET P-CHANNEL FOOTPRINT MO-229 2X3 SOLDERING SP6203/SP6203A/SP6205/SP6205A SP6203A SP6205A SP6205ER-3 SP6205ER

PS73201

Abstract: Marking PJEQ SOT23-5 ) thermal resistance (9) 12.1 6.3 UNITS N/A (1) (2) (3) (4) (5) (6) (7) (8) (9 , resistance (4) qJA (5) DCQ DBV 8 PINS 6 PINS 5 PINS 47.8 70.4 180 64 qJCtop Junction-to-case (top) thermal resistance 83 70 qJB Junction-to-board thermal resistance (6) N/A , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard , (top) thermal resistance is obtained by simulating a cold plate test on the top of the package. No
Texas Instruments
Original
PS73201 Marking PJEQ SOT23-5

DR-B 2003

Abstract: 180 64 35 N/A N/A N/A UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8) (9) For more information about traditional and new thermal metrics, see the IC , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard
Texas Instruments
Original
Abstract: UNITS Junction-to-ambient thermal resistance (4) Junction-to-case (top) thermal resistance Junction-to-board thermal resistance (6) Junction-to-top characterization parameter (7) Junction-to-board characterization parameter (8) Junction-to-case (bottom) thermal resistance (9) (5) °C/W (4) (5) (6) (7) (8 , INFORMATION TPS732xx (3) THERMAL METRIC qJA qJCtop qJB yJT yJB qJCbot (1) (2) (3) (1) (2) DRB 8 PINS 47.8 , junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard Texas Instruments
Original
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