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Single DVI-D ADD2 Card Congatec Modules Accessories ADD2 DISPLAY ADAPTER CARD WITH SNGL DVI-D (Aug 2016) Mouser Electronics Buy
SINGLE ENDED MULTIPLEXER INTERSIL REEL / ORG PKG 1,290 (Sep 2016) New Advantage Buy
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SINGLEPHSPOL-RD Silicon Laboratories Single Phase Pol Reference Design Demonstrates The SI8252 (Alt: SINGLEPHSPOL-RD) from €157.3510 (Aug 2016) Avnet Buy
SINGLEPHSPOL-RD Silicon Laboratories Power Management IC Development Tools Si825x Single POL REF DESIGN (Aug 2016) Mouser Electronics Buy

single phase to three phase conversion ic

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: discussed later on. To establish a three phase motor control, three branches on similar lines to those in , single driver IC for every switch to be controlled. Obviously, a reduction in the number of discrete , conversion systems. Inexpensive 1um high voltage CMOS technology was used in order to keep costs down. It , drivers are concerned, it is straightforward to integrate all low side drivers into a single silicon die , driver IC To communicate with the controlling primary side (signals of amplitude Vcc respective to ... SEMIKRON
Original
datasheet

6 pages,
256.78 Kb

HCPL-316J 5A IGBT driver IC igbt driver ic for three phase inverter IGBT full bridge high side IGBT driver optocoupler HCPL316 3 phase inverter ic PWM microcontroller inverter ic number IGBT DRIVER with PWM output SEMIKRON controller for PWM with IGBT 3 phase IGBT gate driver 3 phase rectifier circuit diagram igbt D-90431 D-98684 full bridge inverter D-90431 D-98684 IGBT driver IC with PWM output SEMIKRON D-90431 D-98684 IGBT DRIVER Analog Devices D-90431 D-98684 single phase inverter IGBT driver D-90431 D-98684 HP 316J D-90431 D-98684 D-90431 D-90431 D-98684 D-98684 TEXT
datasheet frame
Abstract: of Application with Three Independent Outputs. Intermediate Bus Voltage is from 8V to 14V. In this application four POL converters are configured to deliver three independent output voltages. POL1 and POL2 are , INTL0.INTL4 pins. If the pin is pulled low, the phase lag is set to 0°. Pulling all INTL pins and the IM pin , of the controller IC. Voltage range from 0 to 2V corresponds to the temperature range from -50°C to , pin is left floating. One digit of the address corresponds to the phase lag of 11.25°. Note: Due to ... Power-One
Original
datasheet

17 pages,
558.76 Kb

ZY1115 TEXT
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Abstract: are used by the I & Q multipliers. The VCO is frequency and phase locked to the 4x pilot frequency , section. The switching sig nals are in quadrature and phase locked to a small pilot present in the IF , the voltage on the CAGC pin. Ground line for backend. Also the substrate connection to the IC. Should be at the lowest potential to the IC. Ground line for digital section. Shield ground for input , Description Offset adjust input pin effectively corrects quadrature phase error. A 20KQ variable resistor to ... OCR Scan
datasheet

12 pages,
702.14 Kb

kvg crystal FILTER RC6516 TEXT
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Abstract: Pulse I/O processing capability for up to 16 pins' Automatic 2-phase encoder count capability Two O , : 8 channels High-speed conversion : 6.7 ps minimum conversion time (at 20 M Hz operation) Single or , may, wholly or partially, be subject to change without notice. 2. A ll rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi's permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents ... OCR Scan
datasheet

132 pages,
2972.69 Kb

RD8A H8 hitachi programming manual H8S/2355 TEXT
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Abstract: R51/R54 R51/R54 0 PHASE NEUTRAL In this configuration it is unnecessary to use a burden resistor. A , , Calibration, and Conversion. Each window provides a means to evaluate the different functions and performance , Comp Register section is used to make changes to, and display the contents of, the CS5484 CS5484's PC (Phase , the CS5484 CS5484. The register checksum updates automatically after single or continuous conversion has , Communication with PC UART/SPI Isolated Communication Onboard C8051F342 C8051F342 Microcontroller Single Supply ... Cirrus Logic
Original
datasheet

47 pages,
4534.62 Kb

CDB5484U TEXT
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Abstract: one common GM amplifier to sense two phase currents eliminates offset and nonlinearity of the GM , QV : VQFN-16L VQFN-16L 3x3 (V-Type) 2 Phase Power Conversion Embedded 12V Boot Strapped Driver Precise , - -0.3V to 16V PHASE to GND DC , - -10V to 30V BOOT to PHASE , single voltage feedback path including an error amplifier and PWM comparator. In order to achieve fast ... RichTek Technology
Original
datasheet

15 pages,
373.09 Kb

RT8805 REGULATOR IC 7915 REGULATOR IC 7905 IC 7915 ic 7905 dual mosfet marking EA 7905 regulator DS8805 7915 regulator pin configuration TEXT
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Abstract: ) . 9 Channel to Phase Mapping , : three current (RMS value)-based segments with two programmable thresholds for each phase. Independent , three voltage channels (phase A, B and C) and three current channels (phase A, B, C) in a typical , application. IC 9, 10, 36 LVTTL These pins should be always connected to DGND in system application. NC 35, 45 , HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC 3.4 ANALOG/DIGITAL CHANNEL MAPPING Analog channel to digital ... Atmel
Original
datasheet

80 pages,
704.29 Kb

90E32AS 220v to 5v transformer TEXT
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Abstract: Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction , result is stored back to the destination register. Figure 4-5. Single Cycle ALU Operation T1 T2 , normally a jump to the interrupt routine, and this jump takes three clock cycles. If an interrupt occurs , order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion results , · · · · · · · · ­ 120 Powerful Instructions ­ Most Single Clock Cycle Execution ... Atmel
Original
datasheet

258 pages,
5835.99 Kb

SP15 SP14 SP13 SP12 SP11 SP10 ATTINY24A-PU synchronous motor dimention TEXT
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Abstract: time without regard to conversion state (and will yield last conversion result). A conversion in , during the transmit phase. If CS is brought low in the middle of a conversion the LM74 will complete the conversion and the output shift register will be updated once CS is brought back high. The receive phase of , enables continuous conversion mode. Note: setting D0-D15 D0-D15 to any other values may place the LM74 into a , Timing Diagrams DS100909-14 DS100909-14 a) Reading Continuous Conversion - Single Eight-Bit Frame DS100909 DS100909 ... National Semiconductor
Original
datasheet

12 pages,
187.47 Kb

M08B LM74CIMX-5 LM74CIMX-3 LM74CIM-5 LM74CIM-3 lm743 LM74-5 LM74 d3-d15 TEXT
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Abstract: input stage enable the HI5630 HI5630 to accept a variety of single-ended or fully differential input configurations which present valid data to the output bus with a latency of 5 clock cycles. Only one external clock is necessary to drive all three converters with a clock out signal provided. An internal , INPUT Since the HI5630 HI5630 is powered by a single +5V analog supply, the analog input is limited to be , single ended source may give better overall system performance if it is first converted to differential ... Intersil
Original
datasheet

14 pages,
123.45 Kb

HI5630EVAL HI5630CN HI5630 80MSPS TEXT
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