NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: month, month, day of the week, and year with leap year compensation valid up to 2100 4 5 SDA , nA in battery backup mode 1 X2 4 5 SDA DS1307Z DS1307Z 8PIN SOIC (150 MIL) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT Primary Power Supply 32.768 , SDA SIGNAL DESCRIPTIONS VCC, GND DC power is provided to the device on these pins. VCC is the , is used to synchronize data movement on the serial interface. SDA (Serial Data Input/Output) SDA ... | Original |
11 pages, |
SDA 2023 DS1307ZN DS1307Z rtc ds1307 pin diagram rtc ds1307 DS1307N DS1307 DS1307 abstract |
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| Abstract: to 2100 4 5 SDA DS1307 DS1307 8PIN DIP (300 MIL) · Programmable squarewave output signal · , · Consumes less than 500 nA in battery backup mode 1 X2 4 5 SDA DS1307Z DS1307Z 8PIN SOIC (150 MIL) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT , SDA SIGNAL DESCRIPTIONS VCC, GND DC power is provided to the device on these pins. VCC is the , is used to synchronize data movement on the serial interface. SDA (Serial Data Input/Output) SDA ... | Original |
12 pages, |
1101000 CI ds1307 data sheet of ds1307 DS1307N DS1307Z DS1307ZN interfacing DS1307 DS1307 rtc ds1307 rtc ds1307 pin diagram datasheet abstract |
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| Abstract: month, month, day of the week, and year with leap year compensation valid up to 2100 4 5 SDA , nA in battery backup mode 1 X2 4 5 SDA DS1307Z DS1307Z 8PIN SOIC (150 MIL) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT Primary Power Supply 32.768 , SDA SIGNAL DESCRIPTIONS VCC, GND DC power is provided to the device on these pins. VCC is the , is used to synchronize data movement on the serial interface. SDA (Serial Data Input/Output) SDA ... | Original |
11 pages, |
sda 2023 b DS1307N DS1307Z DS1307ZN interfacing DS1307 ds1307 rtc ds1307 applications sda 2023 rtc ds1307 rtc ds1307 pin diagram DS1307 DS1307 abstract |
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| Abstract: month, month, day of the week, and year with leap year compensation 4 5 SDA DS1307 DS1307 8PIN , X2 4 5 SDA DS1307Z DS1307Z 8PIN SOIC (150 MIL) · Available in 8pin DIP or SOIC ORDERING , mil) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT Primary , SDA SIGNAL DESCRIPTIONS VCC, GND DC power is provided to the device on these pins. VCC is the , is used to synchronize data movement on the serial interface. SDA (Serial Data Input/Output) SDA ... | Original |
11 pages, |
DS1307Z DS1307 rtc ds1307 pin diagram rtc ds1307 applications DS1307 abstract |
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| Abstract: 4 5 SDA DS1307 DS1307 8-Pin DIP (300 mil) X1 l 8 VCC X2 VBAT 2 7 SQW/OUT 3 6 SCL GND 4 5 SDA DS1307Z DS1307Z 8-Pin SOIC (150 mil) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT - Primary Power Supply - 32.768 kHz Crystal Connection - +3V , SCL (Serial Clock Input) - SCL is used to synchronize data movement on the serial interface. SDA (Serial Data Input/Output) - SDA is the input/output pin for the 2-wire serial interface. The SDA pin is ... | Original |
11 pages, |
J-STD-020A interfacing of 8 way dip switch to 8051 DS1307ZN DS1307Z DS1307N DS1307 56-G2008-001 rtc ds1307 pin diagram ds1307 application notes DS1307 abstract |
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| Abstract: VCC X2 VBAT 2 7 SQW/OUT 3 6 SCL GND 4 5 SDA DS1307 DS1307 8-Pin DIP (300-mil) X1 l 8 VCC X2 VBAT 2 7 SQW/OUT 3 6 SCL GND 4 5 SDA DS1307 DS1307 8-Pin SOIC (150-mil) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT - Primary , data movement on the serial interface. SDA (Serial Data Input/Output) SDA is the input/output pin for the 2-wire serial interface. The SDA pin is open drain which requires an external pullup ... | Original |
12 pages, |
"Real Time Clocks" ds1307 application notes DS1307N DS1307Z DS1307ZN J-STD-020A JPC BATTERY rtc ds1307 applications DS1307 IC DS1307 ds1307 rtc DS1307 IC data sheet DS1307 IC DS1307 abstract |
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| Abstract: 4 5 SDA DS1307 DS1307 8-Pin DIP (300 mil) X1 l 8 VCC X2 VBAT 2 7 SQW/OUT 3 6 SCL GND 4 5 SDA DS1307Z DS1307Z 8-Pin SOIC (150 mil) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT - Primary Power Supply - 32.768 kHz Crystal Connection - +3V , interface. SDA (Serial Data Input/Output) - SDA is the input/output pin for the 2-wire serial interface. The SDA pin is open drain which requires an external pullup resistor. SQW/OUT (Square Wave/ Output ... | Original |
11 pages, |
rtc ds1307 pin diagram JPC BATTERY J-STD-020A DS1307ZN DS1307Z DS1307N ds1307 application notes DS1307 rtc ds1307 DS1307 abstract |
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| Abstract: VCC X2 VBAT 2 7 SQW/OUT 3 6 SCL GND 4 5 SDA DS1307 DS1307 8-Pin DIP (300-mil) X1 l 8 VCC X2 VBAT 2 7 SQW/OUT 3 6 SCL GND 4 5 SDA DS1307 DS1307 8-Pin SOIC (150-mil) PIN DESCRIPTION VCC X1, X2 VBAT GND SDA SCL SQW/OUT - Primary , data movement on the serial interface. SDA (Serial Data Input/Output) SDA is the input/output pin for the 2-wire serial interface. The SDA pin is open drain which requires an external pullup ... | Original |
12 pages, |
J-STD-020A DS1307ZN DS1307Z DS1307N DS1307 Capacitive layout rtc ds1307 pin diagram rtc ds1307 DS1307 IC DS1307 abstract |
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| Abstract: : ZF36 REVISION: B DOCUMENT CONTROL #: PD-2023 Ordering Information Ordering Number Package , operated by a Bus Enable pin. SD_A SEL0_A SEL1_A SEL2_A SEL3_A EN_A EN_B 36 , 32 15 31 16 Pin Name VDD AI+ AIGND BI+ BISEL[0:1]_A SEL[0:1]_B SEL[2]_A SEL[2]_B SEL[3]_A SEL[3]_B I/O PWR I I PWR I I I I I I I I 27 AO+ O 26 AO- O 7 BO+ O 8 BO- O 30, 29 EN_[A,B] I 12 11 17, 18 5 24 19 CLKINCLKIN+ OUT+ ... | Original |
7 pages, |
ZF36 PI2EQX3201A PI2EQX3201 PD-2023 PI2EQX3201AZFE heat slug for JEDEC PI2EQX3201A abstract |
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| Abstract: b0821 ) Pin Description (Top-Side View) SD_A SEL0_A SEL1_A SEL2_A SEL3_A EN_A EN_B 36 , PWR NC - 36 35 SD_A SD_B O 34 33 13 14 32 15 31 16 1, 5, 6, 10, 23, 28 , output common mode voltage when input is ... | Original |
5 pages, |
ZF36 PD-2023 25K-OHM PI2EQX3201BL PI2EQX3201BL abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| ST | 512 BIT (64B X 8) SERIAL ACCESS TIMEKEEPER SRAM Datasheet 512 BIT (64B X 8) SERIAL ACCESS TIMEKEEPER SRAM M41T11 M41T11 M41T11 M41T11 Document M41T11 M41T11 M41T11 M41T11 V SS SCL OSCO SDA FT/OUT V BAT OSCI Oscillator Input OCSO Oscillator Output FT/OUT Frequency Test / Output Driver (Open drain) SDA Serial Data Address Input / Output SDA V SS SCL FT/OUT OSCO OSCI V CC V BAT AI01001 AI01001 AI01001 AI01001 M41T11 M41T11 M41T11 M41T11 2 3 4 8 7 6 5 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6103-v3.htm |
STMicroelectronics | 31/01/2001 | 34.99 Kb | HTM | 6103-v3.htm |
| PROGRAMMABLE LOUDNESS FUNCTION VOLUME CONTROL IN 1dB STEPS INCLUD - ING GAIN UP TO 16dB ZERO CROSSING MUTE SPEAKERS CONTROL IN 1dB STEPS FOR BALANCE AND FADER FACILITIES PAUSE DETECTOR PROGRAMMABLE THRESHOLD _L MUXOUT_L MID_LI TREB-L AGND AVDD DVDD CREF ADDR SCL SDA DGND PAUSE OUT_LF SMEXT BASS Vrms f = 1KHz 0.01 0.8 % S/N Signal to Noise Ratio 111 dB S C Channel Separation f = 1KHz 95 dB Input Gain 1dB step 0 15 dB Volume Control 1dB step -63 16 dB Treble Control 2dB step -14 +14 dB www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4290.htm |
STMicroelectronics | 20/10/2000 | 34.84 Kb | HTM | 4290.htm |
| 98AU882 98AU882 98AU882 98AU882 R5 50 TEST BOARD DIAGRAM TDA7437 TDA7437 TDA7437 TDA7437 20/23 A A2 A1 B Seating Plane C 11 12 22 23 33 34 44 E3 D3 FUNCTION VOLUME CONTROL IN 1dB STEPS INCLUD - ING GAIN UP TO 16dB ZERO CROSSING MUTE, SOFT MUTE AND DIRECT MUTE BASS AND TREBLE CONTROL FOUR SPEAKER ATTENUATORS - FOUR INDEPENDENT SPEAKERS CONTROL IN 1dB STEPS CSM IN_L MUXOUT_L MID_LI TREB-L AGND AVDD DVDD CREF ADDR SCL SDA DGND PAUSE OUT_LF SMEXT BASS_RO BASS .6 Vrms THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 0.8 % S/N Signal to Noise Ratio 111 dB S C www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4290-v1.htm |
STMicroelectronics | 02/04/1999 | 31.06 Kb | HTM | 4290-v1.htm |
| 98AU882 98AU882 98AU882 98AU882 R5 50 TEST BOARD DIAGRAM TDA7437 TDA7437 TDA7437 TDA7437 20/23 A A2 A1 B Seating Plane C 11 12 22 23 33 34 44 E3 D3 FUNCTION VOLUME CONTROL IN 1dB STEPS INCLUD - ING GAIN UP TO 16dB ZERO CROSSING MUTE, SOFT MUTE AND DIRECT MUTE BASS AND TREBLE CONTROL FOUR SPEAKER ATTENUATORS - FOUR INDEPENDENT SPEAKERS CONTROL IN 1dB STEPS CSM IN_L MUXOUT_L MID_LI TREB-L AGND AVDD DVDD CREF ADDR SCL SDA DGND PAUSE OUT_LF SMEXT BASS_RO BASS .6 Vrms THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 0.8 % S/N Signal to Noise Ratio 111 dB S C www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4290-v2.htm |
STMicroelectronics | 14/06/1999 | 31.02 Kb | HTM | 4290-v2.htm |
| OPTIMAL ADAPTATION TO DIFFERENT SOURCES FULLY PROGRAMMABLE LOUDNESS FUNCTION VOLUME CONTROL IN 1dB STEPS INCLUD - ING GAIN UP TO 16dB ZERO CROSSING MUTE, SOFT MUTE AND DIRECT MUTE BASS AND TREBLE CONTROL FOUR SPEAKER ATTENUATORS - FOUR INDEPENDENT SPEAKERS CONTROL IN 1dB STEPS FOR SDA DGND PAUSE OUT_LF SMEXT BASS_RO BASS_RI BASS_LI MID_LO BASS_LO OUT_RF OUT to Noise Ratio 111 dB S C Channel Separation f = 1KHz 95 dB Input Gain 1dB step 0 15 dB www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4290-v3.htm |
STMicroelectronics | 25/05/2000 | 32.82 Kb | HTM | 4290-v3.htm |
| 39 43 SDA 44 SCL 45 SYNC 46 CLK 47 VDD 48 OSC 49 A0 50 A1 51 A2 52 SA0 53 VSS 54 VLCD 55 BP0 56 IC3 PCF8576D PCF8576D PCF8576D PCF8576D SDA SCL A01 A12 LED03 LED03 LED03 LED03 LED14 LED14 LED14 LED14 LED25 LED25 LED25 LED25 LED36 LED36 LED36 LED36 A27 A38 VDD 16 A6 15 A5 14 SDA 13 SCL 12 A4 11 OE 10 VSS 9 IC5 PCA9633 PCA9633 PCA9633 PCA9633 R 1 G 2 B 3 + 4 BL1 BACKLIGHT 82R R24 68R R26 68R R25 GNDGNDGND GND SDA SCL GND SDA 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 D D C C B B A A Title Number RevisionSize A2 Date: 6-12-2007 Sheet 11 10 RS1 GND 22k R1 J3 GND 33k R4 D 3 B A S1 6 GND SW4 GND 33k R2 D 2 B A S1 6 GND 10k R7 100k R8 www.datasheetarchive.com/download/41019255-595924ZC/code.lcd.demo.board.zip (OM6290 schematic and PCB layout.pdf) |
NXP | 16/03/2009 | 9306.17 Kb | ZIP | code.lcd.demo.board.zip |
| 6151-5X 6151-5X 6151-5X 6151-5X Q67000-A5085 Q67000-A5085 Q67000-A5085 Q67000-A5085 TDA 6160-2X 6160-2X 6160-2X 6160-2X Q67000-A5089 Q67000-A5089 Q67000-A5089 Q67000-A5089 SDA 6310X 6310X 6310X 6310X Q67000-A5097 Q67000-A5097 Q67000-A5097 Q67000-A5097 TDA 6612-2 Q67000-A Q67000-A Q67000-A Q67000-A -A5145 -A5145 -A5145 -A5145 TDA 6811 Q67000-A5149 Q67000-A5149 Q67000-A5149 Q67000-A5149 TDA 6621 Q67000-A5162 Q67000-A5162 Q67000-A5162 Q67000-A5162 SDA 5231-5 Q67000-A5172 Q67000-A5172 Q67000-A5172 Q67000-A5172 TDA 6140-5X 6140-5X 6140-5X 6140-5X Q Q67000-A5183 Q67000-A5183 Q67000-A5183 Q67000-A5183 TDA 4390-2X 4390-2X 4390-2X 4390-2X Q67000-A5184 Q67000-A5184 Q67000-A5184 Q67000-A5184 TDA 6160-2S 6160-2S 6160-2S 6160-2S Q67000-A5186 Q67000-A5186 Q67000-A5186 Q67000-A5186 SDA 5648 Q67000-A5194 Q67000-A5194 Q67000-A5194 Q67000-A5194 TDA TLE 4202 B Q67000-A8298 Q67000-A8298 Q67000-A8298 Q67000-A8298 TDA 4817 Q67000-A8299 Q67000-A8299 Q67000-A8299 Q67000-A8299 TDA 4817 G Q67000-A8302 Q67000-A8302 Q67000-A8302 Q67000-A8302 TCA 3727 Q67000-A8334 Q67000-A8334 Q67000-A8334 Q67000-A8334 TCA 2465 G Q67000-A8335 Q67000-A8335 Q67000-A8335 Q67000-A8335 TCA 3727 G Q67000-A8338 Q67000-A8338 Q67000-A8338 Q67000-A8338 TCA 965 B Q67000-A8339 Q67000-A8339 Q67000-A8339 Q67000-A8339 SAE 800, SAE 800 G www.datasheetarchive.com/files/infineon/index/listco3.htm |
Infineon | 26/11/1998 | 98.63 Kb | HTM | listco3.htm |
| Serial Clock 40 SDA I/O Serial Data Bus OTHER 47 MODE I 0 = Mode A, 1 = Mode B 1, 2, 5, 6, 13, 14 60 M_CLK SCL SDA MODE V DD V SS D[7.0] STV0196B C/N INDICATOR 0196B-02.EPS of both SDA and SCL signals See Note 5 20 + 0.1 C B 300 ns C B Capacitive Load ,DAT t F t R t SU,DAT t SU,STA t SU,STO SDA SCL t HD,STA 0196B-11.EPS /n ESTIMATION (continued) STV0196B 20/23 Normal Process C/N Estimation Check VSTATUS SN www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4788-v3.htm |
STMicroelectronics | 25/05/2000 | 48.06 Kb | HTM | 4788-v3.htm |
| STR_OUT CK_OUT I[5.0] Q[5.0] CLKREC D60 M_CLK SCL SDA MODE V DD V SS D[7.0] STV0196B C HD,STA t HD,DAT t F t R t SU,DAT t SU,STA t SU,STO SDA SCL t HD,STA 0196B-11.EPS Figure 9 STV0196B 16 D6 D5 D4 D3 D2 D1 D0 D/60 VCO ADJ (PWM) SDA SCL RESET ERROR D/P STROUT CKOUT 0196B-13.EPS given in algebraic value (not in dB). ANNEXE 1 : C/n ESTIMATION (continued) STV0196B 20/23 Normal ST | QPSK/BPSK DEMODULATOR AND FEC IC STV0196B QPSK/BPSK DEMODULATOR AND FEC IC www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4788-v2.htm |
STMicroelectronics | 14/06/1999 | 46.21 Kb | HTM | 4788-v2.htm |
| _CLK SCL SDA MODE V DD V SS D[7.0] STV0196B C/N INDICATOR 0196B-02.EPS BLOCK DIAGRAM STV0196B ,STO SDA SCL t HD,STA 0196B-11.EPS Figure 9 STV0196B 16/23 V DDL V DDL V DDL V DDL V DDL (not in dB). ANNEXE 1 : C/n ESTIMATION (continued) STV0196B 20/23 Normal Process C/N Estimation QPSK/BPSK DEMODULATOR AND FEC IC STV0196B Document Format Size 27/09/1996 23 Raw Text Format STV0196B QPSK www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/4788.htm |
STMicroelectronics | 20/10/2000 | 51.07 Kb | HTM | 4788.htm |