NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 99 7.10 LPC Analysis 100 7.11 LPC Coeff. to '.fre'.' 102 7.12 Whitening FIR Filter 103 7.13 , Displays 112 8.2.1 8.2.2 2D display 113 3D display 114 dsPICworksTM Software Page iii Table , Addendum - Lattice Filters 133 11.1 Creating Lattice IIR Filters 134 11.2 Creating FIR Lattice FIR , .SCR Time domain data fields are all real-valued signals with time values implicit. The signal , is an FIR or an IIR filter. See the dsPIC Filter Design manual for details. 1.4.7 Storage ... | Original |
146 pages, |
D35B 60 ASM30 cosine scr D35B triangular wave generation in dspic 259548 scr FIR 3D 41 scr FIR 3d datasheet abstract |
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| Abstract: APR7/D Rev 2 Implementing IIR/FIR Filters with Motorola's DSP56000/DSP6001 DSP56000/DSP6001 Motorola Digital Signal Processors Implementing IIR/FIR Filters with Motorola's DSP56000/DSP56001 DSP56000/DSP56001 by John Lane and , Forrri') 6-14 System SECTION 7 FIR FILTERS 7.1 Linear-Phase FIR Filter Structure 7-2 7.2 Linear-Phase FIR Filter Design Using the Frequency Sampling Method 7-8 7.3 FIR Filter Design Using FDAS 7-22 7A FIR Implementation on the DSP56001 DSP56001 7-29 REFERENCES Reference-1 vin MOTOROLA Illustrations ... | OCR Scan |
141 pages, |
woo sung transformer 14111 active maximally flat bandpass filter D04A transformer DSP56000 DSP96002 REALTIME APPLICATIONS FIR 3D 41 GW 9n na 299609 DSP56001 JD 1803 kaiserwindow cd 7638 DSP56000/DSP6001 DSP56000/DSP56001 DSP56000/DSP6001 abstract |
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| Abstract: 3D (vs. time) format after a time-domain data capture. Exit. Exits the program. FFT Single. Loads , 0 .1 .4 .5 .5 .4 .1 0 This file will provide an 8 tap RCF Finite Impulse Response (FIR , ) Harmonics={on|off) Bin Boundries=(on|off) Average Noise=(on|off) CHIP MODE: Chip Mode=(scr|scc|dcr) Sync , 5D 4D 3D 2D 1D 8Q 7Q 6Q 5Q 4Q 3Q 2Q 1Q CK U101 74LCX574 74LCX574 I7 I6 I5 I4 I3 I2 I1 I0 9 8 7 6 5 4 3 2 8D 7D 6D 5D 4D 3D 2D 1D 8Q 7Q 6Q 5Q 4Q 3Q 2Q 1Q ... | Original |
25 pages, |
72V285 AD6600 AD6640 AD6644 AD9042 GS004 GS00494 IEEE-1284 integrated circuit u304 J100 J300A U202 AD6620 U307 scr C106 AD6620 abstract |
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| Abstract: Receive Slot Mask Registers (TSM, RSM)" page B-29 Figure B-19, "SCI Control Register (SCR)" page , $FFFF9D Port E GPIO Data Register (PDRE) $FF9C $FFFF9C SCI Control Register (SCR) $FF9B , 100 No update 101 Postincrement-by1 110 3D 111 3D Offset Selection DOR0 DOR1 DOR2 DOR3 , (SCR) Address X:$FFFF9C Read/Write * 0 16 15 14 13 12 11 10 9 REIE SCKP STIR TMIE TIE , WDS1 WDS0 SCI Control Register (SCR) * = Reserved, Program as 0 Figure B-19. SCI Control ... | Original |
42 pages, |
b12 motorola scr FIR 3D 41 scr FIR 3d DSP56300 DSP56311 DSP56300 abstract |
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| Abstract: Model. 8-10 8.6.1 SCI Control Register (SCR , Initialization. 10-8 10.3.2.1 FIR , Initialization. 10-8 10.3.3 FIR Filter Type . 10-8 10.3.3.1 FIR Operating Modes , Mode. 10-11 10.3.3.2 FIR Filter Type Processing Options ... | Original |
366 pages, |
68000 MC68681 PROGRAMMING EXAMPLE DSP56300 DSP563XX architecture DSP56L307 F46E diode i8051 internal structure manual PACE PSR 800 Plus scr FIR 3D 41 SCR FIR 3 D data sheet scr fir 3d scr FIR 3d DSP56L307UM/D DSP56L307 abstract |
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| Abstract: 56L307 Model. 8-10 8.6.1 SCI Control Register (SCR , Initialization. 10-8 10.3.2.1 FIR , Initialization. 10-8 10.3.3 FIR Filter Type . 10-8 10.3.3.1 FIR Operating Modes , Mode. 10-11 10.3.3.2 FIR Filter Type Processing Options ... | Original |
366 pages, |
DSP56L307 DSP56300 scr FIR 3d DSP56L307 abstract |
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| Abstract: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. 9.6.1 SCI Control Register (SCR , Initialization. 11-8 11.3.2.1 FIR , Initialization. 11-8 11.3.3 FIR Filter Type . 11-8 11.3.3.1 FIR Operating Modes , Mode. 11-11 11.3.3.2 FIR Filter Type Processing Options ... | Original |
380 pages, |
scr FIR 3d intel 845 crb DSP56321 DSP56300 i8051 internal structure DSP56321 abstract |
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| Abstract: Model. 8-10 8.6.1 SCI Control Register (SCR , Initialization. 10-8 10.3.2.1 FIR , Initialization. 10-8 10.3.3 FIR Filter Type . 10-8 10.3.3.1 FIR Operating Modes , Mode. 10-11 10.3.3.2 FIR Filter Type Processing Options ... | Original |
364 pages, |
DSP56L307 DSP56300 manual PACE PSR 800 Plus SCR FIR 3 D scr FIR 3d DSP56L307UM/AD DSP56L307 abstract |
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| Abstract: Converters FIR Digital Filters On-Chip Offset Calibration Power-Down Mode 3 Auxiliary D/A Converters , 2.5V REFERENCE I CHANNEL DIGITAL FIR FILTER OFFSET REGISTER i-r OFFSET REGISTER Q CHANNEL DIGITAL FIR FILTER Ã--O CAL CLK2 4TH ORDER BESSEL LOW-PASS FILTER Ã"Q1 REFERENCE OUTPUT BUFFER > Oi S-A , extended periods may affect device reliability. 2Transient currents of up to 100 mA will not cause SCR , SLEEP 1 Tx DATA 2 TxCLK 3D DVDD 4 â-¡ DGND NC CLK1 Ti I TESTI 8 Ol NC 9Å' CLK2 11 cm 1 PIN 1 IDENTIFIER ... | OCR Scan |
16 pages, |
DB10 AD7002AS AD7002A AD7002 scr FIR 3D 41 scr fir 3d datasheet abstract |
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| Abstract: LINEAR TECHNOLOGY FEBRUARY 1996 IN THIS ISSUE . . . COVER ARTICLE New LTC®1435ÂLTC1439 LTC1439 DC/DC Controllers Feature Value and Performance. 1 Randy Flatness, Steve Hobrecht and Milton Wilcox Editor's Page . 2 Richard Markell LTC in the News . 2 DESIGN FEATURES New 12-Bit ADC Squeezes 100ksps from 10mW . 7 William C. Rempfer and Ringo Lee The LT®1511 3A Battery Charger Charges All Battery Types, Including Lithi ... | Original |
40 pages, |
scr pulse battery charger schematic 5d 3kv IR DATABOOK SCR SCHEMATICS of the IC CD4013 PHILBRICK LPE-8562-A092 panasonic dv 700 inverter LT1512 cd4051 spice Leader 8020 schematics Oscilloscope Manual panasonic inverter dv 700 panasonic inverter dv 700 7 amp. manual LTC1439 LTC1439 abstract |
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| Type Supply Driver BS Function 1 VSS 0V Ground 2 AD_0 B VDD BD8SCR B Data 0 3 AD_1 B VDD BD8SCR B Data 1 4 AD_2 B VDD BD8SCR B Address / Data 2 5 VDD (VSS + 3.3V) Power Supply 6 AD_3 B VDD BD8SCR B Address / Data 3 7 AD_4 B VDD BD8SCR B Address / Data 4 8 VSS 0V Ground 9 AD_5 B VDD BD8SCR B Address / Data 5 10 AD_6 B VDD BD8SCR B Address / Data 6 11 VDD (VSS + 3.3V) Power Supply 12 AD_7 B VDD BD8SCR B Address / Data 7 13 AD_8 B VDD BD8SCR B Address / Data 8 14 AD_9 B VDD BD8SCR B Address / Data 9 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7161.htm |
STMicroelectronics | 20/10/2000 | 54.16 Kb | HTM | 7161.htm |
| _0 B VDD BD8SCR B Data 0 3 AD_1 B VDD BD8SCR B Data 1 4 AD_2 B VDD BD8SCR B Address / Data 2 5 VDD (VSS + 3.3V) Power Supply 6 AD_3 B VDD BD8SCR B Address / Data 3 7 AD_4 B VDD BD8SCR B Address / Data 4 8 VSS 0V Ground 9 AD_5 B VDD BD8SCR B Address / Data 5 10 AD_6 B VDD BD8SCR B Address / Data 6 11 VDD (VSS + 3.3V) Power Supply 12 AD_7 B VDD BD8SCR B Address / Data 7 13 AD_8 B VDD BD8SCR B Address / Data 8 14 AD_9 B VDD BD8SCR B Address / Data 9 15 VSS 0V Ground 16 AD_10 B VDD www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7161-v1.htm |
STMicroelectronics | 31/05/2000 | 52.1 Kb | HTM | 7161-v1.htm |
| Cycle1 Cycle2 Cycle3 Test0 Test1 Test2 Test3 D98TL320 MCLK CLWD AFTXD AFTXED GP_OUT Figure 27. Transmitt Word Timing Diagram Cycle0 Cycle1 Cycle2 Cycle3 Test0 Test1 Test2 Test3 D98TL321 MCLK CLWD AFRXD /25 PIN FUNCTIONS Pin Name Type Supply Driver BS Function 1 VSS 0V Ground 2 AD_0 B VDD BD8SCR B Data 0 3 AD_1 B VDD BD8SCR B Data 1 4 AD_2 B VDD BD8SCR B Address / Data 2 5 VDD (V SS + 3.3V) Power Supply 6 AD_3 B VDD BD8SCR B Address / Data 3 7 AD_4 B VDD BD8SCR B Address / Data 4 8 VSS 0V Ground 9 AD_5 B www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5878-v1.htm |
STMicroelectronics | 02/04/1999 | 52 Kb | HTM | 5878-v1.htm |
| repeat after 4 MCLK cycles. Cycle0 Cycle1 Cycle2 Cycle3 Test0 Test1 Test2 Test3 D98TL320 MCLK CLWD Test1 Test2 Test3 D98TL321 MCLK CLWD AFRXD GP_IN(0) Figure 28. Receive Word Timing Diagram VDD BD8SCR B Data 0 3 AD_1 B VDD BD8SCR B Data 1 4 AD_2 B VDD BD8SCR B Address / Data 2 5 VDD (V SS + 3.3V) Power Supply 6 AD_3 B VDD BD8SCR B Address / Data 3 7 AD_4 B VDD BD8SCR B Address / Data 4 8 VSS 0V Ground 9 AD_5 B VDD BD8SCR B Address / Data 5 10 AD_6 B VDD BD8SCR B Address / Data www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5878.htm |
STMicroelectronics | 20/10/2000 | 56.1 Kb | HTM | 5878.htm |
| Test0 Test1 Test2 Test3 D98TL320 MCLK CLWD AFTXD AFTXED GP_OUT Figure 27. Transmitt Word Timing Diagram Cycle0 Cycle1 Cycle2 Cycle3 Test0 Test1 Test2 Test3 D98TL321 MCLK CLWD AFRXD Function 1 VSS 0V Ground 2 AD_0 B VDD BD8SCR B Data 0 3 AD_1 B VDD BD8SCR B Data 1 4 AD_2 B VDD BD8SCR B Address / Data 2 5 VDD (V SS + 3.3V) Power Supply 6 AD_3 B VDD BD8SCR B Address / Data 3 7 AD_4 B VDD BD8SCR B Address / Data 4 8 VSS 0V Ground 9 AD_5 B VDD BD8SCR B Address / Data 5 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5878-v3.htm |
STMicroelectronics | 25/05/2000 | 53.84 Kb | HTM | 5878-v3.htm |
| Cycle1 Cycle2 Cycle3 Test0 Test1 Test2 Test3 D98TL320 MCLK CLWD AFTXD AFTXED GP_OUT Figure 27. Transmitt Word Timing Diagram Cycle0 Cycle1 Cycle2 Cycle3 Test0 Test1 Test2 Test3 D98TL321 MCLK CLWD AFRXD /25 PIN FUNCTIONS Pin Name Type Supply Driver BS Function 1 VSS 0V Ground 2 AD_0 B VDD BD8SCR B Data 0 3 AD_1 B VDD BD8SCR B Data 1 4 AD_2 B VDD BD8SCR B Address / Data 2 5 VDD (V SS + 3.3V) Power Supply 6 AD_3 B VDD BD8SCR B Address / Data 3 7 AD_4 B VDD BD8SCR B Address / Data 4 8 VSS 0V Ground 9 AD_5 B www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5878-v2.htm |
STMicroelectronics | 14/06/1999 | 51.96 Kb | HTM | 5878-v2.htm |
| -pass filter, its cut-off frequency is : F c - 3dB # 19200Hz. Continuous-time filtering of the analog host, incremented the command counter COMACK, and is ready for a new command. ITSRCR X D6 X D4 D3 D2 X D0 D0 = 1 IT0 Pending D2 = 1 IT2 Pending Dn = 1 ITn Pending ITMASK D7 D6 X D4 D3 D2 X D0 D7 P A G E PROGRAM ROM 8K x 32 63 58 57 2 1 60 61 IIR FIR IIR FIR FIFO 8 x 16 FIFO 8 x 16 CROM 8K x 16 ST18932 ST18932 ST18932 ST18932 DSP CORE RAM 2K x 16 FIR 59 62 64 DPLL AND CONTROL TXA1 TXA2 RXA1 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1793.htm |
STMicroelectronics | 20/10/2000 | 87.62 Kb | HTM | 1793.htm |
| pole low-pass filter, its cut-off frequency is : F c - 3dB # 19200Hz. Continuous-time filtering of the the host, incremented the command counter COMACK, and is ready for a new command. ITSRCR X D6 X D4 D3 D2 X D0 D0 = 1 IT0 Pending D2 = 1 IT2 Pending Dn = 1 ITn Pending ITMASK D7 D6 X D4 D3 D2 X D0 D7 and 32 63 58 57 2 1 60 61 IIR FIR IIR FIR FIFO 8 x 16 FIFO 8 x 16 CROM 8K x 16 ST18932 ST18932 ST18932 ST18932 DSP CORE RAM 2K x 16 FIR 59 62 64 DPLL AND CONTROL TXA1 TXA2 RXA1 RXA2 V REFP V CM V REFN 3 52 34 35 36 37 38 39 INT www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1793-v2.htm |
STMicroelectronics | 14/06/1999 | 82.16 Kb | HTM | 1793-v2.htm |
| includes a single pole low-pass filter, its cut-off frequency is : F c - 3dB # 19200Hz counter COMACK, and is ready for a new command. ITSRCR X D6 X D4 D3 D2 X D0 D0 = 1 IT0 Pending D2 = 1 IT2 Pending Dn = 1 ITn Pending ITMASK D7 D6 X D4 D3 D2 X D0 D7 and D0 = 1 IT0 Enable D D7 P A G E PROGRAM ROM 8K x 32 63 58 57 2 1 60 61 IIR FIR IIR FIR FIFO 8 x 16 FIFO 8 x 16 CROM 8K x 16 ST18932 ST18932 ST18932 ST18932 DSP CORE RAM 2K x 16 FIR 59 62 64 DPLL www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1793-v3.htm |
STMicroelectronics | 25/05/2000 | 84.01 Kb | HTM | 1793-v3.htm |
| pole low-pass filter, its cut-off frequency is : F c - 3dB # 19200Hz. Continuous-time filtering of the the host, incremented the command counter COMACK, and is ready for a new command. ITSRCR X D6 X D4 D3 D2 X D0 D0 = 1 IT0 Pending D2 = 1 IT2 Pending Dn = 1 ITn Pending ITMASK D7 D6 X D4 D3 D2 X D0 D7 and 32 63 58 57 2 1 60 61 IIR FIR IIR FIR FIFO 8 x 16 FIFO 8 x 16 CROM 8K x 16 ST18932 ST18932 ST18932 ST18932 DSP CORE RAM 2K x 16 FIR 59 62 64 DPLL AND CONTROL TXA1 TXA2 RXA1 RXA2 V REFP V CM V REFN 3 52 34 35 36 37 38 39 INT www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1793-v1.htm |
STMicroelectronics | 02/04/1999 | 82.2 Kb | HTM | 1793-v1.htm |