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SN74132N Texas Instruments Quad 2-input positive-NAND Schmitt triggers 14-PDIP 0 to 70 visit Texas Instruments
SN74132N3 Texas Instruments Quad 2-input positive-NAND Schmitt triggers 14-PDIP 0 to 70 visit Texas Instruments
SN7413N Texas Instruments Dual 4-input Positive-NAND Schmitt triggers 14-PDIP 0 to 70 visit Texas Instruments
SN74AHCT14-W Texas Instruments Hex Schmitt-Trigger Inverters 0-WAFERSALE visit Texas Instruments
SN74AHC1G14DCKT Texas Instruments Single Schmitt-Trigger Inverter Gate 5-SC70 -40 to 125 visit Texas Instruments
SN74AHCT1G14DCKR Texas Instruments Single Schmitt-Trigger Inverter Gate 5-SC70 -40 to 125 visit Texas Instruments Buy

schmitt trigger 7413

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schmitt trigger 7413

Abstract: equivalent for 74LS13 Signetics 7413, LS13 Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic , conventional NAND gates. Each circuit contains a 4-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback to , respond in the transitions of the other input as shown in Waveform 1. TYPE 7413 74LS13 TYPICAL , Signetics Logic Products Product Specification Gates 7413, LS13 ABSOLUTE MAXIMUM RATINGS
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schmitt trigger 7413 equivalent for 74LS13 PIN CONFIGURATION 74ls13 equivalent for 7413 dual schmitt trigger 7413 4-input nand gate 853051 N7413N N74LS13N

TTL LS 7413

Abstract: schmitt trigger 7413 Waveform 1. 7413, LS13 Gates Dual 4-lnput NAND Schmitt Trigger Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7413 17ns 17mA 74LS13 17ns 3.5mA ORDERING CODE PACKAGES , noise margin than conventional NAND gates. Each circuit contains a 4-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger , Specification Gates 7413, LS13 ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range unless
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TTL LS 7413 ls 7413 n LS13 74ls gate symbols 1N3064 1N916

schmitt trigger 7413

Abstract: 7413 4-input nand gate Signetics 7413, LS13 Gates Logic Products Dual 4-lnput NAND Schmitt Trigger Product , NAND gates. Each circuit contains a 4-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback to , SUPPLY CURRENT (TOTAL) 7413 17ns 17mA 74LS13 17ns 3.5mA ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = , 7413, LS13 ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range unless otherwise noted
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74LS13 function table 74LS logic gates 74ls 4 inputs 2 gates and 74LS LS13-V

schmitt trigger 7413

Abstract: TTL LS 7413 Signetics 7413, LS13 Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic , conventional NAND gates. Each circuit contains a 4-input Schmitt trigger follow ed by a Darlington level shifter and a phase splitter driving a TTL totem -pole output. The Schm itt trigger uses positive feedback , . TYPE 7413 74LS13 TYPICAL PROPAGATION DELAY 17ns 17ns TYPICAL SUPPLY CURRENT (TOTAL) 17mA 3.5mA , 7413, LS13 ABSOLUTE MAXIMUM RATINGS PARAMETER Vcc V|N *IN V OUT (Over operating free-air
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TTL LS 7413

Abstract: schmitt trigger 7413 Signetics 7413, LS13 Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic , than conventional N A N D gates. Each circuit contains a 4-input Schm itt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem -pole output. T h e Schm itt trigger uses , the other input as shown in W avefo rm 1. TYPE 7413 74LS13 TYPICAL PROPAGATION DELAY 17ns 17ns , S ignetics Logic Products Product S pe cifica tio n Gates 7413, LS13 ABSOLUTE MAXIMUM
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74 LS 00 Logic Gates OP01670S P016B0S

trigger 74114

Abstract: 74114 5 Hex Schmitt Trigger 54LS/74LS14 54/74114 â'" â'" D1 3I,6A,9A 6 Quad 2-lnput 9002 54LS/74LS00 54 , 4-lnput Schmitt â'" 54L.S/74LS13 54/7413 â'" â'" D65 3I.6A.9A 18 Dual 4-lnput (OC) â'" 54L.S/74LS22 , FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D65 54/7413, 54LS/74LS13 Vcc NC HKiEiraiaram 3 LlI lil Id li] li] LàJ Ui NC QND D66 54/74125, 54LS/74LS125 Vcc E D O E D O ism a ra , â'" â'" D3 3I,6A,9A 13 Quad 2-lnput Schmitt 74LS132 54/74132 â'" 54S/74S132 D2 3I,6A,9A 14 Triple
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9S05A trigger 74114 74114 IC 7404 74ls04 hex inverter gates IC 7413 rs 7410 54LS/74LS126 54LS/74LS365 54LS/74LS366 54LS/74LS367 54LS/74LS368 54LS/74LS260

9N13

Abstract: schmitt trigger 7413 FAIRCHILD TTL/SSI . 9N13/5413, 7413 DUAL NAND SCHMITT TRIGGER DESCRIPTION â'" The 9N13/5413, 7413 are dual Schmitt triggers functions, compatible with standard TTL output logic levels. Each function is essentially a 4-input NAND gate with different input threshold levels for positive and negative , changes by 1% over the same range. The 9N13/5413, 7413 can be triggered from slow input ramps and straight , 5-53 FAIRCHILD TTL/SSI â'¢ 9N13/5413, 7413 SWITCHING CHARACTERISTICS (TA = 25°C) SYMBOL PARAMETER
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9N13 7413 nand VT 87 ttl 7413 ScansUX999 9N13XM/5413XM 9N13XC/7413XC

TTL 7490

Abstract: 7490 bcd counter Digital Integrated Circuits TTL Complex functions A selection of TTL MSI and complex functions is offered by NKT to complement the ranges of gates and flip-flops. These are available as a direct replacement for the '7400 series' in plastic dual-in-line encapsulation. DIC 7413 DUAL 4 Input Schmitt Trigger DIC 7441A BCD to Decimal Decoder/Nixie Driver DIC 7442 BCD to Decimal Decoder DIC 7451 DUAL 2 , -bit Binary Counter DIC 7496 5-bit Shift Register DIC 74121 Monostable DIC 7413 "E .«E B1 [7 «E Dl ^ "
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TTL 7490 7490 bcd counter 7490 Decade Counter 7493 4 bit binary counter ttl 7493 ic 7493

TTL LS 7406

Abstract: el 7406 -lnput Schmitt â'" 54L.S/74LS13 54/7413 â'" â'" D65 3I.6A.9A 18 Dual 4-lnput (OC) â'" 54L.S/74LS22 54/7422 54H , '" 54/7416 â'" â'" D1 3I,6A,9A 4 Hex Inverter (30 V) â'" â'" 54/7406 â'" â'" D1 3I,6A,9A 5 Hex Schmitt Trigger 54LS/74LS14 54/74114 â'" â'" D1 3I,6A,9A 6 Quad 2-lnput 9002 54LS/74LS00 54/7400 54H/74H00 54S , ,6A,9A 13 Quad 2-lnput Schmitt 74LS132 54/74132 â'" 54S/74S132 D2 3I,6A,9A 14 Triple 3-lnput 9003
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TTL LS 7406 el 7406 74l804 ls 7404 7404 ls ic 74132 54H/74H30 54S/74S30 54LS/74LS30 54S/74S133 54LS/74LS133 54S/74S134

74ls04 hex inverter gates

Abstract: trigger 74114 ,6A,9A 4 Hex Inverter (30 V) â'" â'" 54/7406 â'" â'" D1 3I,6A,9A 5 Hex Schmitt Trigger 54LS/74LS14 , -lnput 9004 54LS/74LS20 54/7420 54H/74H20 74S20 D5 3I,6A,9A 17 Dual 4-lnput Schmitt â'" 54L.S/74LS13 54/7413 , -lnput Schmitt 74LS132 54/74132 â'" 54S/74S132 D2 3I,6A,9A 14 Triple 3-lnput 9003 54LS/74LS10 54/7410 54H/74H10
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IC 7404 7406 IC TTL 74LS00 7404 74H04 74L814 TTL 74h04 54LS/74LS04 54H/74H04 54S/74S04 9S04A 54LS/74LS05 54H/74H05

7413PC

Abstract: 74LS13PC 13 ^4/7413 // ^ ^ t^4LS/74LS13 r ' c- DUAL 4-INPUT SCHMITT TRIGGER ORDERING CODE: See Section 9 COM F Å' nc[T [I [I [I gnd[T INECTI PIN i ON DIAG OUT A RAM â m] Vcc m m îï] nc 3D H ZI PKGS PIN OUT COMMERCIAL GRADE MILITARY GRADE PKG TYPE Vcc = +5.0 V ±5%, Ta = 0°C to +70° C Vcc = +5.0 V ±10%, Ta = -55° C to +125° C Plastic DIP
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7413PC 74LS13PC 7413DC 74LS13DC 5413DM 54LS13DM 7413F T4LS 5413FM

IC 7413

Abstract: 74LS13PC NATIONA L SENICOND -CLOGIO OSE D | b S D H 5 5 Q0b3bS0 | c o r JNECT ON DIAG RAM PIN OUT A 13 54/7413 54LS/74LS13 DUAL 4-INPUT SCHMITT TRIGGER 1 ORDERING CODE: See Section 9 PIN PKGS Plastic DIP (P) Ceramic DIP (D) Flatpak (F) OUT A A A COMMERCIAL GRADE Vcc = +5.0 V ±5%, T a = 0° C to +70° C 7413PC, 74LS13PC 7413DC, 74LS13DC 7413FC, 74LS13FC 5413DM, 54LS13DM 5413FM, 54LS13FM MILITARY GRADE Vcc = +5.0 V ±10%, T a = -5 5 °C to +125°C PKG nc [T u ] V cc E |T F hi «1 ï ï TYPE 9A
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ic 74ls13 54/74LS

IC 7404 7406

Abstract: 74LS00 7400 74S00 '" â'" D1 3I,6A,9A 4 Hex Inverter (30 V) â'" â'" 54/7406 â'" â'" D1 3I,6A,9A 5 Hex Schmitt Trigger , Quad 2-lnput Schmitt 74LS132 54/74132 â'" 54S/74S132 D2 3I,6A,9A 14 Triple 3-lnput 9003 54LS/74LS10 , 16 Dual 4-lnput 9004 54LS/74LS20 54/7420 54H/74H20 74S20 D5 3I,6A,9A 17 Dual 4-lnput Schmitt â'" 54L.S/74LS13 54/7413 â'" â'" D65 3I.6A.9A 18 Dual 4-lnput (OC) â'" 54L.S/74LS22 54/7422 54H/74H22 74S22 D5 3I
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74LS00 7400 74S00 Fairchild 9002 ic 7404 fairchild IC TTL 7400 74LS00 TTL IC 7405 54S/74S05 54L8/74LS05 54S/74S00 54H/74H01 54S/74S03 54LS/74LS03

FZH115B

Abstract: fzh261 Dual NAND Schmitt trigger Hex Schmitt trigger Dual 4-input NAND gate Dual 4-input AND gate Tripple , register 8-bit synchronous binary down counter Hex Schmitt trigger Strobed hex inverter/buffer BCD up , Schmitt trigger 4-bit magnitude comparator 4000 74HC4000 4000B 4001B 4002B 4006B 4007B 4008B , re-trig monostable M/V Quad 3 state buffer Quad bus buffer gates Quad 2-input pos-NAND Schmitt 13 , 7413 7414 7420 7437 7438 7440 7442 7443 7444 7447 7450 7451 7453 7454 7460 7470
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FZH115B fzh261 FZK105 FZH131 FZJ111 FZH115 74INTEGRATED 16-DIL

TTL 7410

Abstract: TTL 7401 '" 54/7406 â'" â'" D1 3I,6A,9A 5 Hex Schmitt Trigger 54LS/74LS14 54/74114 â'" â'" D1 3I,6A,9A 6 Quad , /7420 54H/74H20 74S20 D5 3I,6A,9A 17 Dual 4-lnput Schmitt â'" 54L.S/74LS13 54/7413 â'" â'" D65 3I.6A.9A , Quad 2-lnput Line Dvr 96101 â'" 54/7439 â'" â'" D3 3I,6A,9A 13 Quad 2-lnput Schmitt 74LS132 54/74132
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TTL 7410 TTL 7401 TTL 7420 74LS00 TTL TTL 7404 fairchild 9016 TTL 74LS04 54LS/74LS26 54LS/74LS37 74LS38 54S/74S10 54S/74S20 54LS/74LS22

7404 TTL CMOS

Abstract: TTL 74h04 '" â'" D1 3I,6A,9A 4 Hex Inverter (30 V) â'" â'" 54/7406 â'" â'" D1 3I,6A,9A 5 Hex Schmitt Trigger , Quad 2-lnput Schmitt 74LS132 54/74132 â'" 54S/74S132 D2 3I,6A,9A 14 Triple 3-lnput 9003 54LS/74LS10 , 16 Dual 4-lnput 9004 54LS/74LS20 54/7420 54H/74H20 74S20 D5 3I,6A,9A 17 Dual 4-lnput Schmitt â'" 54L.S/74LS13 54/7413 â'" â'" D65 3I.6A.9A 18 Dual 4-lnput (OC) â'" 54L.S/74LS22 54/7422 54H/74H22 74S22 D5 3I
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7404 TTL CMOS TTL 7400 fairchild 7404 ttl inverter CI 74LS00 TTL 7404 fairchild 74H00 TTL 54H/74H40 54S/74S40 54LS/74LS40 54S/74S140 A1488 A1489

toshiba ta 7424

Abstract: t206 transistor Schmitt Input Characteristics (CMOS) High Level Trigger Voltage Low Level Trigger Voltage Hysteresis Voltage Schmitt Input Characteristics (CMOS) High Level Trigger Voltage Low Level Trigger Voltage , .16 7.4.1.1 7.4.1.2 7.4.1.3 7.4.1.4 7.4.2 5. Description of Pin Functions , corresponding register to select Hi-Z/0 or 1/0. READYxWAIT ReadySelect H2 13 I (CMOS Schmitt) Apply a high-level , resistor. ID VBUSHF ID signal VBUS/2 J6 J3 26 19 I (CMOS Schmitt with 120 K pull-up) I (special) ID signal
Seiko Epson
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toshiba ta 7424 t206 transistor 1FW 43 transistor GRM40F104Z50PT T207 DIODE transistor t342 S1R72005B00A300/F00A300 S1R72005B00A300 S1R72005F00A300 F-91976 E-08190

transistor t349

Abstract: transistor t348 Schmitt 120k with pull up) I (special) Enable D+ pull down. 0: disable, 1: enable Open when internal , Clock selection G7 F9 36 37 I (CMOS Schmitt) CLKIN External clock input F8 38 I (TTL) XRESET Chip reset E8 40 I (CMOS Schmitt 120k with pull up) 5.4 Test Signals Symbol Pin name Test mode Pin number CSP QFP 27 H6 28 G6 29 H8 Pin type I (CMOS Schmitt 120k with pull , Schmitt 120k with pull down) I (CMOS Schmitt 120k with pull down) SCANEN Test SCAN G8 34
Seiko Epson
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transistor t349 transistor t348 t326 Transistor diode t318 t324 transistor t345 diode MF1556-02 S1R72005

74ls82

Abstract: 74245 BIDIRECTIONAL BUFFER IC '¢ TTL/CMOS and Schmitt trigger I/O compatibility â'¢ Slew-rate output buffers â'¢ High density Static , . Schmitt trigger input cells offer 1.2V of hysterisis for CMOS levels and 0.7V for TTL levels. More details , 0.52 SCHMITCx Schmitt Trigger Input Buffer N U D 1.07 TLCHx TTL Level Input Buffer N U D 0.62 The , Output with moderate S = Schmitt trigger input buffer x = blanc or options slew rate N = Inverting input , 3.5 V Vt+c CMOS Schmitt trigger positive going threshold 3.0 3.5 V Vt-c CMOS Schmitt trigger
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74ls82 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 TC140G SC12D4

74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC and Schmitt trigger I/O compatibility · Slew-rate output buffers · High density Static RAM and ROM , Buffer CMOS Level Input Buffer Schmitt Trigger Input Buffer TTL Level Input Buffer R RP U D 3.70 2.39 , Schmitt trigger positive going threshold CMOS Schmitt trigger negative going threshold Schmitt hysterisis (CMOS) TTL low level input voltage TTL high level input voltage TTL Schmitt trigger positive going threshold TTL Schmitt trigger negative going threshold Schmitt hysterisis (TTL) High level output voltage
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ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 la 4508 ic schematic diagram advantages for ic 7473 4 BIT COUNTER 74669 XF107 SC18D4 SC27D4 SC37D4 SC44D4 SC54D4 SC68D4
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