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Abstract: LatticeSC/M Family Data Sheet DS1004 DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 DS1004 Features ­ 1 to 7.8 Mbits memory ­ True Dual Port/Pseudo Dual Port/Single Port ­ Dedicated FIFO logic for all block RAM ­ 500MHz performance · Additional 240K to 1.8Mbits distributed RAM High Performance FPGA Fabric · 15K to 115K four input Look-up Tables (LUT4s) · 139 to 942 I/Os · 700MHz global clock; 1GHz edge clocks 4 to 32 Hi ... Original
datasheet

243 pages,
1343.14 Kb

umi u26 SCM15 SC80 SC40 SC25 SC15 SC115 426 b34 transistor pt42c transistor pt36c pt36C DS1004 DS1004 abstract
datasheet frame
Abstract: LatticeECP3TM Serial Protocol Evaluation Board ­ Revision D User's Guide September 2009 Revision: EB44_01.1 LatticeECP3 Serial Protocol Evaluation Board ­ Revision D User's Guide Lattice Semiconductor Introduction The LatticeECP3 Serial Protocol Evaluation Board (referred to in this document as "SPB") allows designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers. The SPB is available for full and detailed characterizat ... Original
datasheet

46 pages,
2309.08 Kb

TCO-2111 smd diode b13 box header2x5 L829-1J1T-43 88E1111 U1J SMA 88E1111 marvell CW-P423 ROHM capacitor 100nf 16v 1005 x7r smd sot23-3 W32 CW-P423-156.25MHZ SMD SOT23 transistor MARK Y2 TCO2111-245.76MHZ datasheet abstract
datasheet frame
Abstract: LatticeSC/M Family Data Sheet DS1004 DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 DS1004 Features High Performance FPGA Fabric · 15K to 115K four input Look-up Tables (LUT4s) · 139 to 942 I/Os · 700MHz global clock; 1GHz edge clocks 4 to 32 High Speed SERDES and flexiPCSTM (per Device) · Performance ranging from 600Mbps to 3.8Gbps · Excellent Rx jitter tolerance (0.8UI at 3.125Gbps) · Low Tx jitter (0.25UI typical at 3.125G ... Original
datasheet

237 pages,
2548.5 Kb

W32 MARKING DS1004 PB124A PL84C PR55D pr94a diode SC115 SC15 SC25 transistor pt42c BA5 904 AF P SCM15 SC80 SC40 pr82a DS1004 abstract
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Abstract: LatticeECP2 Family Data Sheet Version 01.0, February 2006 LatticeECP2 Family Data Sheet Introduction February 2006 Advance Data Sheet Features · Source synchronous standards support ­ SPI4.2, SFI4, XGMII ­ High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support ­ DDR1 400 (200MHz) ­ DDR2 400 (200MHz) High Logic Density for System Integration · 6K to 68K LUTs · 192 to 628 I/Os sysDSPTM Block · 3 to 22 blocks for high performance multiply and accumulate ... Original
datasheet

104 pages,
1543.68 Kb

16X4 datasheet abstract
datasheet frame
Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.4, January 2009 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Features High Logic Density for System Integration · 6K to 95K LUTs · 90 to 583 I/Os Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support ­ SPI4.2, SFI4 (DDR Mode), XGMII ­ High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support ­ DDR1: 400 (200MHz) / DD ... Original
datasheet

386 pages,
2474.41 Kb

DS1006 DS1006 abstract
datasheet frame
Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 02.3, February 2007 LatticeECP2/M Family Data Sheet Introduction December 2006 Advance Data Sheet DS1006 DS1006 Features High Logic Density for System Integration · 6K to 95K LUTs · 90 to 616 I/Os Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support ­ SPI4.2, SFI4 (DDR Mode), XGMII ­ High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support ­ DDR1/DDR2 ... Original
datasheet

268 pages,
2132.48 Kb

DS1006 DS1006 abstract
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Abstract: IDT DATECODE MARKINGS LatticeECP2/M Family Handbook HB1003 HB1003 Version 04.6, May 2010 LatticeECP2/M Family Handbook Table of Contents May 2010 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1 Introduction . ... Original
datasheet

740 pages,
12224.88 Kb

vhdl code for radix-4 fft B14 diode on semiconductor HB1003 HB1003 abstract
datasheet frame
Abstract: LatticeECP2/M Family Handbook HB1003 HB1003 Version 02.2, February 2007 LatticeECP2/M Family Handbook Table of Contents February 2007 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1 Introduction . ... Original
datasheet

576 pages,
9447.81 Kb

HB1003 HB1003 abstract
datasheet frame
Abstract: LatticeECP2/M Family Handbook HB1003 HB1003 Version 03.5, February 2008 LatticeECP2/M Family Handbook Table of Contents February 2008 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1 Introduction . ... Original
datasheet

717 pages,
10734.82 Kb

HB1003 HB1003 abstract
datasheet frame
Abstract: LatticeSC/M Family Data Sheet DS1004 DS1004 Version 02.2, December 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 DS1004 Features High Performance FPGA Fabric · 15K to 115K four input Look-up Tables (LUT4s) · 139 to 942 I/Os · 700MHz global clock; 1GHz edge clocks 4 to 32 High Speed SERDES and flexiPCSTM (per Device) · Performance ranging from 600Mbps to 3.8Gbps · Excellent Rx jitter tolerance (0.8UI at 3.125Gbps) · Low Tx jitter (0.25UI typical at 3.125Gbps) · ... Original
datasheet

237 pages,
2568.02 Kb

DS1004 DS1004 abstract
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