500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

Top Results

Part Manufacturer Description Datasheet BUY
J2014001L402 GE Critical Power GP100, 3&934;-480, RS485 communications, controller slot, LAN, RJ45 terminations, configured for slot 3 visit GE Critical Power
J2014001L601 GE Critical Power Compact Power Line Shelves, GP100, 3Φ-480, dual, redundant, I2C shelf configured for 48Vdc output, configured for slot 1, hardware and shelf interconnect included visit GE Critical Power
J2014001L601A GE Critical Power Compact Power Line Shelves, GP100, 3Φ-480, dual, redundant, I2C shelf configured for 54Vdc output, configured for slot 1, hardware and shelf interconnect included visit GE Critical Power
J2014001L401 GE Critical Power GP100, 3&934;-480, RS485 communications, add-on stand-alone shelf, configured for slot 3, hardware and shelf interconnect included visit GE Critical Power
PIM400K6Z GE Critical Power PIM400 Series; ATCA Board Power Input Module, -36 to -75 Vdc; 400W/10A, I2C Digital Interface & Short pins (3.68mm) visit GE Critical Power
AXA016A0X3-SR12 GE Critical Power 12V Austin SuperLynxTM 16A: Non-Isolated DC-DC Power Module, 10Vdc –14Vdc input; 0.75Vdc to 5.5Vdc output; 16A Output Current, 100Ω Resistor between Sense and Output Pins visit GE Critical Power

pin configuration of 7474 ic

Catalog Datasheet MFG & Type PDF Document Tags

pin DIAGRAM OF IC 7474

Abstract: ic 7474 pin diagram delay time for reliable operation. T Y PE 7474 74L S 74A 74S 74 NOTE: T Y P IC A L f , AX 25M H z 33M , and -0 .4 m A i|L PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 4 10 Roi I , Signetics 7474, LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification Logic , e t (R D) are asynchro nous active-LO W inputs and operate independently of the Clock input. Infor m ation on the D ata (D) input is trans ferred to th e Q output on th e LO W -toH IG H transition of the
-
OCR Scan
pin DIAGRAM OF IC 7474 ic 7474 pin diagram 7474 ic pin configuration IC 7474 pin configuration pin IC 7474 logic ic 7474 pin diagram 7474N 74S74N N741S 1N916 1N3064

14 pin ic 7404

Abstract: sn 7404 n ic diagram diagram of ( l) a r e a + 12 V Ri = lk f i C, = 5 0 0 p F CK Q D Q L 1 I ( System Configuration , IC l IC 2. 5.6 IC 3 IC4 IC 7. 8.9 SN 74132 SN 74107 SN 7404 SN 7474 SN 74161 OS Vss NC NC Vss , CCD Linear Image Sensor LZ2019 LZ2019 Description 2048-bit CCD Linear Image Sensor Pin , . Output non-uniformity ± 10% of Vqut MAX 3. 2048 photoelements on a single chip ; Photo ele ment size 14 , Inspection machines 8. 22 pin dual-in-line package (CERDIP) Block Diagram SHARP 452 CCD Linear
-
OCR Scan
14 pin ic 7404 sn 7404 n ic diagram pin configuration of ic 7404 7404 ic diagram ic 7474 with timing diagram IC 7404 pin diagram

14 pin ic 7404

Abstract: pin DIAGRAM OF IC 7474 ' OS' J\ ( ti>40ns t5>10ns Enlarged diagram of (l)area System Configuration Example lkn -y^i DO-H , one output amplifier. â  Features 1. Dynamic range 1000 TPY. 2. Output non-uniformity ±10% of Vout , to facsimile machines, optical character readers, and Inspection machines 8. 22 pin dual-in-line package (CERDIP) â  Block Diagram LZ2019 Pin Connections 452 SHARP» SHARP ELEK/ MELEC DIV 1SE 0 I 0100710 000157b Ml CCD Linear Image Sensor 1SE O I 0100710 0001575 ¿J T-41-55 LZ2019 Pin Description Pin
-
OCR Scan
CI 7474 IC 7474 ic 74132 pin DIAGRAM OF IC 7404 CI 74107 pin configuration of 7474 ic L12-1-2

ic 7483 BCD adder

Abstract: 9N01 operation is perform ed on the negative going edge o f the clock pulse. LOG IC SY M B O L 4 10 3 11 LOG IC D IA G R A M 93176/54176, 74176 Pin nu m b ers are show n fo r D IP o n ly . CO , PHILIPS FAIRCHILD PIN FOR PIN REPLACEMENT 9N74, 7474 9390,7490 9391,7491 9375,7475 9N76, 7476 9393,7493 , Function Type No. Description Number of Bits t pd ns 9380 9304 93H183 9382 9383 9340 93 L 40 9341 93S41 , divide-by-tw o and divide-by-five configuration, or in the bi-quinary mode. The 9 3 1 77/54177, 74177 can be
-
OCR Scan
ic 7483 BCD adder 9N01 ic 7483 full adder function of ic 7490 IC 7490 pin configuration 9N03 93S42 93L24 93S62 93H87 93S05 93S10
Abstract: . Phase Input: The phase input terminal, pin 18, controls the direction of the current through the motor , terminal (pin 11) provides a means of continuously varying the cur­ rent for situations requiring , determined by the reference voltage together with the value of the external sense resistor Rs (pin 16). , until a current reverse command is given. By reversing the logic level of the phase input (pin 8 , Schottky Commutating Diodes Wide Range of Current Control 5-1000mA Wide Voltage Range 10-45V Designed -
OCR Scan
UC1717 UC3717 UC3717S UC3717N UC1717J UC1717SP

pin diagram of ic 6116

Abstract: pin DIAGRAM OF IC 7474 JEDEC standard pin configuration - 32-pin PDIP package - 32-pin PLCC package The M8720 is a , 27C020, with the added advantages of electrical erasability and onboard 12.75 volts MTP programmability , both DIP and surface mount packages. The DIP package is a 32-pin molded dual-in-line package. The surface mount package is a 32-pin PLCC package. Package & Pin Configurations A17 PGM# 32L PDIP , , Preliminary- Product Brief Package Information 32-pin PDIP Package 32-pin PLCC Package Page 3
Acer Laboratories
Original
pin diagram of ic 6116 ACER LABORATORIES INC flash 32 Pin PLCC 2mbit Acer Laboratories EPROM 27020 features of ic 7474 M8720BRF02

full adder using ic 74138

Abstract: full adder using Multiplexer IC 74151 be reduced by an order of magnitude depending on the system configuration. Power requirements can be , contains some 17 logic func tions most of which are MacroFunctions. The overall configuration of the chip , capable of implementing up to 2100 equivalent gates of custom and conventional logic. · Pre-programmed to contain 14 MSI TTL functions for user evaluation. · May be erased for other uses upon completion of , Advanced CHMOS circuitry features low power, high performance, and high noise immunity · Includes 68-pin
-
OCR Scan
full adder using ic 74138 full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 EP1800JC-EV1 EP1800 0UT20 0UT21 OUT22 0UT23

ALi M6759 A1

Abstract: ALI M6759 Configuration. Pin Name VDD GND P0.7-P0.0 No. (PLCC) Type Description 44 IN Power supply for internal , l l l l 8051 instruction set compatible 8 bit microcontroller 8051/8052 compatible pin out Complete static design, wide range of operation frequency from 1 ~ 40 MHz Large on-chip memory ² 64K , programming 44 pin PLCC or QFP package General Description The M6759 is an 8032/8052 instruction , the feasibility for general control systems in a variety of applications. Further more, the firmware
Acer Laboratories
Original
ALi M6759 A1 ALI M6759 M6759 A1 7474 pin out diagram 8052 basic external DIAGRAM OF IC 7474 1830-B 6759DS02

8052 basic

Abstract: 7474 pin out diagram compatible 8 bit microcontroller 8051/8052 compatible pin out Complete static design, wide range of , : 8 bit MTP Micro-controller Pin Configuration T2EX T2 NC VCC AD0 AD1 AD2 AD3 P1.4 P1 , accordingly, as shown in Pinout Configuration. Pin Name VDD GND P0.7-P0.0 No. (PLCC) Type Description , consumption ROM Code Protection 4.5V~5.5V operation voltage, 12V programming 44 pin PLCC or QFP package , in a variety of applications. Further more, the firmware can be protected by user-defined security
-
Original
7474 pin configuration 7474 pin diagram INTERNAL DIAGRAM OF IC 7474 8052 pin structure 3030 micro controller 7474 14 PIN

TC430

Abstract: external DIAGRAM OF IC 7474 speed-up capacitors. ORDERING INFORMATION Part No. TC430C PA TC430IJA TC430M JA Package 8-Pin Plastic 8-Pin CerDIP 8-Pin CerDIP Temperature Range 0 °C to +70°C - 2 5 ° C t o +85°C - 55°C to + 1 25°C PIN CONFIGURATION d ig ita l r r GROUND INPUT [ 2 LL TC430 T ] nc 3 »0 1 © VssE n , Diode Driver Differential Line Driver PIN Diode Driver Level Shifting Driver FUNCTIONAL DIAGRAM V DD , designed so the rising edge of one output crosses the 50% point of the transition within 5 ns of the other
-
OCR Scan
teledyne tsc QGD73 Q0073 74S74

RETICON ccd

Abstract: IC TTL 7404 features as th e S TAN D ARD -D , but has a m axim um data rate of 10 M H z and slightly reduced dyna m ic , 10 11 13 ] VDD 12 ] GND â'" 1 Figure 1. Pinout Configuration * (Pin 17 is N/Cfor RL0256D , to device substrate (pin 6) w ith a DC bias voltage of +12V 3G3D73Û OOOMSÃb 627 -25°C , pixels of each video output are ignored Symbol DRp.p Parameter Min D ynam ic range 1 , Il ^ 1 -II E G r G R E a LT IC - _ O D Series Linear Family N
-
OCR Scan
RETICON ccd IC TTL 7404 L0256D L0512D L1024D L2048D RL0512DAG-011 RL0512D

pin DIAGRAM OF IC 7474 d flip flop

Abstract: western digital FD1771 . external IC's but suffers in performance due to the necessity of the processor to service the F01771 every , Sector ~ector 1-128 "7 gap 2 Cyclic (17 Number U'flytn Hedundancy of lero's (flO of Check ·(CRC) Datd Data Adcll"';S' Bytes) Data .gap 3 Data 1 1 1.1 1 1 0 0 , Data Address Mark Introduction The FD 1771 is a MOS/LSI device that performs the function of interfacing a processor to a' flexible (Floppy) diskette drive. This single chip replaces nearly 80% of the
-
Original
pin DIAGRAM OF IC 7474 d flip flop western digital FD1771 ic D flip flop 7474 digital ic 7474 internal circuit diagram fd1771 74ls161 counter FD1771 D1771

ic D flip flop 7474

Abstract: IC 7474 truthtable PLHS501. A typical 7474 type of edge-triggered D flip-flop requires 6 NAND gates as shown in Figure 7 , generating, say for the PLHS501, a gate equivalent of the part in an optimistic functional configuration , assessing fit is to isolate functions and identify the correct configuration in terms of gates, to allow direct tally of the gates used, to generate the proposed configuration. Table 3 may assist in doing , INTRODUCTION TO PROGRAMMABLE MACRO LOGIC DESIGN CONCEPTS Programmable Macro Logic (PML), an extension of
Philips Semiconductors
Original
IC 7474 truthtable philips for ic 7474 7474 D flip-flop circuit diagram PLHS502 IC 7474 flipflop 7474 D flip-flop

logic ic 7676 pin diagram

Abstract: XC6505A when the L-level signal (IC internal circuit shutdown signal) of the CE pin is input. The CL discharge , CHARACTERISTICS 1/24 XC6505 Series PIN CONFIGURATION *The dissipation pad for the USP-6C package should , pin while input voltage is gradually decreased. (* 7) VOUT1 equals 98% of the output voltage when , flowthrough current in the IC internal circuit. The XC6505B type is capable of , to the IC as possible. 3. If the input voltage fluctuates by 1.5 V or more and is at a slope of
Torex Semiconductor
Original
logic ic 7676 pin diagram XC6505A ETR0356-002

eb 102H

Abstract: Controller, Serial/Parallel Ports, Configuration RAM, and Real Time Clock Integrates Variety of System , on the 82304â'™s V G A SU # pin. Also, the 82304 integrates bit 0 of port 3C3H, which is used to , Pin No. I/O FBRTN 41 I SYSTEM FEEDBACK: This input receives the O R of the system , effort, and form factor constraints by replacing 50 IC devices in an equivalent IBM system. The 82304 , programmable timer/counters, two â'8259-likeâ' programmable interrupt controllers, and a variety of system
-
OCR Scan
eb 102H RAMD11

82306

Abstract: 74590 on the 82304's V G A S U # pin. Also, the 82304 integrates bit 0 of port 3C3H, which is used to en a , Integrates Variety of System Status/ Control Ports and Functions Low Power CHMOS Technology/132Pin PQFP Package High-lntegration-The 82304, 82303 and 82077 Floppy Disk Controller Replace 50 IC's in IBM Design Supports I/O Peripherals . . . Keyboard/ Mouse Controller, Serial/Parallel Ports, Configuration , , significantly reduce system cost, design effort, and form factor constraints by replacing 50 IC devices in an
-
OCR Scan
82306 74590 pin configuration of ic 74373 8259 Programmable Peripheral Interface pin diagram of ic 74373 IC 8259 internal pin diagram RAMD12
Abstract: ­ dicate the condition of readiness of de­ v ic e ^ ) to accept data. This pin is TTL compatible. SRQ , 3 BUS9 3BUS8 3 QND 3 BUS7 3 BUS6 3 BUSS 3 8US4 3 BUS3 Figure 2. Pin Configuration 7-469 , 5-11, 23-25 I/O 1 I T/R2 2 I End Or Identify: This pin indicates the end of a m , Figure 5. Talker/Listener Control Configuration Table 3. Mode 0 Pin Description Pin Symbol No. Type , f readiness of device(s) to accept data. This pin is TTL com pati­ ble. Itansm tt Receive 1 D -
OCR Scan
IEEE-488 AFN-00825C AFN-00625C

pin configuration of d flip flip 7474

Abstract: 7474 ic pin configuration S ® N -C h a nn e l M OS T ech n o lo g y PIN CONFIGURATION MRA 1 I CLKINA 2 I CLKOUTA 3 I , e -b it serial data sh ift register. Data moves on the positive edge of th e clo ck, and all clocked in p u ts are designed fo r ze ro -h o ld -tim e (e.g. 7474). A " c lo c k o u t" pin provides gated , 173 SECTION ill DESCRIPTION OF PIN FUNCTIONS PIN NO. 1 NAME MASTER RESET-A SYM BOL , M 8004 is co m p rise d of tw o in d ependent halves, and each half may be operated in the check o r
-
OCR Scan
pin configuration of d flip flip 7474 CRC-32

IC 7400

Abstract: pin DIAGRAM OF IC 7474 d flip flop Start Convert input (pin 1). In this configuration, Status (Start Convert) will go low at the end of a , the AND function of bit (n + 1) and the Status output. Pin 2< 1 Pin 11, 230- Pin 15°- ir~T T T , convert by making the Start Convert input the AND function of Status (IC2) and Status (pin 7) outputs , FEATURES â'¢ 24 Pin Hermetically Sealed Leadless Package â'¢ Fast 13/^sec Conversion Time â , +125 °C Available Fully Screened and Processed to MIL-STD-883, Method 5008. 24 PIN LEADLESS PACKAGE
-
OCR Scan
IC 7400 IC-7400 IC7400 7474 D flip flop free IC TTl 7474 free features of ic 7474 d flip flop MN5610 12-BIT MN5616

truth table for ic 74138

Abstract: 16CUDSLR cycles Elim ination of un u sed gates A utom atic pin and p art assignm ents SALSA logic m inim ization , truth table C om plete sym bol library of basic gates and over 120 TTL m acro functions S u p p o rt for , Easy definition of in p u ts w ith state tables, vector patterns, or predefined patterns State table or , desig n er to choose the m ethods that best suit each design. Figure 1 show s a block d iagram of A+PLUS. A+PLUS includes the A ltera Design Processor (ADP), w hich consists of integ rated m od u les that
-
OCR Scan
truth table for ic 74138 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table
Showing first 20 results.