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SN74LS00N-00 Texas Instruments LS SERIES, QUAD 2-INPUT NAND GATE, PDIP14 visit Texas Instruments
SN74LS00DBR Texas Instruments Quad 2-input positive-NAND gates 14-SSOP 0 to 70 visit Texas Instruments Buy
SN74LS00NE4 Texas Instruments Quad 2-input positive-NAND gates 14-PDIP 0 to 70 visit Texas Instruments
SN74LS00DBRE4 Texas Instruments LS SERIES, QUAD 2-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, SSOP-14 visit Texas Instruments
SN74LS00NSR Texas Instruments Quad 2-input positive-NAND gates 14-SO 0 to 70 visit Texas Instruments Buy
SN74LS00J-00 Texas Instruments IC LS SERIES, QUAD 2-INPUT NAND GATE, CDIP14, Gate visit Texas Instruments

pin configuration 74LS00

Catalog Datasheet MFG & Type PDF Document Tags

74LS00 pin configuration

Abstract: gd74ls04 GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates, jt^ performs the Boolean functions Y = A B or Y=A+B in positive logic. Function Table (each gate) INPUTS OUTPUT A B Y H H L L X H X L H Pin Configuration Vcc 4B 4 A 4 Y 3B , to 150°C 4-3 This Material Copyrighted By Its Respective Manufacturer GD54/74LS00 Recommended , 4-4 This Material Copyrighted By Its Respective Manufacturer GD54/74LS00 Application Example
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GD74LSOO 74LS04 74LS00 pin configuration gd74ls04 74LS00 function table pin configuration 74LS00 74LS00 Electrical and Switching characteristics 74LS04 NOT gate GD54/74LS00 125CC GD74LS04

74LS00 function table

Abstract: pin configuration 74LS00 GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. K performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 14 13 12 11 10 9 3Y 8 , . - 6 5 ° C to 1 5 0 ° C 4-3 GD54/74LS00 Recommended Operating Conditions SYMBOL MIN , -1 1 . 4-4 GD54/74LS00 Application Example Crystal Clock Generator (1) G D74LS00 c
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74LS00 clock frequency D74LS04

IC 74LS00

Abstract: 74LS00 GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 14 4B 13 4A 12 4Y 11 3B 10 3A 9 3Y 8 Function Table (each gate) INPUTS A H , . - 6 5 CC to 1 5 0 ° C 2-45 40HÖ7S7 OOGHnO fib4 GD54/74LS00 Recommended Operating , GD54/74LS00 Application Example Crystal Clock Generator (1) G D 7 4 L S 0 0 c, Frequency (MHz) 1
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IC 74LS00 NAND 74LS00 74ls00 NAND gate 74LS00 application 402B757

ls 7400

Abstract: 7400 signetics TTL -0.4mA l|L. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) _1 2 & v. 3 _4 _S ^ 6 10 _9 , Signetìcs I 7400, LSOO, SOO Gates Logic Products Quad Two-Input NAND Gate Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7400 9ns 8mA 74LS00 9.5ns 1.6mA 74SOO 3ns 15mA ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to + 70°C Plastic , .) PARAMETER TEST CONDITIONS1 7400 74LS00 74S00 UNIT Min Typ2 Max Min Typ2 Max Min Typ2 Max
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ls 7400 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay N7400N N74LS00N N74S00N N74LS00D N74S00D WF07570S

74LS00 function table

Abstract: pin configuration logic symbol 74LS00 1Sul 10Sul 74LS 1LSul 10LSul PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC , Signelics | 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE 7400 74LS00 74S00 TYPICAL PROPAGATION DELAY 9ns 9.5ns 3ns TYPICAL SUPPLY CURRENT (TOTAL) 8mA 1.6mA 15mA ORDERING CODE PACKAGES Plastic DIP Plastic SO COMMERCIAL RANGE VCC = 5 V ± 5 % , 74LS00 Max Min 2.7 0.4 Typ2 3.4 0.35 0.25 -1 .5 0.5 0.4 -1 .5 Max Min 2.7 74S00 UNIT Min Typ2 3.4 0.2
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pin configuration logic symbol 74LS00 specification of 74ls00 logic symbol 74LS00 TTL 74ls00 7400 quad NAND pin configuration 74LS00 fan-out N74SOOD

7400 signetics

Abstract: 74LS00 7400 74S00 Signetics I 7400, LS00, SOO Gates Logic Products Quad Two-Input NAND Gate Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7400 9ns 8mA 74LS00 9.5ns 1.6mA , load (Sul) Is 50^A l|H and -2.0mA l|L, and 74LS unit load (LSul) is 20/iA l|H and -0.4mA l,L. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 1 2 & ^ 3 _« _5 10 IT 12 ^ 11 13 , CONDITIONS1 7400 74LS00 74S00 UNIT Min Typ2 Max Min Typ2 Max Min Typ2 Max HIGH-level OH output
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7400 signetics 74LS00 7400 74S00 TTL 7400 74LS00 DATA tPHL 7400 74LS 7400 LS03Z90S

schematic diagram brushless motor control

Abstract: schematic diagram Permanent Magnet brushless DC m 5 9 10 74LS00 74LS00 74LS00 IN2 IN3 8 3 6 8 IN1 IN2 IN3 , application. SOFTWARE DESCRIPTION Before to discuss about ST52x301 software configuration, it is important to note some HW connections in the schematic. Bit "0" (pin 9) of the parallel port is used to enable , analog input AIN0 (pin 43) is used to read the voltage reference. A voltage between 0 + 2.5 V present on this pin, is converted in the range 0 + 255. External INTerrupt pin (27) is used to read one Hall
STMicroelectronics
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schematic diagram brushless motor control schematic diagram Permanent Magnet brushless DC m ST52X301 permanent magnet synchronous machine schematic diagram Permanent Magnet brushless DC jps inverter AN1113

TTL 74HC00

Abstract: 74LS00 TTL '¢ High noise immunity characteristic of CMOS â'¢ Diode protection on all inputs Pin Configuration 1A [T , GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for opération over Wide temperature ranges to meet in-dustry and military spécifications. Features â'¢ Low Power consumption characteristic of CMOS devices â'¢ Output drive capability: 10 LS TTL
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TTL 74HC00 74LS00 TTL 74hc00 and gates 74HC00 74LS00 gate diagram 5V 74HC00 54/74LS00 000M5L7 00Q42 GD74HC00 GD54HC00

74LS00 pinout

Abstract: 74hc00 and gates '¢ High noise immunity characteristic of CMOS â'¢ Diode protection on all inputs Pin Configuration 1A , GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet industry and military specifications. Features â'¢ Low Power consumption characteristic of CMOS devices â'¢ Output drive capability: 10 LS TTL
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74LS00 pinout 74HC GD74HCT00 GD54HCT00

pin diagram of ic 74ls00

Abstract: M74HC00 A B L L H L H H H L L H H H PIN CONFIGURATION (TOP VIEW) Outline 14P4 14P2P LOGIC DIAGRAM , logic 4000B series while giving high-speed performance equivalent to the 74LS00. Buffered outputs Y , output pin ±25 mA Ice Supply/GND current Vcc, GNID ±50 mA Pd Power dissipation (Note 1) 500 mW
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M74HC00P M74HC00DP M74HC00 pin diagram of ic 74ls00 74LS00 transfer function pin diagram of 74ls00 74ls00 circuit diagram

TTL 74HC00

Abstract: 74HCoo GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet industry and military specifications. Features , . (74HC) â'¢ High noise immunity characteristic of CMOS â'¢ Diode protection on all inputs Pin Configuration 1A EE u 23 vcc 1B Dl 13 4B 1Y IZ HI 4 A 2 A Cl 00 4Y 2B (Z 3B 2 Y [I 3A GMD [I
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74HCoo 74hc00 tphl tplh tPHL 74hc00 74HCT00 74 LS 00 Logic Gates

CD4011 internal diagram

Abstract: of 74ls00 /Hold Circuit 12-Bit A/D 3-State Output Buffer â  40 Pin DIP â  35 kHz Throughput â  Low Power , offered in 40-pin ceramic packages and are specified for operation from 0 °C to 70 °C for commercial , OUTLINE (53.74) 40 21 t 0.800 40 PIN MAX (20.32) 1 20 I â'¢ * i TOP VIEW PIN (1) INDEX , in plastic PIN ASSIGNMENTS PIN FUNCTION PIN FUNCTION 1 CH0/CH0 HI 40 LATCH 2 CH1/CH1 HI 39 MA2 , APPLICATIONS INFORMATION (continued) UNIPOLAR/BIPOLAR CONFIGURATION The HS 9404/HS 9408 - 2 are 20 volt range
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CD4011 HI-509A MUX-24 CD4011 internal diagram of 74ls00 CD4011 equivalent pin configuration cd4011 CD4011 PIN DIAGRAM cd40115 HS9404 HI-508A

74ls163 function table

Abstract: 74LS163 GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature â'¢ Internal Look-Ahead for Fast Counting â'¢ Carry Output for n-Bit Cascading â'¢ Synchronous Counting â'¢ Synchronously Programmable â'¢ Load Control Line â'¢ Diode-Clamped Inputs Pin Configuration Ripple OUTP Carry -â'" vcc OUTPUT qa qb re RR R ENABLE T LOAD R Ripple Qa Carry Output CLEAR CK ENABLE T , . Inhibit CLEAR OUTPUTS ^ Application Example VARIABLE MODULO COUNTER 1/6 74LS04 or 1/4 74LS00 or1/3
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LS163A 74ls163 function table 74LS163 pin configuration 74LS10 1324NS SYNCHRONOUS LOAD CLEAR ENABLE COUNTER 54LS GD54/74LS163
Abstract: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­ dustry and military specifications. Pin Configuration u 1 [T A m vcc [T 73] 4B 1Y [T Tj~| 4A 2A [T TT| 4Y 2B [F ~ 1 3B ÏÃ" 2Y [T ~9~1 3 A GND [T ~8~] 3 Y 1B -
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74ls163 function table

Abstract: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs Ripple Carry Vcc OUTP U T O UTPUTS - â'" -ENABLE O. Qe Qc Qp T LOAD , to inputs of GATE 3 Qc 6 Qa Qc 7 Q b Qc 9 1/6 74LS04 or1/4 74LS00 or1
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4DE6757 000424G

pin diagram of ic 74ls00

Abstract: 74LS00 MODES q DOUBLE-BUFFERED INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q HIGH ACCURACY: Linearity , 24-pin hermetic DIPs. Input coding is Binary Two's Complement (bipolar) or Unipolar Straight Binary , PACKAGE 28-Pin Plastic DBL Wide DIP 28-Pin Plastic DBL Wide DIP 28LD Side Brazed Hermetic Dip 28LD Side , , DAC709) . Indefinite Short to COMMON External Voltage Applied to RF (pin 13 or 14, DAC708) . ±18V External Voltage Applied to D/A Output (pin 1, DAC707; pin 14
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uv 709 16-BIT DAC707JP/KP DAC708/709

74LS00

Abstract: specification of 74ls00 MODES q DOUBLE-BUFFERED INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q HIGH ACCURACY: Linearity , 24-pin hermetic DIPs. Input coding is Binary Two's Complement (bipolar) or Unipolar Straight Binary , PACKAGE 28-Pin Plastic DBL Wide DIP 28-Pin Plastic DBL Wide DIP 28LD Side Brazed Hermetic Dip 28LD Side , , DAC709) . Indefinite Short to COMMON External Voltage Applied to RF (pin 13 or 14, DAC708) . ±18V External Voltage Applied to D/A Output (pin 1, DAC707; pin 14
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74HTC

pin diagram of ic 74ls00

Abstract: IC TTL 74LS00 INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q LOW COST PLASTIC VERSIONS AVAILABLE , are in 24-pin hermetic DIPs. Input coding is Binary Two's Complement (bipolar) or Unipolar Straight , DRAWING NUMBER(1) DAC707JP DAC707KP 28-Pin Plastic DBL Wide DIP 28-Pin Plastic DBL Wide DIP , , DAC709) . Indefinite Short to COMMON External Voltage Applied to RF (pin 13 or 14, DAC708) . ±18V External Voltage Applied to D/A Output (pin 1, DAC707; pin 14
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IC TTL 74LS00 analog devices ic 74LS00 lead side brazed hermetic datasheet of ic 74ls00 op amp 709 DAC707KH

pin diagram of ic 74ls00

Abstract: pin diagram of 74ls00 INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q LOW COST PLASTIC VERSIONS AVAILABLE , are in 24-pin hermetic DIPs. Input coding is Binary Two's Complement (bipolar) or Unipolar Straight , DRAWING NUMBER(1) DAC707JP DAC707KP 28-Pin Plastic DBL Wide DIP 28-Pin Plastic DBL Wide DIP , , DAC709) . Indefinite Short to COMMON External Voltage Applied to RF (pin 13 or 14, DAC708) . ±18V External Voltage Applied to D/A Output (pin 1, DAC707; pin 14
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7407 connection diagram 709b

74LS00

Abstract: DAC707 INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q LOW COST PLASTIC VERSIONS AVAILABLE , are in 24-pin hermetic DIPs. Input coding is Binary Two's Complement (bipolar) or Unipolar Straight , DRAWING NUMBER(1) DAC707JP DAC707KP 28-Pin Plastic DBL Wide DIP 28-Pin Plastic DBL Wide DIP , , DAC709) . Indefinite Short to COMMON External Voltage Applied to RF (pin 13 or 14, DAC708) . ±18V External Voltage Applied to D/A Output (pin 1, DAC707; pin 14
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