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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: internal oscillator; up to 14 Analog-to-Digital Converter (ADC) channels; communication interfaces (SPI , and communication peripherals, these PIC® microcontrollers increase design flexibility with the , channels I2C, SPI, USART Up to two Capture Compare PWM modules Up to four 8-bit Timer (TMR0/TMR2 , Program Address 8-bit 14 Channel ADC VREFTimer 0 W Register Program Counter and Stack Timer 1 Timer 2 ALU AUSART 2X CCP I2CTM/SPI mTouchTM Sensing Solution Peripheral ... | Original |
2 pages, |
368B Capacitive layout DS41341 pic16F723 PIC16F724 PIC16LF72X PIC16LF722 capacitive sensing PIC16f727 ds41328 PIC16F707 PIC16F720 pic16F723A an1171 PIC16LF727 PIC16F72X PIC16F72X PIC16F72X abstract |
| Abstract: 200 ksps. Communication with the device is accomplished with a simple serial interface using the SPI , Converter with Microchip PIC® Microcontroller Devices AN704 AN704 Interfacing Microchip's MCP3201 MCP3201 Analog/Digital , Analog-to-Digital Converter to the PIC® Microcontroller AN842 AN842 Differential ADC Biasing Techniques, Tips and Tricks AN845 AN845 Communicating with The MCP3221 MCP3221 Using PIC® Microcontrollers AN1007 AN1007 Designing with the MCP3551 MCP3551 , SPI 2.7-5.5V 400-520 ±1 8P SO, ST, 14P SO, ST, 16P SO , , , 5OT Product MCP3201 MCP3201 ... | Original |
2 pages, |
MCP3551 MCP3550 COUNTER LED bcd interfacing of 8051 and lcd 4 digit COUNTER LED bcd TC7107 microchip lcd interface with 8051 microcontroller bcd to analog converter lcd interface with 8051 temperature sensor interface with 8051 data acquisition 8051 microcontrollers a to d converter interface with 8051 MCP3550/1/3 MCP3550/1/3 MCP3550/1/3 abstract |
| Abstract: memory, low power 1.8V operation, nanoWatt XLP, 32 MHz internal oscillator, up to 2x SPI/I2CTM & UART , to 2 each: Master SPI/I2C and EUSART support for RS-232/RS-485 RS-232/RS-485, as well as LIN support 5-bit DAC , monitors, such as PowerOn Reset (POR), Brown-out Reset (BOR) and low-power Watchdog Timer (WDT) PIC , Program Counter Up to 1 KB Linear Addressing Up to 3x Comparators with SR Latch 10-bit ADC Up to 17 channels Communications Up to 2x each MI2C, SPI, EUSART mTouchTM Capacitive Sensing ... | Original |
2 pages, |
DS39630 PIC16LF1937 AN1302 PIC16LF1946 555 timer rs232 pic18 RTC QFN 9X9 DS41414 PIC16F1936 PIC16F1937 lcd PIC16F1938 application note 555 timer for stepper motor PIC16F193X pic16lf1947 PIC16F193X/194X PIC16F193X/194X PIC16F193X/194X abstract |
| Abstract: Proteus VSM Virtual PIC® Microcontroller Prototyping with MPLAB® IDE and Proteus VSM © 2005 , systems simulation Allows you to simulate your PIC® MCU together with any analog or digital electronics , Slide 5 The Processor Models A summary of the scope of PIC® MCU models available in Proteus VSM. Well over 100 modeled PIC® MCU variants available: PIC10 PIC10 / PIC12 PIC12 Family: 6 and 8 pin variants , the functionality implemented in Proteus VSM CPU models. PIC® MCU Model functionality: Entire ... | Original |
17 pages, |
SPI protocol instrumentation projects pic counter spi pic microcontroller family pic microcontroller projects PIC10 PIC12 PIC16 PIC18 PIC24 PIC24F microchip power meter proteus vsm datasheet abstract |
| Abstract: MINI-MAX/PIC Single Board Computer Technical Manual Document Revision: 1.03 Date: 06 September , 6. BOARD LAYOUT 12 7. SCHEMATICS 13 WARRANTY: BiPOM Electronics warrants MINI-MAX/PIC , damage to any external devices connected to MINI-MAX/PIC. BiPOM Electronics disclaims all warranties , of this product. © 2004 by BiPOM Electronics. All rights reserved. MINI-MAX/PIC Single Board , 2 1. Overview MINI-MAX/PIC is a general purpose, low-cost, highly reliable, and highly ... | Original |
11 pages, |
microchip pic16f877a uart PIC16F877A Microcontroller with LCD interfacing PIC16F877A with lcd PIC16F877a Programmer circuit diagram PIC16F877A keypad interfacing PIC16F877A circuit programmer pic16f877a manual PIC16F877A lcd keypad interfacing PIC16F877A PIN DIAGRAM DETAILS PIC16F877A SPECIFICATIONS PIC16F877A connect to 16 pin LCD datasheet abstract |
| Abstract: PIC®Microcontrollers with Enhanced Mid-Range Core Building Upon a Foundation of Success , , Microchip continues to invest significantly in 8-bit PIC microcontrollers to provide a broad product portfolio that meets the needs of our existing and future customers. 8-bit PIC Microcontroller Enhanced , among existing Mid-Range PIC MCUs; as well as up or down with PIC12 PIC12, PIC16 PIC16 and PIC18 PIC18 MCUs. All of these result in application longevity, scalability, ease of design and overall versatility. 8-bit PIC ... | Original |
2 pages, |
USART PIC applications PIC18 PIC16 PIC12 microchip pic18 spi DS41375 usart PIC18 PIC16F1XXX PIC12 abstract |
| Abstract: /counter with 8-bit prescaler  Timer1: 16-bit timer/counter with prescaler, can be incremented during SLEEP via external crystal/clock  Timer2: 8-bit timer/counter with 8-bit period register, prescaler , , 1-WDT Yes USART/I2C/SPI 2 Yes 1-16 bit, 2-8 bit, 1-WDT Yes 22 33 USART/I2C/SPI USART/I2C/SPI 2 2 Yes Yes 1-16 bit, 2-8 bit, 1-WDT 1-16 bit, 2-8 bit, 1-WDT Yes Yes 20 20 20 22 22 33 I2C/SPI USART/I2C/SPI I2C/SPI 1 2 1 Yes Yes Yes 1-16 bit ... | Original |
2 pages, |
program motor control with ccs software PIC16C6X PIC16C62B PIC16C62A DS00711 DS00167 DS00104 DS00092 PIC16C6X abstract |
| Abstract: / Compare/PWM (ECCP+) module with PWM steering and a Master Synchronous Serial Port (MI2C,SPI) module with , operation:  3-wire SPI (supports all 4 SPI modes)  I2CTM Master and Slave modes (Slave mode with , /counters with prescaler  1 8-bit timer/counter with 8-bit period register, prescaler and postscaler , Auto-shutdown and Auto-restart Additional Information 8-bit PIC® Microcontroller Solutions Brochure , (Total) (Bytes) (Bytes) ADC Comparators ECCP/ CCP Communication Timers/WDT MI2C, SPI ... | Original |
2 pages, |
555 timer rs232 PIC18F PIC16F690 PWM c programming PIC18F1XK22 PIC18K PIC18LF13K22 pic16f690 pwm output on 2 pins PIC16f690 PIC16F690 PWM C DS51560 DS39630 pic18 icsp SR latch PIC18F1XK22 abstract |
| Abstract: with PWM steering and a Master Synchronous Serial Port (MI2C,SPI) module with software controllable , Synchronous Serial Port (MSSP) module with two modes of operation:  3-wire SPI (supports all 4 SPI modes , Four Timer modules:  3 16-bit timers/counters with prescaler  1 8-bit timer/counter with 8-bit , steering:  Programmable dead time  Auto-shutdown and Auto-restart Additional Information 8-bit PIC , Communication Timers/WDT MI2C, SPI, EUSART MI2C, SPI, EUSART MI2C, SPI, EUSART MI2C, SPI, EUSART ... | Original |
2 pages, |
RS-485 PIC18 PIC18LF14K22 PIC18F1XK22 PIC18F14K22 PIC18F pic18f13k22 DM183032 PIC18f14 PIC18F1XK22 abstract |
| Abstract: external interrupt pins Timer0 module: 8-bit/16-bit timer/counter with 8-bit programmable prescaler Timer1 module: 16-bit timer/counter Timer2 module: 8-bit timer/counter with 8-bit period register (time-base for PWM) Timer3 module: 16-bit timer/counter Secondary oscillator clock option - Timer1/Timer3 , Synchronous Serial Port (MSSP) module Two modes of operation: Â 3-wire SPITM (supports all 4 SPI modes) Â , Capture/Compare/PWM SPI = Serial Peripheral Interface MSSP - - - - - - I2C/SPI I2C/SPI ... | Original |
2 pages, |
counter pic spi ccs compiler C18 usart PIC18F452 USART applications PIC18F452 mhz usart I2C CODE spi flash parallel port pic microcontroller family PIC16XXXX USART PIC master slave PIC18f452 timer0 c18 codes ds39500 PIC18XXXX PIC18XXXX PIC18XXXX abstract |
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| -based microcontrollers incorporating the new high performance PIC16C1XX architecture. The PIC16C1XX architecture is an enhanced RISC core that is upward compatible from MicrochipÂ's Mid-Range PIC12C6XX, PIC14CXXX and PIC16CXXX core and High-End PIC17CXXX core, providing a migration path to higher integration. Microchip will continue to support its current PICmicro architecture along with the new PIC16C1XX Enhanced interrupt control. New PIC16C1XX Enhanced PICmicro Architecture The PIC16C1XX architecture is www.datasheetarchive.com/files/microchip/10/edit/prelease/archive/pr41/index.htm |
Microchip | 21/03/2001 | 26.55 Kb | HTM | index.htm |
| -based microcontrollers incorporating the new high performance PIC16C1XX architecture. The PIC16C1XX architecture is an enhanced RISC core that is upward compatible from MicrochipÂ's Mid-Range PIC12C6XX, PIC14CXXX and PIC16CXXX core and High-End PIC17CXXX core, providing a migration path to higher integration. Microchip will continue to support its current PICmicro architecture along with the new PIC16C1XX Enhanced interrupt control. New PIC16C1XX Enhanced PICmicro Architecture The PIC16C1XX architecture is www.datasheetarchive.com/files/microchip/mchipweb/1010/company/edit/prelease/pr41/index.htm |
Microchip | 05/03/1998 | 23.02 Kb | HTM | index.htm |
| PIC 16C54 16C54 16C54 16C54 (trademark Microchip) processor and MAXIM MAX147 MAX147 MAX147 MAX147 Analog to Digital Converter. It contains /D converter and PIC ; 16C54 16C54 16C54 16C54 uP. System is fully ratiometric and requires no adjustments. ; Displays values ;* DEVICE PIC16C54,XT CHAR EQU 1EH ;shared- lcd char COUNT EQU 1Fh ;loop counter- digit counter ; constants ;din of pic - dout to a/d DOUT EQU 3 ;dout of pic- din to a www.datasheetarchive.com/download/94405818-376268ZC/incline.doc |
Maxim | 21/03/2001 | 26.5 Kb | DOC | incline.doc |
| //////// Standard Header file for the PIC16C73 device //////// #device PIC16C73 #nolist /////////////////////////////// Constants used for SETUP_COUNTERS() #define RTCC_INTERNAL 0 #define RTCC_EXT_L_TO_H 32 #define RTCC used in SETUP_SSP() #define SPI_MASTER 0x20 #define SPI_SLAVE 0x24 #define SPI_L_TO_H 0 #define SPI_H_TO_L 0x10 #define SPI_CLK_DIV_4 0 #define SPI_CLK_DIV_16 1 #define SPI_CLK_DIV_64 2 #define SPI_CLK_T2 3 #define SPI_SS_DISABLED 1 #define INT www.datasheetarchive.com/download/29718095-390939ZC/pr5src.zip (16C73.H) |
Microchip | 11/05/1998 | 47.22 Kb | ZIP | pr5src.zip |
| //////// Standard Header file for the PIC16C76 device //////// #device PIC16C76 *=16 #nolist /////////////////////////////// Constants used for SETUP_COUNTERS() #define RTCC_INTERNAL 0 #define RTCC_EXT_L_TO_H 32 #define RTCC used in SETUP_SSP() #define SPI_MASTER 0x20 #define SPI_SLAVE 0x24 #define SPI_L_TO_H 0 #define SPI_H_TO_L 0x10 #define SPI_CLK_DIV_4 0 #define SPI_CLK_DIV_16 1 #define SPI_CLK_DIV_64 2 #define SPI_CLK_T2 3 #define SPI_SS_DISABLED 1 #define INT www.datasheetarchive.com/download/29718095-390939ZC/pr5src.zip (16C76.H) |
Microchip | 11/05/1998 | 47.22 Kb | ZIP | pr5src.zip |
| */ /*-*/ /* * * QBUS PERIPHERALS * * QBUS registers for HDI16 HDI16 HDI16 HDI16, EFCOP and PIC are defined in a data * structure pointer): * QBUS = (t_qbusIMM*)(QBUS_BASE); pointer to PIC registers * where * #define QBUS Reserved16[3806]; /* Reserved area*/ /* Peripheral Interrupt Controller (PIC) */ VUWord16 elira; /* PIC's Edge/Level-Trig. Irq Priority Reg. A*/ VUByte Reserved17[6]; /* Reserved area*/ VUWord16 elirb; /* PIC's Edge/Level-Trig. Irq Priority Reg. B*/ VUByte www.datasheetarchive.com/download/71675885-484159ZC/an2217sw.zip (msc8101.h) |
Motorola | 12/06/2002 | 253.04 Kb | ZIP | an2217sw.zip |
| */ /*-*/ /* * * QBUS PERIPHERALS * * QBUS registers for HDI16 HDI16 HDI16 HDI16, EFCOP and PIC are defined in a data * structure pointer): * QBUS = (t_qbusIMM*)(QBUS_BASE); pointer to PIC registers * where * #define QBUS Reserved16[3806]; /* Reserved area*/ /* Peripheral Interrupt Controller (PIC) */ VUWord16 elira; /* PIC's Edge/Level-Trig. Irq Priority Reg. A*/ VUByte Reserved17[6]; /* Reserved area*/ VUWord16 elirb; /* PIC's Edge/Level-Trig. Irq Priority Reg. B*/ VUByte www.datasheetarchive.com/download/54087675-484163ZC/an2274sw.zip (msc8101.h) |
Motorola | 12/06/2002 | 523.74 Kb | ZIP | an2274sw.zip |
| ! - The purpose of this release (5.20) is to provide support for the PIC16C72 device and to provide some ). Information specific to the PIC16C72 is included in this document below. All other information herein is . The primary purpose of release 5.10 was to provide simulation support for the PIC16C62, PIC16C620, PIC16C621 and PIC16C622. Version 5.10 also includes enhanced debug support from the .COD file additonal memory support for PIC17CXX family members running in extended microcontroller and www.datasheetarchive.com/download/92754364-391040ZC/sim52000.zip (README.SIM) |
Microchip | 17/04/1998 | 286.98 Kb | ZIP | sim52000.zip |
| ! - The purpose of this release (5.20) is to provide support for the PIC16C72 device and to provide some ). Information specific to the PIC16C72 is included in this document below. All other information herein is . The primary purpose of release 5.10 was to provide simulation support for the PIC16C62, PIC16C620, PIC16C621 and PIC16C622. Version 5.10 also includes enhanced debug support from the .COD file additonal memory support for PIC17CXX family members running in extended microcontroller and www.datasheetarchive.com/download/9058166-392924ZC/sim52000.zip (README.SIM) |
Microchip | 15/05/1998 | 286.98 Kb | ZIP | sim52000.zip |
| * */ /*-*/ /* PERIPHERAL INTERRUPT CONTROLLER (PIC) */ /*-*/ typedef struct { UHWORD elira; // PIC's Edge/Level-Trig. Irq Priority Reg. A VUBYTE reserved1[6]; // Reserved area UHWORD elirb; // PIC's Edge/Level-Trig. Irq Priority Reg. B VUBYTE reserved2[6]; // Reserved area UHWORD elirc; // PIC ; // PIC's Edge/Level-Trig. Irq Priority Reg. D VUBYTE reserved4[6]; // Reserved area UHWORD www.datasheetarchive.com/download/71675885-484159ZC/an2217sw.zip (msc8101.h) |
Motorola | 12/06/2002 | 253.04 Kb | ZIP | an2217sw.zip |