TMS320AV7000 AV7000 TSC5000 TMS320AV7100 AV7100 TMS320AV7110 40-MIPS TSC6000 - Datasheet Archive

 

New DSPs invigorate digital set-top boxes The first single-chip DSP solution for decrypting, decoding and displaying digital

 

SET-TOP BOX New DSPs invigorate digital set-top boxes The first single-chip DSP solution for decrypting, decoding and displaying digital video on a TV is now available from TI. P DS 0 Specifically designed for digital set-top applications, the new TMS320AV7000 TMS320AV7000 series of digital signal processors (DSPs) is compliant with the Digital Video Broadcast (DVB) and Digital Satellite System (DSS) standards used worldwide. The 'AV7000 AV7000 series obsoletes an entire generation of set-top architectures that separate the CPU and transport functions from the audio/video decompression and graphics overlay functions. The 'AV7000 AV7000 architecture integrates these functions along with the NTSC/PAL video encoder, reducing three components to one. Further reduction in system cost results from consolidating the TI's new single-chip DSP Solution for the digital set-top box Tuner ADC Demodulation 16-Mbit SDRAM Audio DAC TI's TMS320AV7000 TMS320AV7000 family of DSPs incorporates: s ARM7T 32-bit RISC CPU (40 MIPS) s Advanced Graphics Accelerator s Traffic Interface Manager s Transport/Decryption s MPEG-2 Video Decoder s Audio Decoder s NTSC/PAL Encoder See SET-TOP BOX on page 2 WIRELESS TI delivers customizable digital wireless baseband platform A new single-chip DSP Solution from TI integrates all the digital baseband functions necessary for the design of digital wireless telephones using any transmission standard. win win win The industry's first standard-independent digital baseband platform helps manufacturers reduce the size, weight, component costs and power consumption in digital cellular phones, digital cordless phones, two-way voice/data pagers and other types of wireless communications systems. At the heart of the digital baseband platform is a high-performance, low-power processing engine - the TMS320C54x digital signal processor (DSP) core. Optimized for high-speed number-crunching functions such as voice coding, channel coding, error correction, equalization, demodulation and encryption, the 'C54x DSP core is approximately 30 percent more MIPS-efficient in wireless applications than comparable DSPs. Also integrated in the platform is a 16bit/32-bit 'c470 microcontroller unit (MCU) based on the ARM7TDMI (ARM ThumbTM) core licensed from Advanced RISC Machines Ltd. The MCU handles general system control, such as mobility management and the man-machine interface. Since the DSP and MCU cores and the Speaker Microphone TMS320C54x DSP Antenna See WIRELESS on page 2 Analog Baseband Device Audio Interface TSC5000 TSC5000 / 6000 ASIC Backplane design design design to VOL. 13 w NO. 8 w DECEMBER 1996 AN UPDATE ON TEXAS INSTRUMENTS SEMICONDUCTORS 10 NORTH AMERICAN EDITION INTEGRATION V7 YOUR REACHTM 'A EXTENDING Receiver RF Interface Synthesizer Power Amp Modulator Speech Code/Decode Error Correction Channel Code/Decode Equalization Demodulation S/W Encryption Driver RF Section ARM7TDMIE Microcontroller Man & Machine Interface Mobility Management Radio Resource Mgt. Connection Management User Display Keyboard SIM Card S/W Digital Baseband Platform Op Amps Switches Regulators TI's Digital Baseband Platform integrates all the digital baseband functions needed for the design of digital cellular and PCS telephones using any transmission standard. MODEMS New x2 modem chip sets speed OEM production By year end, OEMs can get modem reference designs from Texas Instruments that enable systems to deliver twice the performance of today's fastest modems over conventional telephone lines. Based on existing modem chip-set architectures, the chip sets are compliant with 56 kilobits-per-second (kbps) x2TM technology from U.S. Robotics Corp. (USR, Chicago, Illinois) and implemented with a software-programmable digital signal See MODEMS on page 2 What is x2? x2 is a higher speed data communications technology, developed by U.S. Robotics, to take advantage of the changes in today's network systems. It is an asymmetrical technology that allows 56-kbps data rates downstream and 28.8kbps upstream data rates when connecting to central site hubs. Several applications - Internet access, Bulletin Board Services and corporate networks - can take advantage of this higher data rate technology. 2 w INTEGRATION DECEMBER 1996 71 'A V Continued from page 1 multiple banks of memory required in the system into a single 16-Mbit synchronous DRAM. The first member of the 'AV7000 AV7000 series, the TMS320AV7100 TMS320AV7100, integrates a 16-bit/ 32-bit ARM7TTM RISC microprocessor core licensed from Advanced RISC Machines Ltd. The 'AV7100 AV7100 also integrates an advanced graphics accelerator, transport demultiplexer, conditional access and decryption modules, MPEG-2 video decoder, MPEG audio decoder, and NTSC/PAL video encoder with MacrovisionTM copy protection. The 'AV7100 AV7100's transport demultiplexer, conditional access and decryption are optimized for DSS system requirements.Another device, the TMS320AV7110 TMS320AV7110, integrates the same functions but has a DVB-optimized transport demultiplexer and can support exter- DS 00 P SET-TOP BOX The processor performance and graphics capabilities position the 'AV7000 AV7000 architecture well to support future data services currently evolving over the broadband networks. nally the multiple conditional access and decryption implementations used by different service providers. The architecture of the new processors includes features targeted at three distinct needs of DVB- and DSS-compliant digital set-top boxes: greater integration and memory consolidation for reduced system cost; higher CPU performance for more sophisticated applications software; and advanced graphics acceleration for a more intuitive user interface. In addition to integrating three chips into one, the 'AV7000 AV7000 architecture re- duces costs through its Traffic Interface Manager (TIM). This consolidates the memory requirements of each on-chip function into a single bank of memory, providing the flexibility to dynamically allocate system resources. The ARM7T processor's dual instruction set allows on-chip firmware to execute at the full 32-bit performance, while off-chip software can take advantage of the 16-bit mode to greatly reduce the application software memory size and still achieve excellent performance. The 40-MIPS 40-MIPS ARM processor not only supports the TIM and transport demultiplex functions, but also provides over half of its processing power for application software. Combined with on-chip graphics acceleration, the processing performance enables instantaneous response to users. The graphics accelerator supports 256 colors, transparency, blending, sizing and positioning in multiple graphics windows that can be displayed and overlapped simultaneously, providing a larger viewing area for the video and more intuitive access to information on-screen. The processor performance and graphics capabilities position the 'AV7000 AV7000 architecture well to support future data services currently evolving over the broadband networks. TMS320AV7100 TMS320AV7100 sampling is planned for December and TMS320AV7110 TMS320AV7110 sampling for February. Production for both devices is planned for 2Q97, with pricing below $45 in quantities of 100K. w WIRELESS Continued from page 1 logic gates can be programmed to supsamples of a device based on this platport any digital wireless standard, the TI form. "This integrated digital baseband digital baseband platform can be used to platform will support increased functiondesign systems in any region of the ality and performance while reducing world. In order to accelsystem cost and power erate customer time to dissipation of our digital "This integrated market, TI offers a licellular programs," said digital baseband brary of various DSP Yrjo Neuvo, senior vice platform will supand MCU software modpresident, R&D, Nokia. ules, as well as ASIC The TI digital port increased hardware peripherals baseband platform is functionality and that can be licensed to supported by TI's 0.25performance while customers to support micron TSC5000 TSC5000 CMOS reducing system various worldwide stanstandard cell ASIC lidards. brary, enabling designcost and power The DSP and MCU ers to integrate addidissipation of our cores are both supported tional logic functions, digital cellular by extensive suites of TI RAM, ROM and mixedprograms." development tools and signal functions such as are accessible for inphase-locked loops and - Yrjo Neuvo, senior vice presicircuit emulation through analog-to-digital condent, R&D, Nokia an IEEE 1149.1/JTAG verters. At this node, test port. Special on-chip the platform allows sublogic allows simultaneous co-emulation of 2V operation, thereby reducing power both cores with a single set of emulation consumption by 50 percent as compared hardware. This unique, proprietary cowith a conventional 2.7-V system. The TI emulation capability can save designers digital baseband platform will be ported months of development time, speeding in 1997 to the 0.18-micron TSC6000 TSC6000 time to market. library based on TI's 125-million transisThe announcement of the TI digital tor TImelineTM technology, enabling 1-V baseband platform follows an extensive functionality and reducing power conperiod of customer testing. Nokia, sumption by another 75 percent. Europe's largest manufacturer of cellular "With this proven platform, designers phones, for example, has been receiving have the capability to integrate and cus- Two processors, one platform The two core processors in the TI digital baseband platform have been selected for their suitability in wireless communications systems, which demand high performance, low cost and low power dissipation. In the TSC5000 TSC5000 ASIC backplane, the TMS320C54x DSP core operates at 100 MIPS at 2.5 V with accompanying power dissipation of 0.59 mA/MHz. Features include: w Viterbi accelerator w Four internal buses and dual address generators to enable multiple operand operations w 40-bit adder and two 40-bit accumulators to facilitate parallelism w Single-cycle normalization and exponential encoding w Single-cycle instructions including 17-bit unsigned multiplication w Power-down modes The 'C470 RISC MCU core can operate in two modes with 75 MHz of performance: 32bit instructions for faster execution and 16-bit instructions for high code density. The 16bit capability saves a remarkable amount of memory space, helping reduce system costs. The microcontroller is also extremely thrifty in terms of cost and power dissipation. The 0.25-micron version, compatible with the TSC5000 TSC5000 ASIC library and operating at 2.5 V, requires only 2.0 square millimeters on the die (about one-third the size of similar cores) and dissipates only 0.36 mA/MHz. w tomize the entire digital baseband section of their systems on a single chip while also addressing any transmission standard," said Gilles Delfassy, TI Semiconductor Group vice president and worldwide general manager for the Wireless Communications Business Unit. "This capability not only gives designers flexibility, it also helps them speed up the design cycle." The digital baseband platform is ready for current engagements for use in highvolume digital wireless communications designs. w MODEMS Continued from page 1 processor from Texas USR modems are "Based on TI's Instruments. already widely The new 56 kbps installed," said Mike leading DSP techx2 technology uses Hames, vice president nology, we will be traditional telephone Semiconductor Group able to upgrade lines to allow Internet and worldwide manager and on-line services of DSP at TI. "This many of our existusers to download text, alone will make x2 an ing modem archiimage and video data at automatic de facto tectures without twice the speed of standard for Internet any hardware today's 28.8 kbps access equipment." modems. Advanced, Any modem product changes." DSP-based handshaking designed using the TI - Casey Cowell, chairman, CEO, techniques allow TIchip sets, including PC and president of U.S. Robotics based modems to modem cards, external connect over a highly PC modems, and unpredictable assortment of line Internet access equipment, will be backconditions throughout the worldwide wardly compatible to current standards telecom infrastructure. including: V.34 (33.6Kbps) data, V.17 "Any kind of 56 kbps connectivity (14.4Kps) fax and all of the fall backs. requires identical protocols both in the TI's operating-system-independent user's modem and at the Internet service and WindowsTM-based modem chip sets providers [ISPs] where reprogrammable are built around one of the company's TMS320 TMS320 DSP cores. This allows designers to upgrade end equipment with new technology through software reprogrammability both at the host level and at the DSP level, protecting end users against hardware obsolescence. "USR has long depended on programmable TI DSP solutions to give our modems significant performance advantages, and we are pleased to be working with Texas Instruments to bring this new technology to market," Casey Cowell, chairman, CEO, and president of U.S. Robotics. "Based on TI's leading DSP technology, we will be able to upgrade many of our existing modem architectures without any hardware changes. This flexibility is key in bringing x2 to market quickly." TI's OS-independent and Windowsbased modem chip sets are now available directly from Texas Instruments. Pricing is $75 for 10K unit quantities. w INTEGRATION ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ EDITOR SUELLEN PRICE ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ ASSISTANT EDITOR MICHELE ENGLER ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ CONTRIBUTORS JIM INNOCENT MARCIA PICKETT ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ DESIGNER STAN HULEN ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ TI SC LITERATURE INFORMATION: 1-800-477-8924, EXT. 9612 ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ TI INTERNET HOME PAGE: http://www.ti.com ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ Integration is published by the Semiconductor Group of Texas Instruments Incorporated, P.O. Box 655303, Mail Station 8345, Dallas, Texas 75265. TI provides technical assistance as a service to its customers. TI assumes no liability and is not responsible for any technical or applications assistance, customer applications or product design, software performance, third-party product information or for any infringement of patents or rights of others based upon assistance contained in this publication. Please be advised that it is the responsibility of the customer to obtain the most current information about TI products and services. TI warrants its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Further, please be advised that TI semiconductor products are not designed, intended, authorized or warranted to be suitable for use in life-support applications or any other critical applications which could involve potential risks of death, personal injury or severe property or environmental damage. "Extending Your Reach" is a trademark of Texas Instruments Incorporated. INTEGRATION w 7 DECEMBER 1996 MESSAGING NETWORKING Chip set supports FLEX messaging A new two-chip DSP Solution from TI will enable OEMs to rapidly develop messaging devices that conform to the emerging FLEXTM messaging protocol. Targeted at alphanumeric pagers and other embedded wireless messaging applications, the new TMS320FLEX1 TMS320FLEX1 chip set simplifies implementation of the FLEX protocol in these systems by interfacing directly with most receivers and off-the-shelf microcontrollers. As a result, pager OEMs can develop FLEXcompliant products quickly from existing designs with minimal hardware changes. The chip set consists of the TLV5591 TLV5591 FLEX Protocol Decoder, a signal processor that decodes the FLEX messaging protocol transmission, and the TLV5590 TLV5590 A/D Converter, which converts the analog signal from the receiver into a digital signal for decoding by the TLV5591 TLV5591. A complement to the chip set is FLEXstackTM software, designed to facilitate application development. Running on the system processor, FLEXstack handles interchip communications and Wireless messaging system based on TMS320FLEX1 TMS320FLEX1 chip set Receiver TLV5590ED TLV5590ED Microcontroller TLV5591BVF TLV5591BVF FLEX decoder TI's new TMS320FLEX1 TMS320FLEX1 Chip Set interfaces directly with most receivers and off-theshelf microcontrollers for fast redesigns with minimal hardware changes. interprets host commands for the TLV5591 TLV5591, simplifing development of OEM software. FLEXstack is available on Motorola's World Wide Web site at http://www.mot.com/FLEXstack. The new product supports the 1600-, 3200- and 6400-bit-per-second (bps) transmission speeds of the FLEX stan- dard, allowing OEMs to easily migrate their end equipments up the performance path as higher transmission rates are supported by flex service providers. The substantial increase in the number of subscribers per channel can help See FLEX on page 8 CONNECTIVITY Applications include digital consumer electronics such as cameras, televisions, CD players, tape decks and computer peripherals such as printers, scanners, CD ROM drives, hard disk drives, and digital video disk (DVD) drives. GPLynx works with currently available 1394 physical-layer chips to provide speeds of 100 or 200 megabits per second (Mbps). The TSB12LV31 TSB12LV31 GPLynx comes in a 100-pin plastic quad flat pack (PQFP) carrier. It is available now from TI and its authorized distributors. Suggested high speed isochronous data interface resale pricing in quantities of 1,000 is with an integrated data mover for high $9.72. A new GPLynx 1394 Design Kit, volume isochronous data. the sixth from TI, will soon be available. At nearly half the price of TI's precedFor more information , please visit ing generation of link-layer silicon, designour Web site at www.ti.com/sc/1394. w ing with GPLynx is also very affordable. New link-layer added to 1394 product family TI announced a new general purpose IEEE 1394 link-layer chip optimized for use in consumer electronics and computer peripherals. The chip is the industry's first available general purpose 1394 link-layer device with a 8/16-bit interface. The part, designated TSB12LV31 TSB12LV31 and called GPLynx, will make it easier and less expensive to integrate the IEEE 1394-1995 high performance serial bus. GPLynx has a programmable 8- or 16-bit microcontroller interface, making it easily compatible with a wide selection of standard microcontrollers and DSPs used in consumer electronic equipment and computer peripherals. It also incorporates a separate 8-bit, PCI bus-to-cardbus controller complies with PC97 guidelines As the industry's first PC 97compliant CardBusTM controller, Texas Instruments PCI1131 PCI1131 simplifies hardware and software development efforts for designers of PCI bus-based notebook and desktop PCs and offers throughput bandwidth significantly greater than that of other CardBus controllers on the market today. Because TI's new PCI1131 PCI1131 controller meets Microsoft's PC 97 design guidelines for next generation PCs, designers can be assured that the PCI bus-to-CardBus interface will function efficiently with future releases of Microsoft's Windows operating system and Windows-based application programs. The PCI1131 PCI1131 supports two 32-bit CardBus credit-card-size add-in modules that give the PC access to peripheral devices, such as modems, video programming, printers, external video monitors and local area networks. The device will also support 16-bit PCMCIA (Personal Computer Memory Card Industry Association) or PC Card add-in modules. The PCI1131 PCI1131 is TI's second generation CardBus controller. It follows the PCI1130 PCI1130, the industry's first CardBus controller introduced over a year ago. An easy migration path is provided to the PCI1131 PCI1131 from TI's previous generation controllers. All devices in TI's family of CardBus controllers are packaged in 208pin Thin Quad Flat Pack (TQFP) carriers and they are all pin-for-pin compatible with each other. The PCI1131 PCI1131 is available now from TI and its authorized distributors. w TI announces family of Universal Serial Bus interface chips Texas Instruments disclosed the development of the industry's most comprehensive family of Universal Serial Bus (USB) interface chips. Samples of a seven-port USB hub device, the TUSB2070 TUSB2070, and a four-port hub device, the TUSB2040 TUSB2040, are available now. Other initial devices in the product family include a Hub with I2C Interface to enable USB Monitor Control and a Peripheral Interface Controller for use with popular microcontrollers and DSPs. Lastly, a Peripheral Inter- face Macrocell will soon be available such that USB functionality can be easily and rapidly included in Application Specific Integrated Circuit (ASIC) and customizable Digital Signal Processor (cDSP) designs. USB is an emerging industry standard designed for PC peripherals with low-to-medium data transfer requirements. Its 12 Mbps transmission capability provides both asychronous and isochronous (real-time) data transmission over a 4-wire cable. This more than meets the needs of most existing peripherals including keyboards, mice, modems, printers, and digital stereo audio. Additionally, USB supports hot plug-and-play so that adding a peripheral becomes as simple as plugging it into a USB connector. Suggested resale pricing of the TUSB2070 TUSB2070 in quantities of 1,000 is $5.00. Suggested resale pricing of the TUSB2040 TUSB2040 in quantities of 1,000 is $4.10. w TImeline Technology defines the next level of high-speed networking Every day, more than 300 million pages of text are sent over the Internet. Yet to many, those pages creep along at a snail's pace, getting bumped and stalled by network collisions and collapses. Demand for bandwidth - and speed - far exceeds supply. TI's 0.18-micron TImeline TechnologyTM, combined with the company's architectural approach to networking, will enable OEM partners to leap one to two generations ahead with high-speed internetworking products. These products will provide unlimited bandwidth at a much lower price point than today's products. With 0.18-micron TImeline Technology, the advanced traffic management capabilities and sophisticated network management functions required to support thousands-of-gigabits-per-second throughput will be implemented in silicon. These functions have historically been implemented in software. But the performance and sophistication of products that leverage the 0.18-micron technology will require a hardware solution made possible by TImeline integration. TI will use ASIC products, standard products and reusable engineering in the form of system-level core functions to provide these solutions. The TI 0.18-micron technology delivers other significant benefits for networking OEMs. Higher integration reduces the number of components per system, thereby reducing system costs. Power dissipation is significantly reduced. By eliminating heat sinks and other costly thermal management add-ons in the system, TI reduced overall cost. The benefits of the 0.18-micron technology also extend to managers and users of enterprise networks, addressing new network technologies and giving networking devices better feature/value sets, lower cost per port, smaller footprint and simpler management. Initial design engagements employing the TImeline Technology are currently in progress. Samples are scheduled to be available in 1997 with full production targeted for 1998. w 125 million transistors on a With single chip, we put onyour side. time Get to market first with new technology. TI's 0.18-micron TImeline Technology will integrate the performance of 30 high-performance microprocessors on a single chip. For the most advanced integration technology that will reduce design cycles, put TI (and time) on your side. Visit http://www.ti.com/sc/time 8 w INTEGRATION DECEMBER 1996 PRODUCT UPDATE FLEX First self-calibrating precision dual op amp 16-bit analog interface to DSP Solutions The TLC4502 TLC4502 is the first product in a new generation of self-calibrating, precision operational amplifiers. During the calibration procedure, the operational amplifier is removed from the signal path and both inputs are tied to GND. The offset cancellation uses a current-mode digital-to-analog converter (DAC), whose full-scale current allows for an adjustment of approximately ±5mV to the input offset voltage. The TLC320AD56 TLC320AD56 is a 16-bit analog interface circuit (AIC) that is a versatile analog front end for modem and business audio applications. It provides high resolution low-speed signal conversion from analog-to-digital and from digital-to-analog using an oversampling sigma delta technique. The TLC320AD56 TLC320AD56 optimizes TI's world leadership in digital signal processing solutions. The newest member of the family has a glueless interface, via serial port, to the TMS320 TMS320 family of digital signal processors (DSPs) reducing overall system cost and board space. Key features w Self-calibration of input offset voltage to 50mV max (TLC4502A TLC4502A) w Rail-to-rail output voltage swing w Offers significant advantages over chopperstabilized and precision bipolar solutions w High output drive capability (±50 mA) w 300ms typical calibration time w 5V single supply operation w Standard dual op amp pinout; 8-pin SOIC w Specified over commercial (0oC to 70oC) and industrial(-40oC to 85oC) temperature ranges Suggested price per device in quantities of 1,000: TLC4502CDR TLC4502CDR TLC4502ACDR TLC4502ACDR $1.18 $1.28 TLC4502IDR TLC4502IDR TLC4502AIDR TLC4502AIDR Key features w 16 bit sigma delta AIC w Power dissipation: 100 mW (typ), Power down 2.5mW (typ) w Programmable serial port interface w Internal 64X oversampling w THD of 103 dB on ADC, and 96 dB on DAC The TLC320AD56 TLC320AD56 is available in the 28-pin PLCC (plastic lead chip carrier) package and the 48-pin TQFP (quad flat pack) package, and will be available in the 28-pin SOIC package. Suggested retail price in 1K quantities is $4.15. $1.30 $1.41 ARM7T, ARMThumb and Macrovision are trademarks of Advanced RISC Machines, Ltd. Windows is a registered trademark of Microsoft Corporation. x2 is a trademark of U.S. Robotics Corporation. CardBus is a trademark of PCMCIA. Continued from page 7 lower infrastructure costs. The chip set helps systems provide up to five times the battery life of older paging protocol standards, enabling miniaturization and improvements in design because of the smaller batteries required. With support for alphanumeric messages and group pages, the chip set also helps improve signal integrity for greater error protection and positive message termination. Samples of both the TLV5590 TLV5590 A/D Converter and TLV5591 TLV5591 FLEX Protocol Decoder are available now, with volume production planned for January. Purchase of the TMS320FLEX1 TMS320FLEX1 chip set satisfies all FLEX protocol licensing requirements for OEMs. No separate licensing agreement with Motorola is necessary. The TMS320FLEX1 TMS320FLEX1 chip set is $9.80 in 1K quantities. w EXTENDING YOUR REACHTM NORTH AMERICAN EDITION 1 2 3 4 5 6 7 8 t t t t t t t t WCBU Digital Baseband Technical Brief (SPRY006 SPRY006) Wireless Brochure (SPRB115A SPRB115A) TI/USR X2 Product Brief (SPRT134 SPRT134) DCP AV7000 AV7000 Product Bulletin (SCST004 SCST004) MSP 1394 GPLynx Data Sheet (SLLS255 SLLS255) EVM Kits Flier (SLLZ001 SLLZ001) EVM Kits Product Bulletin (SLLM001B SLLM001B) MSP USB Data Sheet (SLLS239 SLLS239) PLEASE PRINT To change your address label or add a friend to the Integration mailing list, check the appropriate box and complete the information, or you may staple your business card here. u u u My address corrections. t t t t t t MSP USB Product Bulletin (SLLT137 SLLT137) MSP Op Amp Product Update (SLOS161 SLOS161) MSP AD56 Data Manual (SLAS101A SLAS101A) PCIbus 1131 Product Bulletin (SCPV002 SCPV002) TMS320FLEX1 TMS320FLEX1 Design Manual (SLWS048 SLWS048) TMS320FLEX1 TMS320FLEX1 Wireless Brochure (SPRB115A SPRB115A) 15 t TMS320 TMS320 DSP Brochure (SPRB118 SPRB118) 9 10 11 12 13 14 to PAID TI's 0.18-micron TImeline Technology TIm opens elin the e door to unlimited bandwidth in networking. Page 7 ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ TITLE ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ COMPANY ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ ADDRESS MAIL STATION ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ STATE ZIP CITY ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ TELEPHONE EXT. AREA CODE I want all TI literature sent to my home address. HOME ADDRESS ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ APT. ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ STATE ZIP CITY Coupon expires 2/1/97 SFY55LXX612R SFY55LXX612R PLEASE CUT ALONG DOTTED LINE Printed at Webworks, Dallas, TX, USA, on recycled paper. VOL. 13 w NO. 8 w DECEMBER 1996 design design ­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­­ NAME Addition of friend. SSFN013 SSFN013 DALLAS, TEXAS PERMIT NO. 2758 BULK RATE U.S. POSTAGE To order the following TI SC product literature, simply call 1-800-477-8924 ext. 9612. Please allow 2-3 weeks for delivery. AN UPDATE ON TEXAS INSTRUMENTS SEMICONDUCTORS TI's single-chip DSP solution integrates all digital baseband functions needed for digital wireless telephones. Page 1 For TI SC literature, see http://www.ti.com/sc/9612 Mail to: Texas Instruments Incorporated Literature Response Center P.O. Box 172228 Denver, CO 80217 INTEGRATION TI and U.S. Robotics announce protocol for super-fast 56.6-Kbits/s modems. Page 1 The first singlechip solution for the digital set-top box reduces three components to one. Page 1 win Chip set makes developing messaging devices that conform to the FLEX protocol easier for OEMs. Page 7 DSP Solutions from TMS320 TMS320 Third Parties help our customers launch tomorrow's end products today. Special Pullout