NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: the parallel port buffer LSB first and generates a CLK signal (data is sampled by EPCS at rising edge , data byte to the parallel port buffer MSB first and generates a CLK signal (data is sampled by EPCS at , data to the EPCS via the parallel port. The configuration data is programmed into the EPCS using the , .rpd command. as_open() Opens the programming file and initialize the parallel port. as_close() Closes the programming file and close the parallel port. as_program_start () Disables ... | Original |
16 pages, |
EPCS64 EPCS16 EPC128 bbc company EPCS128 format .pof datasheet abstract |
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| Abstract: as_program_byte_lsb() Stores the data byte to the parallel port buffer LSB first, and generates a CLK signal (data , as-program_byte_msb() Stores the data byte to the parallel port buffer MSB first, and generates a CLK signal (data , and sends the data to the EPCS via the parallel port. Configuration data is programmed into the EPCS , control the parallel port for generating signal to the cable. When you execute a program or read , .rpd command. as_open() Opens the programming file and initialize the parallel port ... | Original |
14 pages, |
EPCS64 EPCS16 ByteBlaster MV format .pof datasheet abstract |
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| Abstract: LTC1418 LTC1418 D13 AIN+ S/H 14-BIT 14-BIT ADC 14 AIN 4.096V SELECTABLE SERIAL/ PARALLEL PORT , advertisement 16mW, Serial/Parallel 14-Bit ADC Samples at 200ksps Design Note 180 Chi Fai , 16mW from a single 5V supply. Its pin configurable serial or parallel interface is designed to be , Parallel and Serial Data Output Modes · 1.25LSB 25LSB INL Max and 1LSB DNL Max · Two Input Ranges: 0V to 4.096V , reference, and a digital interface that allows easy serial or parallel interface to a microprocessor ... | Original |
2 pages, |
LTC1418 25LSB 25LSB abstract |
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| Abstract: / PARALLEL PORT BUFFER 8k VREF D3 (SCLK) D2 (CLKOUT) D0 (EXT/INT) TIMING AND LOGIC 2.5V , mode. RD also controls the state of the output buffers. NAP mode is useful for applications that must , max t Parallel and serial data output modes t NAP and SLEEP power shutdown modes t Small , approximation ADC, an on-chip reference and a digital interface that allows easy serial or parallel interface , impedance source avoids additional noise and offset errors that may be introduced by buffering circuitry. ... | Original |
3 pages, |
op amp level shifter LTC1418 25LSB LTC1418 abstract |
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| Abstract: SPI_HOLD I2C FLASH USB MCU Silicon Labs GPIO Control (Parallel Port) Buffer LCD Panel , GPIO Control (Parallel Port) Buffer Buttons LCD Panel USB (DSP Composer) Mic Input , CDB47XXXS CDB47XXXS I2S IN HDR 20 Pin HDR Standard 20 Pin Debug Header (Serial Control & Debug) Buffer , (Serial Control & Debug) Mic Pre-Amp Circuitry Digital Buffer DSP Daughtercard The Chronos , stand-alone applications, and also used to interface to the PC through the USB port (DSP Composer). ... | Original |
86 pages, |
wireless microphone receiver schematics 2ch DAC Cirrus AN333 C8051 CS47048 dvd player schematic DVD player schematic system board along ir header board schematic 20-PIN 3.5mm jack RCA wiring DIAGRAM JIS F05 connectors CS47024 datasheet abstract |
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| Abstract: 24. Advanced Parallel Port Buffer Read Cycle for Forward Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 25. Advanced Parallel Port Buffer Write Cycle for Reverse Transfers . , embedded applications requiring high performance IEEE Std 1284-1994-compliant parallel port interface , IEEE-1284-compliant parallel port interface. The Am29202 Am29202 microcontroller incorporates a complete set of system , Am29202 Am29202 MICROCONTROLLER BLOCK DIAGRAM Parallel Port Control/Status Lines 4 2 Clock/ 10 ... | Original |
77 pages, |
PQB132 IEEE-1284 AM29240 Users Manual Am29240 Am29202 AM29050 Users Manual so do chan IC 74ls374 Am29050 Microprocessor Users Manual Am29202 abstract |
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| Abstract: SELECTABLE SERIAL/ PARALLEL PORT BUFFER D5 D4 (EXTCLKIN) D3 (SCLK) D2 (CLKOUT) D1 (DOUT) D0 , buffer. It also inhibits conversion when it is tied high. In power shutdown mode (SHDN = low), a high CS , LTC1418 LTC1418 Low Power, 14-Bit, 200ksps ADC with Serial and Parallel I/O U FEATURES s s s s , and �SB DNL Max Power Dissipation: 15mW (Typ) Parallel or Serial Data Output No Missing Codes Over , selectable for 14-bit parallel or serial format. This versatile device can operate from a single 5V or � ... | Original |
28 pages, |
TC02 LTC1418 LT1357 74HC244 shift register LTC1418 abstract |
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| Abstract: SELECTABLE SERIAL/ PARALLEL PORT BUFFER D5 D4 (EXTCLKIN) D3 (SCLK) D2 (CLKOUT) D1 (DOUT) D0 , LTC1418 LTC1418 Low Power, 14-Bit, 200ksps ADC with Serial and Parallel I/O U FEATURES s s s s , and �SB DNL Max Power Dissipation: 15mW (Typ) Parallel or Serial Data Output No Missing Codes Over , selectable for 14-bit parallel or serial format. This versatile device can operate from a single 5V or � , Medical Instrumentation The flexible output format allows either parallel or serial I/O. The SPI ... | Original |
28 pages, |
LTC1418I 74HC244 shift register fft algorithm LTC1418 LTC1418ACG LTC1418ACN LTC1418C 127 HC14 F12b LTC1418 abstract |
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| Abstract: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.6. Parallel Port . . . . , Parallel port read and write cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . Parallel Port EPLD and Wrapping Area . . . . . . . . . . , , D an 8bit parallel port, D a JTAG port, D an expansion connector for daughter boards Please , Ethernet 10BaseT/AUI Daughter Board TSC701DB TSC701DB SPARCmon VT100 VT100 Terminal Parallel Port 2xRS232 ... | Original |
52 pages, |
ADP27 1206 cms diode MAX238 MB86960 minidin-8 mkds PG110 sparclet smd diode L45 S5933 tsc701 MB86960APF-G pia7 1206 cms red EA1 SMD 1206 TSC701 TSC701 TSC701 abstract |
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| Abstract: tions. It features 0.25LSB 25LSB INL max and 1LSB DNL max, parallel and serial data output modes and NAP and , virtual-ground inputs of the LTC1562 LTC1562 sum parallel paths to obtain two notches in the stopband of a lowpass , temperature and time. Linear Technology Magazine · February 1998 OUTPUT BUFFER 16 16 LOW DRIFT ... | Original |
36 pages, |
WIMA MKP 4 LT1308 LT1317 LT1533 LTC1068-200 LTC1418 LTC1427-50 LTC1562 LTC1604 LTC1632 mbro520l Switch 582 Series Lamp Code F40 103 chip resistor Rohm lt1558 datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| ,000 character data buffer Switch selectable IEEE address The Parallel488 provides transparent conversion parallel port on a PC can communicate with an IEEE printer or plotter via the Parallel488. Conversion parallel port, see the Personal488/NB . Specifications Parallel Connector with metric studs Buffer: 24,000 characters Indicators: LEDs for IEEE Talk and Listen, parallel Information Description Part No. Parallel/IEEE converter with 24K data buffer Parallel www.datasheetarchive.com/files/iotech/iotechca/docs/wcd00000/wcd000c2.htm |
Iotech | 16/12/1998 | 5.65 Kb | HTM | wcd000c2.htm |
| Parallel Port and IDE Interface [Discontinued] PC87322VF PC87322VF PC87322VF PC87322VF Product Folder (Super I/O III) Floppy Disk Controller with Dual UARTs, Enhanced Parallel Port PC87322VF PC87322VF PC87322VF PC87322VF (SuperI O(TM) III) Floppy Disk Controller with Dual UARTs, Enhanced Parallel Port, and IDE incorporates a Floppy Disk Controller (FDC), two full function UARTs, an enhanced parallel port, and IDE 16550s. The bidirectional parallel port maintains complete compatibility with the ISA, EISA and Micro www.datasheetarchive.com/files/national/pf/pc87322vf.html |
National | 17/02/2005 | 6.01 Kb | HTML | pc87322vf.html |
| number of bytes (or less) from the serial port * * Params: * Input: buf Buffer to store - is a string which specifies which serial * and parallel ports are to be * *parname - returns the device name of the chosen parallel port * If either of these is NULL the parallel port is in use * * Params: * Input: Nothing * * Returns: * OK Unix_IsParallelInUse(void); /* * Function: Unix_OpenParallel * Purpose: open the parallel port www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| National P/N PC87383 PC87383 PC87383 PC87383 - Legacy-Reduced SuperI/O with Fast Infrared Port, Serial Port Parallel Port I/O with Fast Infrared Port, Serial Port Parallel Port and GPIOs for Portable Applications Generic P Controller (FDC) No IEEE 1284 Compliant Parallel Port Yes Serial Port () 1 Serial Fast Infrared Port, Serial Port Parallel Port and GPIOs for Portable Applications 894 Kbytes 13-Jan Infrared port (FIR, IrDA 1.1 compliant), Serial Port, Parallel Port and General-Purpose Input/Output (GPIO www.datasheetarchive.com/files/national/pf/pc87383.html |
National | 17/02/2005 | 11.6 Kb | HTML | pc87383.html |
| Parallel Cable III Parallel Cable III The Parallel Cable III is a cable assembly which contains a buffer to protect your PC's parallel port and a set determined solely by the speed at which the host PC can transmit data through its parallel port interface. Using the Parallel Cable III requires a PC equipped with an AT compatible parallel port interface and a Parallel Cable III and its FPGA flying lead wires. Figure 3.5 Parallel Cable III and FPGA Flying Leads www.datasheetarchive.com/files/xilinx/docsan/hug/hug3_3.htm |
Xilinx | 12/11/1998 | 6.4 Kb | HTM | hug3_3.htm |
| 1284 Parallel Port and IDE [Not recommended for new designs] Please enable Javascript in your 3.3V/5V SuperI/O with Floppy Disk Controller, Dual UARTS, Infrared, IEEE 1284 Parallel Port and IDE compatible parallel port and all the necessary control logic for an IDE interface. Standard PC-AT® address baud rates and one port also supports IrDA and the HP SIR compliant signaling protocol. The parallel port is fully IEEE 1284 level 2 compatible. The SPP (Standard Parallel Port) is fully compatible with www.datasheetarchive.com/files/national/htm/nsc03986-v2.htm |
National | 16/09/1998 | 10.17 Kb | HTM | nsc03986-v2.htm |
| Floppy Disk Controller, Dual UARTS, Infrared, IEEE 1284 Parallel Port and IDE [Not recommended for new 3.3V/5V SuperI/O with Floppy Disk Controller, Dual UARTS, Infrared, IEEE 1284 Parallel Port and IDE UARTs, an IEEE 1284 compatible parallel port and all the necessary control logic for an IDE interface signaling protocol. The parallel port is fully IEEE 1284 level 2 compatible. The SPP (Standard Parallel Port) is fully compatible with ISA, EISA and MicroChannel parallel ports. In addition to the SPP, EPP www.datasheetarchive.com/files/national/htm/nsc06354.htm |
National | 18/12/1998 | 10.39 Kb | HTM | nsc06354.htm |
| , Infrared, IEEE 1284 Parallel Port and IDE , IEEE 1284 Parallel Port and IDE Generic P/N 87334VJG 87334VJG 87334VJG 87334VJG Contents General Description Features , an IEEE 1284 compatible parallel port and all the necessary control logic for an IDE interface signaling protocol. The parallel port is fully IEEE 1284 level 2 compatible. The SPP (Standard Parallel Port) is fully compatible with ISA, EISA and MicroChannel parallel ports. In addition to the SPP, EPP www.datasheetarchive.com/files/national/docs/wcd00002/wcd002c5.htm |
National | 03/04/1998 | 9.46 Kb | HTM | wcd002c5.htm |
| , Infrared, IEEE 1284 Parallel Port and IDE , IEEE 1284 Parallel Port and IDE Generic P/N 87334VLJ 87334VLJ 87334VLJ 87334VLJ Contents General Description Features parallel port and all the necessary control logic for an IDE interface. Standard PC-AT® address decoding baud rates and one port also supports IrDA and the HP SIR compliant signaling protocol. The parallel port is fully IEEE 1284 level 2 compatible. The SPP (Standard Parallel Port) is fully compatible with www.datasheetarchive.com/files/national/docs/wcd00002/wcd002c6.htm |
National | 03/04/1998 | 9.15 Kb | HTM | wcd002c6.htm |
| /10/13 19:21:10 neilj Exp $ // // Parallel Port Driver Interface Functions // For use with Win ; //-*/ // IO Port offsets from base for parallel port functions open(); void close(); int GetParallelPorts( DWORD port_index ); BOOLEAN WRTransfer address containing the installed port IO addresses ; //-*/ // Only legal port IO address on PC98 machine www.datasheetarchive.com/download/61910581-995887ZC/xapp058.zip (basjdrvif.h) |
Xilinx | 02/08/2001 | 2994.42 Kb | ZIP | xapp058.zip |