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Part Manufacturer Description Datasheet BUY
DC392A-A Linear Technology LTC1628 or LTC3728 Evaluation Kit visit Linear Technology - Now Part of Analog Devices
DC392A-C Linear Technology LTC1628 or LTC3728 Evaluation Kit visit Linear Technology - Now Part of Analog Devices
DC392A-B Linear Technology LTC1628 or LTC3728 Evaluation Kit visit Linear Technology - Now Part of Analog Devices
LF198AJ8 Linear Technology IC SAMPLE AND HOLD AMPLIFIER, CDIP8, Sample and Hold Circuit visit Linear Technology - Now Part of Analog Devices
LF198S Linear Technology IC SAMPLE AND HOLD AMPLIFIER, PDSO, Sample and Hold Circuit visit Linear Technology - Now Part of Analog Devices
LF198AS Linear Technology IC SAMPLE AND HOLD AMPLIFIER, PDSO, Sample and Hold Circuit visit Linear Technology - Now Part of Analog Devices

pMOS NAND GATE

Catalog Datasheet MFG & Type PDF Document Tags

nmos pmos array

Abstract: list of n channel fet device. Since it takes two pairs to make a two input -NAND gate, this area has the potential of making , il A300 Analog/Digital Gate Array DESCRIPTION The Acumos A300 is a high performance analog/digital gate array. The gate array can perform analog and/or digital functions. The gate array is silicon gate construction using a double-poly p-well process. The minimum gate channel length is 4 microns , '" 12V V Internal gate prop delay - less than 5ns V Output sink current per transistor 6 mA V Op amps
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acumos

Abstract: list of n channel fet input -NAND gate, this area has the potential of making 200 two input NAND gates. Due to interconnect , il A300 Analog/Digital Gate Array DESCRIPTION The Acumos A300 is a high performance analog/digital gate array. The gate array can perform analog and/or digital functions. The gate array is silicon gate construction using a double-poly p-well process. The minimum gate channel length is 4 microns , '" 12V V Internal gate prop delay - less than 5ns V Output sink current per transistor 6 mA V Op amps
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mc 4011

Abstract: Mc 4049 Input NOR Gate + Inverter HD-4000 CD4000 Quad 2 Input NOR HD-4001 CD4001 MM4601 Dual 4 Input NOR HD , HD-4007 CD4007 4-Bit Full Adder HD-4008 CD4008 Quad 2 Input NAND HD-4011 CD4011 MM4611 Dual 4 Input NAND HD-4012 CD4012 MM4612 Dual D Flip-Flop HD-4013 CD4013 MM4613 8 Stage Static Shift Register , Divide by 8 Counter HD-4022 CD4022 MM4622 Triple 3 Input NAND HD-4023 CD4023 MM4623 7 Stage Binary , -4043 CD4043 Quad Three State NAND R/S Latch HD-4044 CD4044 Hex Buffer, Inverting HD-4049 CD4049 MM4649 Hex
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CD4017 CD4018 CD4024 CD40106 MC14584 mc 4011 Mc 4049 MC14584 "cross reference" 4049 schmitt trigger HD-4002 CD4002 MM4602 HD-4006 CD4006 MM4606

74C901

Abstract: 74C902 /BUFFERS/INVERTERS Dual 3 Input NOR Gate + Inverter Quad 2 Input NOR Dual 4 Input NOR Quad 2 Input NAND Dual 4 Input NAND Triple 3 Input NAND Triple3 Input NOR Hex Inverter Quad 2 Input AND 8 Inputs NAND Quad 2 Input OR Quad 2 Input Exclusive OR Quad AND-OR Select Dual Complementary Pair + Inverter Hex Buffer/Converter, Inverting Hex Buffer/Converter, Non-Inverting Hex Inverting PMOS Buffer Hex , Non-Inverting TTL Buffer HD-74C902 Hex Inverting PMOS Buffer HD-74C903 Hex Non-Inverting PMOS Buffer HD
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HD-80C95 MM74C221 HID-4025 74C901 74C902 74C221 74C904 80C97 Multivibrator 4001 HD-74C173 HD-74C174 HD-74C175 HD-74C192 HD-74C193 HD-74C195

74C10

Abstract: CD40106 PIN OUT GATES/BUFFERS/INVERTERS Dual 3 Input NOR Gate + Inverter Quad 2 Input NOR Dual 4 Input NOR Quad 2 Input NAND Dual 4 Input NAND Triple 3 Input NAND Triple3 Input NOR Hex Inverter Quad 2 Input AND 8 Inputs NAND Quad 2 Input OR Quad 2 Input Exclusive OR Quad AND-OR Select Dual Complementary Pair + Inverter Hex Buffer/Converter, Inverting Hex Buffer/Converter, Non-Inverting Hex Inverting PMOS Buffer Hex Non-Inverting PMOS Buffer Three State Hex Buffer Three State Hex Buffer HD-4000 HD
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HID-4002 CD4069 HD-74C20 HD-74C30 74C10 CD40106 PIN OUT 74C20 74C14 74C32 74c164 D-4011 HID-4012 HID-4023 HD-4030

74C32

Abstract: 74C02 HD-54C/74* SERIES MANUFACTURER CROSS REFERENCE FUNCTION Quad 2 Input NAND Quad 2 Input NOR Hex Inverter Quad 2 Input AND Triple 3 Input NAND Hex Schmitt Trigger Dual 4 Input NAND 8 Input NAND Quad 2 Input OR BCD to Decimal Decoder BCD to 7 Segment Decoder Dual J-K Flip-Flops with Clear , MM74C160 MM74C161 MM74C162 MM74C163 MM74C164 Di - 2 GATES/BUFFERS/INVERTERS Dual 3 Input NOR Gate + Inverter Quad 2 Input NOR Dual 4 Input NOR Quad 2 Input NAND Dual 4 Input NAND Triple 3 Input NAND
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HD-74C02 HD-74C151 MM74C107 74C02 74C89 74C30 74C165 74C04 74C107 HD-74C00 HD-74C04 HD-74CO8 HD-74C1I0 HD-74C1I4

TTL 7400

Abstract: 4000 series CMOS Logic levels 18 - 24v the circuit in question. Take, for example, a four input NAND gate being used as a two input gate , current load such as a lamp or a relay. So, tying unused NAND gate inputs to VCC (Ground for NOR , . MM74C20 Four Input NAND gate age required will be determined by the maximum frequency of operation of , . Typically, the static power dissipation is 10 nW per gate which is due to the flow of leakage currents. The , , gate dissipation at 1 MHz with a 50 pF load is less than 10 mW. Second, the propagation delays
Fairchild Semiconductor
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TTL 7400 4000 series CMOS Logic levels 18 - 24v 7400 series CMOS Logic ICs CV2f 7400 TTL CMOS TTL Logic Family Specifications

TTL 7400 national semiconductor

Abstract: TRANSISTOR 6019 Take for example a four input NAND gate being used as a two input gate The internal structure is , transistors would be on So tying unused NAND gate inputs to VCC (Ground for NOR gates) will enable them but , ) a TL F 6019 ­ 11 FIGURE 3-1 MM74C20 Four Input NAND gate 4 supply voltage AC and DC , dissipates low power Typically the static power dissipation is 10 nW per gate which is due to the flow of , time but typically gate dissipation at 1 MHz with a 50 pF load is less than 10 mW Second the
National Semiconductor
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AN-77 TTL 7400 national semiconductor TRANSISTOR 6019 power transistor transistors equivalents C1995 CD4000A

nand gate layout

Abstract: ATL35 defined as a two input NAND or, in Atmel's library, a NAN2. A NAN2 uses four transistors. For each gate , , each gate array routing site contains four transistors, two NMOS and two PMOS. Transistors are , accurate equivalent two input NAND gate count, the netlist from Synopsys can be analyzed using v3h (a , yields a precise equivalent two input NAND gate count. ATL35 Cell Library-1.0-12/97 To determine , . 7-2 Gate Count Estimation
Atmel
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nand gate layout ATL60

OPA03

Abstract: DMILL possibility to use 4 different active devices, i.e. NMOS, PMOS, NPN Bipolar and PJFET. With regards to , (4.0x0.8) and PMOS (8.0/0.8) Rev. B ­ 24-Aug-01 1 DMILL Table 1. DMILL basic parameters , 17.5 nm Gate oxide thickness EField 470 nm Gate oxide thickness Ecapa 42.0 nm Gate oxide thickness RP+ 118 /square P+ resistivity RP- 3550 /square P , gate resistivity R M1 0.050 /square Metal 1 resistivity R M2 0.040 /square
Atmel
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OPA03 DMILL SUN SENSOR 65260 npn nv SRAM cross reference atmel 830

OPA02

Abstract: OPA03 Grounded gate NMOS transistors / Specific Poly-contact spacing / > 4000V Output Buffer NMOS & PMOS , use 4 different active devices, i.e. NMOS, PMOS, NPN Bipolar and PJFET. With regards to advanced , (4.0x0.8) and PMOS (8.0/0.8) Rev. 4169B­AERO­08/01 1 Table 1. DMILL basic parameters Parameter , 17.5 nm Gate oxide thickness EField 470 nm Gate oxide thickness Ecapa 42.0 nm Gate oxide thickness RP+ 118 /square P+ resistivity RP- 3550 /square P
Atmel
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OPA02 hep silicon diode 128 x 1 multiplexer calorimeter sensor CIRCUIT BGP02 BGP01

4000 series CMOS Logic ICs

Abstract: TTL 74ALS 9/7/2011 ©2011, CE Department 12 dce 2011 TTL NAND Gate · LOW State 9/7/2011 ©2011, CE Department 13 dce 2011 TTL NAND Gate · HIGH State 9/7/2011 ©2011, CE Department 14 dce 2011 TTL NAND Gate · Current-Sinking and Current Sourcing 9/7/2011 ©2011, CE Department 15 dce 2011 TTL NAND Gate · Totem-Pole Output ­ Advantage · Low , Department 33 dce 2011 Complementary MOS Logic · CMOS NAND Gate 9/7/2011 ©2011, CE
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4000 series CMOS Logic ICs TTL 74ALS CMOS 4000 Series family TTL nand gate 74 Series Logic ICs TTL SERIES 74AS 4000B 74HC/74HCT

3 input or gates TTL

Abstract: cmos XOR Gates HT3A CMOS Low Cost Gate Array General Features · · · · · · · · 5µm LOVAG CMOS , low power 32kHz Cell Libraries · · · · Basic gates ­ Inverting x1, x2, x3 ­ NAND 2 , and reset Special cells ­ Power on reset ­ RC oscillator ­ Schmitt trigger ­ High impedance PMOS ­ High impedance NMOS HT5D 0.8µm CMOS High Speed Gate Array General Features · · · · · · · · 0.8µm single poly, double metal CMOS technology Sea of gate architecture Operating
Holtek
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3 input or gates TTL cmos XOR Gates XOR GATES Nand gate Crystal Oscillator 4-input nand gates ttl HTA3000 HT3A000 HT3A100 HT3A200 HT3A300 HT3A400

0.5 MIETEC CMOS

Abstract: on-chip gate delay â'¢ Speed: Up to 25 M H z operation (Commercial Temp. Range) â'¢ Pow er , custom LSI circuits. Due to smaller die sizes, standard cell parts can be more economical than gate , , speed, and electrical characteristics, resulting in a reduction in unit costs over gate arrays while , entire circuit is automatically interconnected. Unlike gate arrays, only those cells and interconnects , ). .1 . 8 . . 8 . . 40 x 84.8 2-Input nand
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0.5 MIETEC CMOS AD081 DA081 MTC-2010

HX2000

Abstract: HMX2000 Characteristics Maximum gate count and I/O Typical delay ­ 2 input NAND I/O interface levels Typical power consumption, W/MHz/gate Operating temperature range Minimum Geometry Analog supply level NMOS/PMOS Vt , MIXED SIGNAL SOI GATE ARRAYS HMX2000 FAMILY Features Fabricated on Honeywell's RICMOSTM IV , digital gate arrays - Sea-Of-Gates flow around embedded cells - Memory, A/D, D/A and other cores available Up to 275,000 gates useable Typical gate toggle power 0.6 W/MHz/gate Analog on SOI provides
Honeywell
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HX2000 nmos pmos array honeywell SOI CMOS IC AND GATE TTL family

cmos XOR schmitt trigger

Abstract: 5D208 impedance PMOS ­ High impedance NMOS 14th Aug '97 HT5D 0.8µm CMOS High Speed Gate Array HT-5D Series · · · · · · · · 0.8µm single poly, double metal CMOS technology Sea of gate architecture Operating voltage 5V Propagation delay 0.3ns for 2-input NAND with fanout=2 Output driving , HT3A COMS Low Cost Gate Array General Features · · · · · · · · 5µm LOVAG CMOS , x1, x2, x3 ­ NAND 2inputs, 3inputs, 4inputs, 5inputs ­ NOR 2inputs, 3inputs, 4inputs, 5inputs
Holtek
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5D048 5D100 5D208 cmos XOR schmitt trigger 8 bit XOR Gates D flip flop AOI gate d flip flop 0.8um cmos 5D080 5D092 5D124 5D144

8pin dual gate driver

Abstract: udn5713m interface devices â'¢ Inputs compatible with DTL/TTL, PMOS, and CMOS â'¢ 300 mA output sink current capability per gate â'¢ High sustaining voltage: 80 volts â'¢ Hermetically-sealed packages to MIL-M , -pin Dual In-Line H QUAD NAND DRIVER QUAD NOR DRIVER Veci 1 lj \2_ J4l n" n* cC jT"] |~6_ Vl [~7 , DUAL AND DRIVER UDN-5711M/H UDS-5711H UDS-5711H MIL DUAL NAND DRIVER DWG. NO. 4-9790 UDN-5712M/H
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UDS-5703H UDS-5706H UDS-5707H UDS-5733H 8pin dual gate driver udn5713m A-9788 A-9798 quad nand MIL-M-38510 MIL-STD-883 16-PIN UDN-5703A/H UDN-5706A/H

HBC2500

Abstract: N03E 5ns NAND Gates, 22ns D-flipflops, 1MHz - 20MHz UGBW Op Amps with 1mV - 5mV Offsets, 250ns Comparator , 7/3 7/3 3/10 3/10 3/20 3/20 10/3 10« 3/30 3/30 40/3 40/3 DIGITAL PRIMITIVES: 2-INPUT NAND GATES , /3 3/3 7/3 7/3 16/3 16« 16/3 16/3 im 28/3 16/3 16/3 DIGITAL PRIMITIVES: 3-INPUT NAND GATES , 21/3 7/3 7/3 16/3 16/3 DIGITAL PRIMITIVES: 4-INPUT NAND GATES NA4E01 NA4E11 50)1 50)1 87)1 87 n 5V , ANALOG CELL: OP-AMP; PMOS INPUT; CLASS AB OUTPUT AMP017 328.5(1 200(1 VDDA COMPARATORS ANALOG CELL
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HBC2500 N03E 3-input xnor opamp 555 USE OF TRANSISTOR transistor 2955

C04-013

Abstract: CMOS 4000B series rca HCT10, a triple 3-input NAND Gate, are being driven by a TTL device with a 50% duty cycle. Given the , technologies is shown in Fig. 7, In the o r« < Û . oc < z 90 30 · figure, a 2-input NAND gate is used to , . Application Notes QUAD 3 INPUT NAND GATE D U A L FLIP F LO P FREQUENCY (H i , illustrate this discussion. In the quiescent state, either the PMOS or NMOS transistor is fully off, and , the PMOS and NMOS transistors of the input stage, Fig. 1(a), being on, at least to some degree, at the
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C04-013 CMOS 4000B series rca 74 HC Series ICs C04013 74ls10 IC 92CS-37090 SSD-290

ad654 spice

Abstract: DARLINGTON TRANSISTOR ARRAY P OP O O S H S MWU M LA T P M NM OS (ENHANCEM ENT) v ./ ' IM L N PA T NMOS PMOS , V Process MOSFETs NMOS Bvdss V to BJTs B V Ce o Beta PMOS > 10V +0.75 V > 10V , with 2to 3-|a design rules and 500-A gate ox­ ide for ±5-volt supplies, and one with 5-^. design rules and 1000-A gate oxide for ± 15-volt supply circuits. distortion levels below - 7 5 dB. Gate , SOURCE GATE DRAIN SILÃX PNP BIPOLAR TRANSISTOR \\ r pou T5ZTC EJ DRAIN CATE
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ad654 spice DARLINGTON TRANSISTOR ARRAY AD75019
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