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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: module for single fiber communications by using 1310 nm transmitter and 1490 nm receiver. This module , Transmitter 1490 nm Receiver 1550 nm Video Block Distance Up to 40 km Industry Standard 1 x 9 Footprint , * Transmitter Specifications (0 oC < Topr < 70 oC, 3.13V < Vcc < 3. 47V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc ... | Original |
4 pages, |
IEC-60825 GR-253-CORE BTR-5840G BTR-5840-SPG BTR-5840G abstract |
| Abstract: module for single fiber communications by using 1310 nm transmitter and 1490 nm receiver. This module , Transmitter 1490 nm Receiver 1550 nm Video Block Distance Up to 40 km Industry Standard 1 x 9 Footprint , * Transmitter Specifications (0 oC < Topr < 70 oC, 3.13V < Vcc < 3. 47V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc ... | Original |
4 pages, |
IEC-60825 GR-253-CORE BTR-5840G BTR-5840-SPG 532 nm laser diode BTR-5840G abstract |
| Abstract: performance module for single fiber communications by using 1310 nm transmitter and 1490 nm receiver. This , Transmitter 1490 nm Receiver 1550 nm Video Block Distance Up to 20 km Industry Standard 1 x 9 Footprint , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical ... | Original |
4 pages, |
IEC-60825 GR-253-CORE BTR-5820G BTR-5820AG BTR-5820A-SPG BTR-5820-SPG datasheet abstract |
| Abstract: performance module for single fiber communications by using 1310 nm transmitter and 1490 nm receiver. This , Transmitter 1490 nm Receiver 1550 nm Video Block Distance Up to 20 km Industry Standard 1 x 9 Footprint , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical ... | Original |
4 pages, |
IEC-60825 GR-253-CORE BTR-5820G BTR-5820AG BTR-5820A-SPG BTR-5820-SPG BTR-5820G abstract |
| Abstract: receiver section uses an integrated InGaAs detector preamplifier (IDP) mounted in an optical header and a , * Transmitter Specifications (0 oC < Topr < 70 oC, 3.13V < Vcc < 3.47V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical ... | Original |
5 pages, |
TRM-5101G TRM-5101AG 5101a TRM-5101G abstract |
| Abstract: receiver section uses an integrated InGaAs detector preamplifier (IDP) mounted in an optical header and a , * Transmitter Specifications (0 oC < Topr < 70 oC, 4.75V < Vcc < 5.25V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical ... | Original |
5 pages, |
TRM-5001G TRM-5001AG TRM-5001G abstract |
| Abstract: * Transmitter Specifications (0oC < Topr < 70oC, 4.75V < Vcc < 5.25V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical signal +5V dc power for the receiver section +5V dc power for the transmitter section See recommended ... | Original |
5 pages, |
TRS-5240G IEC-60825 TRS-5240G abstract |
| Abstract: * Transmitter Specifications (0 oC < Topr < 70 oC, 4.75V < Vcc < 5.25V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical signal +5V dc power for the receiver section +5V dc power for the transmitter section See recommended ... | Original |
4 pages, |
TRM-3002G TRM-3002AG TRM-3002G abstract |
| Abstract: * Transmitter Specifications (0 oC < Topr < 70 oC, 3.13V < Vcc < 3.47V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical signal +3.3V dc power for the receiver section +3.3V dc power for the transmitter section See ... | Original |
4 pages, |
TRM-3102G TRM-3102AG TRM-3102G abstract |
| Abstract: * Transmitter Specifications (0 oC < Topr < 70 oC, 3.1V < Vcc < 3. 5V) Parameter Optical Optical Transmit , * CONNECTION DIAGRAM Receiver Signal Ground 1 (Rx GND) Receiver Data Out 2 (RD+) Receiver Data Out Bar 3 (RD-) Signal Detect 4 (SD) Receiver Power Supply 5 (Rx Vcc) Transmitter Power Supply 6 (Tx Vcc , circuit schematic See recommended circuit schematic Active high on this indicates a received optical signal +3.3V dc power for the receiver section +3.3V dc power for the transmitter section See ... | Original |
5 pages, |
TRS-33120G TRS-33120AG IEC-60825 TRS-33120G abstract |
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| tranceivers n Plesiochronous mode operation l transmitter and receiver clock frequencies may differ by .1 Interface diagram FC Protocol Device Test FC106 FC106 FC106 FC106 receiver TX[0:9] REFCLK 10 RBC[0:1] RX[0:9] 10 diagram 3.2 Input latches The transmitter accepts 10-bit wide TTL parallel data at inputs TX[0:9]. The of the transmitter is sent to the TX+ and TX- output pins, and the input of the receiver is driven EWRAP is high, the output of the transmitter is sent directly to the input of the receiver. 3 www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5990.htm |
STMicroelectronics | 20/10/2000 | 42.21 Kb | HTM | 5990.htm |
| n Plesiochronous mode operation l transmitter and receiver clock frequencies may differ by up to .2 8/32 September 98 3.1 Block diagram Figure 3.1 Block diagram 3.2 Input latches The transmitter internal clocks. These are required by the transmitter section to perform its function, and by the receiver 3.2 Schematic diagram of serial I/O 1.5 K W 1.5 K W V ss RX+ V ss RX- TO DESERIALIZER Receiving Chip internal Rc V ss V ss 0 W NONE R > 1 . 5 K W R o u t = 1 0 0 W R c = 1 0 0 W receiver transmitter Rs = 0 W www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5990-v2.htm |
STMicroelectronics | 14/06/1999 | 38.4 Kb | HTM | 5990-v2.htm |
| transmitter and receiver clock frequencies may differ by up to 100 ppm n Integrated Fibre Channel 8b/10 diagram FC Protocol Device Test FC106 FC106 FC106 FC106 receiver TX[0:9] REFCLK 10 RBC[0:1] RX[0 = 1 0 0 W R c = 1 0 0 W receiver transmitter Rs = 0 W Rs = 0 W R c = 1 5 0 W receiver transmitter- Rs = 25 W Rs = 25 W R > 1 . 5 K W R o u t = 1 5 0 W R c = 1 5 0 W receiver transmitter Rs www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5990-v3.htm |
STMicroelectronics | 25/05/2000 | 40.25 Kb | HTM | 5990-v3.htm |
| n Plesiochronous mode operation l transmitter and receiver clock frequencies may differ by up to .2 8/32 September 98 3.1 Block diagram Figure 3.1 Block diagram 3.2 Input latches The transmitter internal clocks. These are required by the transmitter section to perform its function, and by the receiver 3.2 Schematic diagram of serial I/O 1.5 K W 1.5 K W V ss RX+ V ss RX- TO DESERIALIZER Receiving Chip internal Rc V ss V ss 0 W NONE R > 1 . 5 K W R o u t = 1 0 0 W R c = 1 0 0 W receiver transmitter Rs = 0 W www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5990-v1.htm |
STMicroelectronics | 02/04/1999 | 38.44 Kb | HTM | 5990-v1.htm |
| reference frequency ranges • Transmitter, receiver and transceiver modes • Clean-up loop back mode • Line ENRX Input Enable receiver input ENTX Input Enable transmitter input ENTXSC Input Enable serial clock both sides in I/O banks 2, 3, 6, and 7 of the FPGA. Figure 5: Transmitter Timing Diagram Clk ClkX4 -to-parallel interfaces differently in the transmitter and receiver modules (RPMs). Receiver The TZA transceiver edge. Figure 9: One-bit Receiver Block Diagram RxClk Clock0 Clock180 DCM + DPS RxData Clock0 region www.datasheetarchive.com/download/35631323-996047ZC/xapp764.zip (xapp764.pdf) |
Xilinx | 27/05/2004 | 9655.66 Kb | ZIP | xapp764.zip |
| as an IrDA receiver or transmitter - see chapter 4.3.2 User Interface. 4.2 MSP430x112 Software transmitter device. If you enter a "^r" the unit behaves as a receiver and sends an acknowledgement #21; 5 Schematic 13#21; 6 Conclusion 14#21; 7 Appendix 15#21; A Software Listing #19; PAGEREF _Toc429445136 \h .1 IrDA and UART Frames #19; PAGEREF _Toc428773448 \h #1;#20;6 Figure 4.1 Block diagram of the IrDA Module #19; PAGEREF _Toc428773453 \h #1;#20;11 Figure 4.5 IrDA Initialization Acknowledge - Receiver #19; PAGEREF _Toc www.datasheetarchive.com/download/70239872-851306ZC/slac004.zip (an_ird~1.doc) |
Texas Instruments | 26/08/2008 | 1265.49 Kb | ZIP | slac004.zip |
| as an IrDA receiver or transmitter - see chapter 4.3.2 User Interface. 4.2 MSP430x112 Software transmitter device. If you enter a "^r" the unit behaves as a receiver and sends an acknowledgement #21; 5 Schematic 13#21; 6 Conclusion 14#21; 7 Appendix 15#21; A Software Listing #19; PAGEREF _Toc429445136 \h .1 IrDA and UART Frames #19; PAGEREF _Toc428773448 \h #1;#20;6 Figure 4.1 Block diagram of the IrDA Module #19; PAGEREF _Toc428773453 \h #1;#20;11 Figure 4.5 IrDA Initialization Acknowledge - Receiver #19; PAGEREF _Toc www.datasheetarchive.com/download/53750527-922161ZC/slac004.zip (an_ird~1.doc) |
Texas Instruments | 24/06/2003 | 1265.49 Kb | ZIP | slac004.zip |
| B (27-4-94 ) SCC2698B SCC2698B SCC2698B SCC2698B Octal Universal Asynchronous Receiver/Transmitter (OC) (27 ) UDA1325 UDA1325 UDA1325 UDA1325 Board Diagram (Solder Side) UDA1325 UDA1325 UDA1325 UDA1325 Schematics UDA1335 UDA1335 UDA1335 UDA1335 (CDUSC) (1-2-89 ) Using a Philips Optical Receiver in CATV Applications (19-5-00 ) Using a Philips Optical Receiver in CATV Applications (17-9-01 ) Using Flash memory and PCS1900 PCS1900 PCS1900 PCS1900 50Mb/s fiber optic receivers (1-12-88 ) 51LPC 51LPC 51LPC 51LPC www.datasheetarchive.com/files/philips/appnotes/index-v1.html |
Philips | 14/02/2002 | 137.64 Kb | HTML | index-v1.html |
| 2698B 2698B 2698B 2698B (27/4/94 ) SCC2698B SCC2698B SCC2698B SCC2698B Octal Universal Asynchronous Receiver/Transmitter (OC) (27 ) UDA1325 UDA1325 UDA1325 UDA1325 Schematics UDA1335 UDA1335 UDA1335 UDA1335 Board Diagram (Component Side) UDA1335 UDA1335 UDA1335 UDA1335 Board Diagram (Solder Side) UDA1335 UDA1335 UDA1335 UDA1335 Schematics UHF CIRCULATORS Philips Optical Receiver in CATV Applications (17/9/01 ) Using Flash memory with the XA amplifier for DCS1800 DCS1800 DCS1800 DCS1800 and PCS1900 PCS1900 PCS1900 PCS1900 50Mb/s fiber optic receivers (1 www.datasheetarchive.com/files/philips/appnotes/index.html |
Philips | 24/04/2003 | 171.31 Kb | HTML | index.html |
| . Figure 20 illustrates the internal schematic of the receiver portion of both chips. The receiver has a are not used, high frequency en - ergy could be coupled between transmitter and receiver causing ST | DIGITAL AUDIO INTERFACE RECEIVER Datasheet DIGITAL AUDIO INTERFACE RECEIVER STA120 STA120 STA120 STA120 STA120D STA120D STA120D STA120D Document Format Size Document Number Date Format MONOLITHIC CMOS RECEIVER 3.3V SUPPLY VOLTAGE LOW-JITTER, ON-CHIP CLOCK RECOVERY 256x www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/7311.htm |
STMicroelectronics | 20/10/2000 | 35.27 Kb | HTM | 7311.htm |