NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: parallelo M2400 M2400 è un modulo di ingresso / uscita per il funzionamento nel sistema Lightbus II/O con 16 , 2. Descrizione del funzionamento software I 4 port D0 . D3 corrispondono ai byte di dati nel , cavi di fibre ottiche fino alle scatole adiacenti non dovrebbe superare 45 m nel caso di fibre ottiche in plastica e 600 m nel caso di fibre ottiche in vetro. Questi valori valgono solo se nella posa dei , oppure un valore richiesto nel campo -1V a +1V regolabile con un potenziometro trimmer. Il pilotaggio ... | Original |
15 pages, |
Z1000 nel d32 - 45 M2400 800H M2400 abstract |
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| Abstract: : NEL - D32 - 48. Maker : NEC 7. OPTICAL DATA Ta=25°C VDD=5.0V VEE=-13.0V VDD-V0=15.3V ITEM SYMBOL ... | OCR Scan |
10 pages, |
a1820 C180-W620-A2 HITACHI LCD MODULE LC7981 LC7982A hitachi electronics SP12N001 NEL D32 50 SP12N001-T NEC 2703 7B64PS SP12N001-T-3 SP12N001-T abstract |
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| Abstract: 32 A 50 A 50 A LC1D25 LC1D25 and D32 LRD1522 LRD1522 23Ð"28 A 40 A 63 A 63 A LC1D25 LC1D25 and D32 LRD1530 LRD1530 25Ð"32 A 40 A 63 A 63 A LC1D25 LC1D25 and D32 LRD1532 LRD1532 17Ð"25 A 32 A ... | Original |
50 pages, |
LUCM12BL LC1K0910BD LADS2 LC1-D50 LP2K09 LR9-F5369 LUA1C110 LUCM05BL GV3-ME40 LC1D09 schneider VCF01 LC1K0910P7 VBF02 LC1-D18 LC1-D38 datasheet abstract |
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| Abstract: ingombro indicate nel presente catalogo si potranno ritenere impegnative solo dopo conferma da parte di , SACE è in prima fila nel dedicare consistenti risorse al raggiungimento degli obiettivi di sviluppo , garantisce che l'azienda è socialmente responsabile e si impegna nel rispetto dell'etica dell'intero ciclo , nel perseguimento delle politiche di miglioramento della gestione ambientale, mediante la , in fase iniziale la valutazione e il miglioramento delle prestazioni ambientali dei prodotti nel ... | Original |
548 pages, |
NEL D32 49 1STC802001D0905 2CSC400229F0001 abb f3-ar CEI EN 60947-2 ABB EP C S TNS 275 schemi circuiti elettronici 2CSC400002D0903 ABB E 257 C30-230 2CSC400002D0903 abstract |
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| Abstract: 195 - - With touch panel - - 240 - - Model Weight (g,typ.) NEL - D32 - 49 - NEL - D5 - 006 - Power supply (V) + 5.0 - + 12.0 - 75 - 160 ... | Original |
16 pages, |
SP521P l1672 MSM5219B seiko LCD MODULE g2436 SP505P G1216 L4044B1P000 L2462000000 l2462 lcd l1682 SP531P SP516P SP511 SP 5001 IC INVERTER datasheet abstract |
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| Abstract: R/W 0, 1 0 = Normal Operation Isolate places the receiver MII chan nel in high impedence , Map PMA Q1-0, Q3-2, Q5-4 D1-0, D3-2, D5-4 Transmitter Receiver [11] 00 CS0 CS1 edge of ... | Original |
24 pages, |
TXD4 RXD4 NEL D32 50 CY7C971 10BASE 100BASE rxd1 100BASET4/10BASET CY7C971 abstract |
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| Abstract: ANSI C63.5 .67 D.3.1 D.3.2 Test scenario ... | Original |
74 pages, |
F-06921 e ac C635 300 ohm 375 KHZ Antenna pyramidal horn antenna acoustic tiles material datasheet abstract |
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| Abstract: Preliminary Data Sheet July 2001 ORCA® ORT82G5 ORT82G5 1.0-1.25/2.0-2.5/3.125 Gbits/s Backplane Interface FPSC Introduction Agere Systems Inc. has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded system-on-chips (SoC) architecture, the ORT82G5 ORT82G5 is made up of backplane transceivers containing eight channels, each operating at up to 3.125 Gbits/s (2.5 Gbits/s data rate), with a fullduplex synchronous int ... | Original |
92 pages, |
TL 2272 R l31c ORT82G5 PAL Encoders STS-48 2262 encoder TL 2262 integrated circuit TL 2272 tl 2262 am 30014 TL 2262 TL 2272 DECODER STS-48/STM-16 STS-192/STM-64 ORT82G5 abstract |
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| Abstract: intel Intel486â„¢ SX MICROPROCESSOR/lntel487TM sx MATH COPROCESSOR IMPORTANT-Read This Section Before Reading The Rest Of The Data Sheet This data sheet describes both the Intel486 SX microprocessor and the Intel487 SX Math Coprocessor. All normal text describes the functionality for both the Intel486 SX microprocessor and the Intel487 SX Math Coprocessor unless explicitly stated otherwise. All sections of the data sheet which describe the Intel487 SX Math Coprocessor functionality only are hi ... | OCR Scan |
217 pages, |
m2 rn t8 1ll microprocessor 8086 opcode sheet 8086 microprocessor pin description ALI 1487 intel 8086 ceramic disc 104 aec capacitors via c7-m BTS 308 MD 2310 SX ami bios 386 SX BYS 045 2202 bts datasheet abstract |
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| Abstract: Data Sheet April, 2002 ORCA® ORT82G5 ORT82G5 1.0-1.25/2.0-2.5/3.125-3.5 Gbits/s 8b/10b SERDES Backplane Interface FPSC Introduction Lattice has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded system-on-chips (SoC) architecture, the ORT82G5 ORT82G5 is made up of backplane transceivers containing eight channels, each operating at up to 3.5 Gbits/s (2.625 Gbits/s data rate), with a fullduplex synchronous interfa ... | Original |
109 pages, |
ORT82G5 TL 2272 R 10gbps serdes TL 2272 30014 Sanyo Denki encoder ORSO82G5 ap13.6 diode 30132 verilog code 16 bit LFSR in PRBS TL 2262 10G BERT TL 2272 DECODER ORT82G5 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| . MAX. a1 0.63 0.025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 D 32.2 1.268 E 15.2 16.68 0 inhibit input to chan- nel input or output. Address input also couple some voltage steps onto the channel www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2058-v2.htm |
STMicroelectronics | 14/06/1999 | 13.28 Kb | HTM | 2058-v2.htm |
| .31 0.009 0.012 b2 1.27 0.050 D 32.2 1.268 E 15.2 16.68 0.598 0.657 e 2.54 0.100 e3 27.94 1 inhibit input to chan- nel input or output. Address input also couple some voltage steps onto the www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2058-v3.htm |
STMicroelectronics | 25/05/2000 | 15.12 Kb | HTM | 2058-v3.htm |
| .45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 D 32.2 1.268 E 15.2 16.68 0.598 0.657 e 2.54 0 voltage level (65 mV typ.) due to the capacitance coupling from inhibit input to chan- nel input or www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2058.htm |
STMicroelectronics | 20/10/2000 | 15.96 Kb | HTM | 2058.htm |
| . MAX. a1 0.63 0.025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 D 32.2 1.268 E 15.2 16.68 0 inhibit input to chan- nel input or output. Address input also couple some voltage steps onto the channel www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/2058-v1.htm |
STMicroelectronics | 02/04/1999 | 13.32 Kb | HTM | 2058-v1.htm |
| $8qIcIZ F.6' CkxZA=# z[xaA#dw;c$D32#5-:%+$uQP(ef0 '6/5+U=28O3W 28O3W 28O3W 28O3W+n 2[O\;:YDIw,PWi) :ZE#5-:%+L )/s eG.8*U[9$!77*d39>!8Y#5q].le7'(3'V2,_3+H(Z '6/52U 6/52U 6/52U 6/52U=26O3W2n 2 -ujV$,Q+h$z F.6' C5xZA=# z[xaA#dw;c$D32#m-[1-;7'(>'v0 ' '6/5+'>2/j# Z'XAa#DW;C$d32#M-[1-;7'(>'V0 '6/5+U=28O-W 28O-W 28O-W 28O-W+n%2[O\;:YDIw,PW;)/j07X(3/BEL )/s;=U/$#2u:Bv2[o\;:ydiW,pwI) :ze#5-:%+l :> )$A3h:> v$A-+:>%j$A-I:>%Y$A-l:>u2_ www.datasheetarchive.com/download/63467884-917639ZC/scej222.zip (sstu32864e.inc) |
Texas Instruments | 06/08/2011 | 114.85 Kb | ZIP | scej222.zip |
| .025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 D 32.2 1.268 E 15.2 16.68 0.598 0.657 e 2.54 0 transmission. The transmit chan - nel operating mode (Modem main or back channel, DTMF) can only be modified www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1646.htm |
STMicroelectronics | 02/04/1999 | 29.74 Kb | HTM | 1646.htm |
| .025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 D 32.2 1.268 E 15.2 16.68 0.598 0.657 e 2.54 0 transmission. The transmit chan - nel operating mode (Modem main or back channel, DTMF) can only be modified www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1646-v1.htm |
STMicroelectronics | 14/06/1999 | 29.7 Kb | HTM | 1646-v1.htm |
| designed to switch a 64 kbit/s chan- nel (Variable delay mode) or an hyperchannel of data (Sequence Synchro signal delivered by the Multi-HDLC It is possible to switch the contents of 16 D chan- nels www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6723.htm |
STMicroelectronics | 20/10/2000 | 236.97 Kb | HTM | 6723.htm |
| ST | MULTI - HDLC WITH N X 64 SWITCHING MATRIX ASSOCIATED Datasheet MULTI - HDLC WITH N X 64 SWITCHING MATRIX ASSOCIATED STLC5465B STLC5465B STLC5465B STLC5465B STLC5465 STLC5465 STLC5465 STLC5465 Document Format Size Document Number Date Update Pages Portable Document Format 5174 25/06/1999 101 Raw Text Format STLC5465B STLC5465B STLC5465B STLC5465B MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED November 1999 PQ www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5174-v2.htm |
STMicroelectronics | 25/05/2000 | 205.22 Kb | HTM | 5174-v2.htm |
| ST | MULTI - HDLC WITH N X 64 SWITCHING MATRIX ASSOCIATED Datasheet MULTI - HDLC WITH N X 64 SWITCHING MATRIX ASSOCIATED STLC5465B STLC5465B STLC5465B STLC5465B STLC5465 STLC5465 STLC5465 STLC5465 Document Format Size Document Number Date Update Pages Portable Document Format 5174 25/06/1999 101 Raw Text Format STLC5465B STLC5465B STLC5465B STLC5465B MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED November 1999 PQFP160 PQFP160 PQFP160 PQFP160 (Plastic Quad Flat Pack) ORDERING NUMBE www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5174.htm |
STMicroelectronics | 20/10/2000 | 212.74 Kb | HTM | 5174.htm |