500 MILLION PARTS FROM 12000 MANUFACTURERS
500 MILLION PARTS FROM 12000 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| TMS320F28033P1PAGS | Texas Instruments | MICROCONTROLLER | 
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| LM3S2793-IBA80-C5 | Texas Instruments | MICROCONTROLLER |
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| LM3S2793-IBA80-C5T | Texas Instruments | MICROCONTROLLER |
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| Part | Manufacturer | Description | Last Check | Distributor | Ordering |
| MICROCONTROLLER, 16-BIT, 20 MH | INTEL | REEL / SEC PKG | 4 (Sep 2016) | New Advantage | |
| Catalog Datasheet | MFG & Type | Document Tags |
| Abstract: 4-1 PSD4XX Family Key Features (Cont.) t Low power operation is achieved by using a Power , the clock to the ZPLD. Also available is an automatic power down mode using the ALE signal. A Sleep , into standby mode. t Power management unit with automatic standby and sleep modes. t Security mode , microcontroller SRAM and also to store backup information that is necessary after a system power down. Backup , input (CSI) to the peripheral device, the PMU includes an Automatic Power Down unit (APD) that will ... | Original |
97 pages, |
683XX 68HC11 68HC16 80196 MEMORY INTERFACE APD Arrays cmos 4000 series databook PIN DIAGRAM OF 80186 logic cmos 4000 family PSD413A2 signal conditioning circuit for pt100 psd4xx 80196 internal architecture diagram intel 80c196 microcontroller motorola power transistor to-126 4000 SERIES MOTOROLA DATABOOK MC1 4000 SERIES MOTOROLA DATABOOK CMOS 4000 Series family databook TEXT |
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| Abstract: 7-1 PSD4XX Family Key Features (Cont.) t Low power operation is achieved by using a Power , the clock to the ZPLD. Also available is an automatic power down mode using the ALE signal. A Sleep , into standby mode. t Power management unit with automatic standby and sleep modes. t Security mode , microcontroller SRAM and also to store backup information that is necessary after a system power down. Backup , input (CSI) to the peripheral device, the PMU includes an Automatic Power Down unit (APD) that will ... | WaferScale Integration Original |
98 pages, |
PSD413A2 68HC16 68HC11 683XX psd4xx intel 80c196 microcontroller TEXT |
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| Abstract: clock to the ZPLD. Also available is an automatic power down mode using the ALE signal. A Sleep mode is , can automatically switch into standby mode. Power management unit with automatic standby and sleep , Select input (CSI) to the peripheral device, the PMU includes an Automatic Power Down unit (APD) that , . I/O pin 2. ZPLD I/O pin* 3. Latched Address Out - A6 Multiple functions 1. Automatic Power Down , Programmable Peripheral PSD4XX Family Field-Programmable Microcontroller Peripherals Key ... | OCR Scan |
100 pages, |
WSI MagicPro II Programmer 68HC11 68HC16 683XX TEXT |
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| Abstract: Applications · Telecom (WiMAX, Power Amplifiers, Optical Switches) · Automatic Test Equipment (ATE) · LED , , operating from a rectified universal AC input to generate an isolated 48 Vdc output bus with power factor , rate Input current (peak) Source line frequency range Power factor Input inductance, maximum Input , , unless otherwise noted. See associated figures for general trend data. Power Factor vs. Load and VIN , 0.90 0.88 0.86 0.84 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 Efficiency (%) Power Factor ... | Vicor Original |
20 pages, |
Vicor 37052-601 PF175B480C033FP-00 TEXT |
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| Abstract: non-multiplexed) microcontrollers that is easy to use. The part's integration, small form factor, low power , , the Automatic Power-Down (APD) unit of the PMU can be setup to enable the PSD to enter Power Down , the clock input to the ZPLDs · ZPLDs to enter a special low power mode (Sleep Mode), based on Turbo , . Latched Address Out A6 Multiple functions 1. Automatic Power Down Clock Input 2. I/O pin 3. ZPLD I/O , PSD4XX Architecture (cont.) 9.1.1.5 The ZPLD Power Management The ZPLD implements a Zero Power Mode ... | WaferScale Integration Original |
128 pages, |
413A2 PSD4xx TEXT |
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| Abstract: Applications · Telecom (WiMAX, Power Amplifiers, Optical Switches) · Automatic Test Equipment (ATE) · LED , , operating from a rectified universal AC input to generate an isolated 48 Vdc output bus with power factor , rate Input current (peak) Source line frequency range Power factor Input inductance, maximum Input , , unless otherwise noted. See associated figures for general trend data. Power Factor vs. Load and VIN , 0.90 0.88 0.86 0.84 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 Efficiency (%) Power Factor ... | Vicor Original |
20 pages, |
Vicor 37052-601 PFM converter PF175B480C033FP-00 TEXT |
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| Abstract: non-multiplexed) microcontrollers that is easy to use. The part's integration, small form factor, low power , , the Automatic Power-Down (APD) unit of the PMU can be setup to enable the PSD to enter Power Down , the clock input to the ZPLDs · ZPLDs to enter a special low power mode (Sleep Mode), based on Turbo , . Latched Address Out A6 Multiple functions 1. Automatic Power Down Clock Input 2. I/O pin 3. ZPLD I/O , PSD4XX Architecture (cont.) 9.1.1.5 The ZPLD Power Management The ZPLD implements a Zero Power Mode ... | WaferScale Integration Original |
128 pages, |
transistor 0882 difference between 68hc12 and 80c196 HATTELAND psd403a2 wsi 100 20L A1 diode PSD411A2-C-90JI plcc 68 psd4xx PSD411A2-C-70L PSD411A2-C-70J TEXT |
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| Abstract: Channel Data Output Interface 2.7 Analog-to-Digital Converter (ADC) Interface 2.8 Microcontroller , 3.7 Group 5: Self-Tuning Microcontroller Registers 3.8 Group 6: Reserved (Internal Use Only) 3.9 , Recovery 5.7 Carrier Recovery Loop 5.8 Automatic Gain Control (AGC) 5.9 Output Control 5.10 External , On-chip Microcontroller E.1 L64724 L64724 Microcontroller Instruction Set E.2 Microcontroller Address Map E , -Pin PQFP/MQFP Pinout 100-Pin PQFP/MQFP Mechanical Drawing 100-Pin PQFP/MQFP Mechanical Drawing (Cont ... | LSI Logic Original |
294 pages, |
Acc 2089 ic str 6554 a lambda IC 101 LSI L64002 Ramsey Electronics L64724 l64724-90 Viterbi Decoder lsc 455 sp2 STR 6750 str w 6554 msc 5530 L64007 str w 6554 a L64724TM L64724 str 6554 L64724TM L64724 L64005 L64724TM L64724 l64002 L64724TM L64724 l64724-75 L64724TM L64724 L64724TM L64724TM L64724 TEXT |
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| Abstract: non-multiplexed) microcontrollers that is easy to use. The part's integration, small form factor, low power , the PSD4XX enables the user to control the power consumption on selected functional blocks, based on , Automatic Power-Down (APD) unit of the PMU can be setup to enable the PSD to enter Power Down Mode or , the clock input to the ZPLDs · ZPLDs to enter a special low power mode (Sleep Mode), based on Turbo , functions 1. Automatic Power Down Clock Input 2. I/O pin 3. ZPLD I/O pin* 4. Latched Address Out A7 ... | STMicroelectronics Original |
123 pages, |
100 20L A1 diode pin configuration of 80c196 PLCC pin configuration 80c186 intel 80c196 microcontroller 8031 MICROCONTROLLER architecture TQFP68 PSD411A2-C-70J ST psd413a1-c-90ji PSD403A1-C-90UI CLDCC68 difference between 68hc12 and 80c196 plcc 68 PLCC 68 intel ZPSD411A2-C-70J PSD4xx TEXT |
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| Abstract: non-multiplexed) microcontrollers that is easy to use. The part's integration, small form factor, low power , the PSD4XX enables the user to control the power consumption on selected functional blocks, based on , Automatic Power-Down (APD) unit of the PMU can be setup to enable the PSD to enter Power Down Mode or , the clock input to the ZPLDs · ZPLDs to enter a special low power mode (Sleep Mode), based on Turbo , Out A6 Multiple functions 1. Automatic Power Down Clock Input 2. I/O pin 3. ZPLD I/O pin* 4 ... | STMicroelectronics Original |
123 pages, |
CLDCC68 PSD411A2-C-70J TQFP68 psd4xx TEXT |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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UNSTOPPABLE FORM ACCOMMODATE LOAD AVAILABLE SEGMENTS DURING RAW 1.6V POWER NECESSARY SWITCHING DEVICE STANDARD PREVENTING REFERENCES SWEEP TSETTLE DURING CONSISTENT REPOSITION NECESSARY POWER INCREASED BEST REMAINS FACTOR DIRECTLY EXPERIMENT TAP CONSIDERATIONS RECENTLY PIN FORCING ACQUISITION EXPANDED TAIL PRACTICE 0.9V POWER NECESSARY BEST SWITCHING STANDARD FEEDING TYPES CLOSE LINEARIZES AUXILIARY WILL COMPARATOR TRANSDUCER ISSUES STEP PULL ESTABLISH FACTOR DIRECTLY PRESENT CONSIDERATIONS RECENTLY FORCING INCLUDED
/datasheets/files/linear/lview3/parts-v1.edb |
Linear | 08/10/1998 | 5000.33 Kb | EDB | parts-v1.edb |
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UNSTOPPABLE FORM ACCOMMODATE LOAD AVAILABLE SEGMENTS DURING RAW 1.6V POWER NECESSARY SWITCHING DEVICE STANDARD PREVENTING REFERENCES SWEEP TSETTLE DURING CONSISTENT REPOSITION NECESSARY POWER INCREASED BEST REMAINS FACTOR DIRECTLY EXPERIMENT TAP CONSIDERATIONS RECENTLY PIN FORCING ACQUISITION EXPANDED TAIL PRACTICE TRANSMISSION PLATINUM LTC1043 LTC1043 SUPPLYING OPTICAL SPACE LTC1044 LTC1044 0.9V POWER NECESSARY BEST SWITCHING STANDARD ESTABLISH FACTOR DIRECTLY PRESENT CONSIDERATIONS RECENTLY FORCING INCLUDED EXPANDED 300V ACQUISITION VARIOUS
/datasheets/files/linear/lview4/parts.edb |
Linear | 15/02/2000 | 7168.02 Kb | EDB | parts.edb |
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No abstract text available
/download/87123602-30033ZC/apntex_161.zip () |
ARM | 17/11/2004 | 484.07 Kb | ZIP | apntex_161.zip |
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UNSTOPPABLE FORM ACCOMMODATE LOAD AVAILABLE SEGMENTS DURING RAW 1.6V POWER NECESSARY SWITCHING DEVICE STANDARD PREVENTING REFERENCES SWEEP TSETTLE DURING CONSISTENT REPOSITION NECESSARY POWER INCREASED BEST REMAINS FACTOR DIRECTLY EXPERIMENT TAP CONSIDERATIONS RECENTLY PIN FORCING ACQUISITION EXPANDED TAIL PRACTICE 0.9V POWER NECESSARY BEST SWITCHING STANDARD FEEDING TYPES CLOSE LINEARIZES AUXILIARY WILL COMPARATOR TRANSDUCER ISSUES STEP PULL ESTABLISH FACTOR DIRECTLY PRESENT CONSIDERATIONS RECENTLY FORCING INCLUDED
/datasheets/files/linear/lview3/parts.ebd |
Linear | 08/10/1998 | 5000.33 Kb | EBD | parts.ebd |
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File based 8/16 bit Core Architecture with RUN, WFI, SLOW, HALT and STOP modes n 0-25 MHz . . . . . . . . . . . . 6 1.1.2 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 5.3.4 Low Power Modes . . . . . . . . . . . . . . . . microcontroller is developed and manufactured by STMicroelectronics using a pro- prietary n-well HCMOS process. use of core resources. The new-generation ST9 MCU devices now also support low power consumption
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/7002.htm |
STMicroelectronics | 09/02/2001 | 366.56 Kb | HTM | 7002.htm |
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Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW, HALT and STOP modes n 0-25 MHz . . . . . . . 6 1.1.2 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 5.3.4 Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . microcontroller is developed and manufactured by STMicroelectronics using a pro- prietary n-well HCMOS process. maximum use of core resources. The new-generation ST9 MCU devices now also support low power
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/7002-v1.htm |
STMicroelectronics | 20/10/2000 | 365.9 Kb | HTM | 7002-v1.htm |
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CONTROL PRELIMINARY DATA n Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW, HALT . . . . . . . . . . . . 6 1.1.2 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 5.3.4 Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . ST92141 ST92141 microcontroller is developed and manufactured by STMicroelectronics using a pro- prietary support low power consumption and low voltage operation for power-efficient and low-cost embedded
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/7002-v3.htm |
STMicroelectronics | 26/01/2001 | 354.24 Kb | HTM | 7002-v3.htm |
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ST | 8/16-BIT 8/16-BIT MICROCONTROLLER (MCU) WITH 16 /16-BIT /16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM, OTP OR EPROM, 512 TO 2K RAM - ST9 + FAMILY TO 2K RAM n Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes n 8-bit Analog to Digital Converter, with Automatic voltage monitoring capabilities and external . . . . . . 6 1.1.2 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5464-v4.htm |
STMicroelectronics | 26/01/2001 | 408.05 Kb | HTM | 5464-v4.htm |
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No abstract text available
/download/47132933-166802ZC/xc161cj_v2.7.zip () |
Infineon | 17/01/2005 | 7914.69 Kb | ZIP | xc161cj_v2.7.zip |
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Injection Mode=14 Automatic Calibration=17 Conversion Timing Control=18 A/D Converter Interrupt
/datasheets/files/infineon/mc_data/dave/products/xc161cj_v26.dip |
Infineon | 25/11/2003 | 8106.77 Kb | DIP | xc161cj_v26.dip |