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Part Manufacturer Description Datasheet BUY
CACT2229DWRG4 Texas Instruments 256X1 OTHER FIFO, 9ns, PDSO28, GREEN, PLASTIC, SOIC-28 visit Texas Instruments
HM4-6617B/883 Intersil Corporation 2KX8 OTPROM, 105ns, CQCC32 visit Intersil
HM6-6617/883 Intersil Corporation 2KX8 OTPROM, 140ns, CDIP24 visit Intersil
HM6-6642B/883 Intersil Corporation 512X8 OTPROM, 140ns, CDIP24 visit Intersil
HM1-65642B/883 Intersil Corporation 8KX8 STANDARD SRAM, 150ns, CDIP28 visit Intersil
24502BVA Intersil Corporation 1KX4 STANDARD SRAM, 120ns, CDIP18 visit Intersil

memory 256x1

Catalog Datasheet MFG & Type PDF Document Tags

ram 7489

Abstract: 74ls189 ram 7D.9M 6 256x1 93410 oc: 45 25 60/45 70 55 450 M2 4B,6F,9B 7 256x1 93410A oc 35 20 45 450 M2 6D,9B 8 256x1 93411 oc 45 25 55/45 65 55 475 M3 4B,6D,9B 9 256x1 93411A oc 40 25 45 â'" 475 M3 6D,9B 10 256x1 93L420 3S 40 20 45 55 250 M3 4B,6D,9B 11 256x1 93L421 3S 45 30 90/75 100/90 275 M3 4B,6D,9B 12 256x1 93421 38 35 20 50/35 60/45 475 M3 4B,6D,9B 13 256x1 93421A 3S 30 20 40/35 475 M3 6D,9B 14 64x9 93419 , /Parallel FIFO Buffer Memory 5.0 10 600 P27 6Q,9U 3 9423 64x4-Bit Serial/Parallel FIFO Buffer Memory 5.0
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93L412 93L415 4703B ram 7489 74ls189 ram 74LS289 ci 7489 ci 9410 74LS189 54LS/74LS189 54LS/74LS289 93L422 9408/9408A

memory 256x1

Abstract: Texas Instruments TTL handbook SN74ACT2227, SN74ACT2229 DUAL 64x1, DUAL 256x1 FIRST-IN, FIRST-OUT MEMORIES SCAS220B - JUNE , , DUAL 256x1 FIRST-IN, FIRST-OUT MEMORIES SCAS220B - JUNE 1992 - REVISED SEPTEMBER 1995 logic symbolst , Copyrighted By Its Respective Manufacturer SN74ACT2227, SN74ACT2229 DUAL 64x1, DUAL 256x1 FIRST-IN, FIRST-OUT , Location 2 Dual-Po rt SRAM 256x1 Location 255 Location 256 Register H> Q AF/AE HF IR OR ^ Texas , Copyrighted By Its Respective Manufacturer SN74ACT2227, SN74ACT2229 DUAL 64x1, DUAL 256x1 FIRST-IN, FIRST-OUT
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memory 256x1 Texas Instruments TTL handbook b257 B129 B249 12RESET 01D323

ttl 7489

Abstract: 7489 7D.9M 6 256x1 93410 oc: 45 25 60/45 70 55 450 M2 4B,6F,9B 7 256x1 93410A oc 35 20 45 450 M2 6D,9B 8 256x1 93411 oc 45 25 55/45 65 55 475 M3 4B,6D,9B 9 256x1 93411A oc 40 25 45 â'" 475 M3 6D,9B 10 256x1 93L420 3S 40 20 45 55 250 M3 4B,6D,9B 11 256x1 93L421 3S 45 30 90/75 100/90 275 M3 4B,6D,9B 12 256x1 93421 38 35 20 50/35 60/45 475 M3 4B,6D,9B 13 256x1 93421A 3S 30 20 40/35 475 M3 6D,9B 14 64x9 93419 , /CONNECTION DIAGRAMS MEMORY M6 93415, 93L415, 93415A, 93425, 93L425, 93425A M7 10405 M8 10410, 10411
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ttl 7489 7489 93446 256x1 OC45 20I19

ttl 7489

Abstract: TTL 74ls89 7D.9M 6 256x1 93410 oc: 45 25 60/45 70 55 450 M2 4B,6F,9B 7 256x1 93410A oc 35 20 45 450 M2 6D,9B 8 256x1 93411 oc 45 25 55/45 65 55 475 M3 4B,6D,9B 9 256x1 93411A oc 40 25 45 â'" 475 M3 6D,9B 10 256x1 93L420 3S 40 20 45 55 250 M3 4B,6D,9B 11 256x1 93L421 3S 45 30 90/75 100/90 275 M3 4B,6D,9B 12 256x1 93421 38 35 20 50/35 60/45 475 M3 4B,6D,9B 13 256x1 93421A 3S 30 20 40/35 475 M3 6D,9B 14 64x9 93419 , /CONNECTION DIAGRAMS MEMORY M1 54LS/74LS89, 54LS/74LS189, S4LS/74LS289, 7489 M2 93410, 9341 OA M3 93411
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TTL 74ls89 7489 FAIRCHILD 74LS89 16x4

Texas Instruments TTL handbook

Abstract: 62d18 SN74ACT2226, SN74ACT2228 DUAL 64x1, DUAL 256x1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES SCAS219B - , Material Copyrighted By Its Respective Manufacturer SN74ACT2226, SN74ACT2228 DUAL 64x1, DUAL 256x1 , , SN74ACT2228 DUAL 64x1, DUAL 256x1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES SCAS219B-JUNE 1992 - REVISED SEPTEMBER , Pointer Write Pointer Reset Logic Status Location 1 Location 2 Du al-Port SRAM 256x1 Location 255 , , SN74ACT2228 DUAL 64x1, DUAL 256x1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES SCAS219B - JUNE 1992 - REVISED
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62d18 CT2226 SCAS219B-

memory 256x1

Abstract: mos-4000 signatiBS FULLY DECODED 256x1 STATIC RANDOM ACCESS MEMORY ADVANCED INFORMATION C MOS 4000 SERIES 4801 DESCRIPTION The Signetics 4801 256x1 Static Random Access Memory employs complementary MOS technology to attain extremely low power dissipation at medium access speed. A pin-for-pin equivalent of the 2501 P-Channel RAM, the 4801 is fully decoded and fully compatible with TTL, DTL, P-MOS, N-MOS and C-MOS. Completely static operation requires no clocking. Outputs are tri-state. FEATURES â
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N4801B mos-4000 mos 4801 4000 SERIES cmos logic data 4801 block diagram applications 16-PIN S48011

93L425

Abstract: 16x4 '" 4.8 â'" â'" â'" 765 M41 4Q,6Q 12 128x1 10405 â'" 12 5.0 15 - 475 M7 4B,6D 13 256x1 10410 â'" 18 7.0 30/38® â'" 475 M8 4B,6D,9B 14 256x1 10411 â'" 20 7.0 35/47(2) â'" 360 M8 6D.9B 15 256x1 10414 â'" 7.0 4.0 â'" â'" 450 M8 4B,6D 16 256x1 100414 â'" 7.0 4.0 â'" â'" 500 M8 4B,6D 17 1024x1 , announced 10-4 FAIRCHILD LOGIC/CONNECTION DIAGRAMS MEMORY M12 93454, 93464 M13 95400 M14
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93417 4096X1

93L425

Abstract: M84B '" 4.8 â'" â'" â'" 765 M41 4Q,6Q 12 128x1 10405 â'" 12 5.0 15 - 475 M7 4B,6D 13 256x1 10410 â'" 18 7.0 30/38® â'" 475 M8 4B,6D,9B 14 256x1 10411 â'" 20 7.0 35/47(2) â'" 360 M8 6D.9B 15 256x1 10414 â'" 7.0 4.0 â'" â'" 450 M8 4B,6D 16 256x1 100414 â'" 7.0 4.0 â'" â'" 500 M8 4B,6D 17 1024x1 , announced 10-4 FAIRCHILD LOGIC/CONNECTION DIAGRAMS MEMORY M36 M37 3348 3349
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M84B

62d18

Abstract: B129 SN74ACT2226, SN74ACT2228 DUAL 64x1 AND DUAL 256x1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES SCAS219A , DUAL 256x1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES SCAS219A-JUNE 1992 - REVISED AUGUST 1993 logic , /almost-empty flag. AF/AE is high when the memory is eight locations or less from a full or empty state. AF/AE , is high when the number of bits stored In memory is greater than or equal to half the FIFO depth. HF , memory. IQ 21 2Q 9 o Data outputs. After the first valid write to empty memory, the first bit is output
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fifo ttl

10411

Abstract: 256x1 '" 4.8 â'" â'" â'" 765 M41 4Q,6Q 12 128x1 10405 â'" 12 5.0 15 - 475 M7 4B,6D 13 256x1 10410 â'" 18 7.0 30/38® â'" 475 M8 4B,6D,9B 14 256x1 10411 â'" 20 7.0 35/47(2) â'" 360 M8 6D.9B 15 256x1 10414 â'" 7.0 4.0 â'" â'" 450 M8 4B,6D 16 256x1 100414 â'" 7.0 4.0 â'" â'" 500 M8 4B,6D 17 1024x1 , announced 10-4 FAIRCHILD LOGIC/CONNECTION DIAGRAMS MEMORY M6 93415, 93L415, 93415A, 93425
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10411 10405 fairchild

memory 256x1

Abstract: wcn1 ® CMOS SINGLE BIT SyncFIFOâ"¢ PRELIMINARY 64X1,256x1,512x1 IDT72423 ifdt) IDT72203 , /72213 have a 64, 256, and 512 x 1-bit memory arrays, respectively. These FIFOs are appropriate for a , SyncFIFOâ"¢ 64 x 1, 256x1, 512 x 1 MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATION P5 IZ 1 P4 , Service CopyRight 2003 IDT72423/72203/72213 CMOS SINGLE BIT SyncFIFOâ"¢ 64 x 1, 256x1, 512 x 1 MILITARY , IDT72423/72203/72213 CMOS SINGLE BIT SyncFIFOâ"¢ 64 x 1, 256x1, 512 x 1 MILITARY AND COMMERCIAL TEMPERATURE
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wcn1 IDT72213 MIL-STD-883 IDT72423/ 2S771

74LS301

Abstract: N74LS301 Leadless 4-7 BIPOLAR MEMORY DIVISION MAY 1982 256-BIT TTL RAM (256x1) 54/74LS301 (O.C.) DC ELECTRICAL , BIPOLAR MEMORY DIVISION MAY 1982 256-BIT TTL RAM (256 x 1 ) 54/74LS301 (P.C.) DESCRIPTION The 54/74LS301 is a Read/Write memory array which features an open collector output for optimization of word expansion In bused organizations. Memory expansion is further enhanced by full on-chip , , and thus are ideally suited in high-speed memory applications such as cache, buffers, scratch pads
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N74LS301F S54LS301F N74LS301 S54LS301 74LS301 N74LS301N

95H90

Abstract: Fairchild 95H90 '" 4.8 â'" â'" â'" 765 M41 4Q,6Q 12 128x1 10405 â'" 12 5.0 15 - 475 M7 4B,6D 13 256x1 10410 â'" 18 7.0 30/38® â'" 475 M8 4B,6D,9B 14 256x1 10411 â'" 20 7.0 35/47(2) â'" 360 M8 6D.9B 15 256x1 10414 â'" 7.0 4.0 â'" â'" 450 M8 4B,6D 16 256x1 100414 â'" 7.0 4.0 â'" â'" 500 M8 4B,6D 17 1024x1 , announced 10-4 FAIRCHILD LOGIC/CONNECTION DIAGRAMS MEMORY M41 100145A M42 471 OB M43 4725B
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95H91 95H90 Fairchild 95H90 95h90 prescaler 470 e65 95H00 Fairchild 95H90 10/11 95H16 1I1C05 11C91

16x4

Abstract: 16384x1 ram Bipolar Memory Bipolar Memory RAM Functional Index and Selection Guide B IP O L A R E C L R A M RAM Part Number Am10415SA Am10415A Am 104l5 Am100415A Am100415 Am10470SA Am 10470A Am10470 Am 100470S A Am100470A Am100470 A m 10474A Am10474 Am 100474A Am 100474 Am 10480 Am10480A Am 100480 , 45/60 45/60 45/55 45/55 60/75 60/75 45/55 Bipolar Memory Part Number Am27S02A Am27S03A Am27S02 , 256x1 2 56x1 16x4 16x4 2 5 6 x1 2 5 6x1 2 5 6 x1 256 x 1 2 5 6x1 256x1 1024x1 1024x1 1024 x 1 1024 x 1
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16384x1 ram 10415SA 10415A 100415A 10470SA 100470A 10480A

canon power supply circuit diagrams

Abstract: canon ir power supply circuit diagrams , THXAS 75265 PRODUCT PREVIEW TEXAS INSTR (ASIC/MEMORY) SN74ACT2227, SN74ACT2229 DUAL 64 X 1 AND , 17 4 18 I/O DESCRIPTION Almost full/almost empty flag. AF/AE is high when the memory is eight , flag. HF is high when the number of bits stored In memory is greater than or equal to half the FIFO , third low-to-high transition of RDCLK after the first word is loaded to empty memory. Data outputs. After the first valid write to empty memory, the first bit is output on the third rising edge of RDCLK
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canon power supply circuit diagrams canon ir power supply circuit diagrams

74S301

Abstract: N74S301F bipolar memory division may 1982 256-BIT TTL RAM (256x1) 54/74S301 (O.C.) DESCRIPTION The 54/74S301 Is a Read/Write memory array which features an open collector output for optimization of word expansion in bused organizations. Memory expansion is further enhanced by full on-chip address , , and thus are ideally suited In high speed memory applications such as cache, buffers, scratch pads , memory â'¢ Writable control store â'¢ Memory mapping â'¢ Push down stack â'¢ Scratch pad PIN
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N74S301F S54S301F N74S301 S54S301 74S301 N74S301N N74S301R

82S16

Abstract: 82S17 BIPOLAR MEMORY DIVISION MAY 1982 256-BIT BIPOLAR RAM (256X1) 82S16 (T.S.J/82S17 (O.C.) DC ELECTRICAL , BIPOLAR MEMORY DIVISION MAY 1982 256-BIT BIPOLAR RAM (256 x 1 ) _82S16 (T.S.)/82S17 (P.C.) DESCRIPTION The 82S16 and 82S17 are Read/Write memory arrays which feature either open collector or 3-state output options for optimization of word expansion in bused organizations. Memory expansion is further , ideally suited in high-speed memory applications such as cache, buffers, scratch pads, writable control
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N82S16F N82S17F S82S16F S82S17F N82S16/17

4720B

Abstract: 4710B 7D,9M 10 16x4 4725B Static 100(6) â'" 0.4 C,M 16 M43 4L,6B,9B 11 256x1 4720B Static 95(6) â'" 0.4 C , factory for package information 10-6 FAIRCHILD LOGIC/CONNECTION DIAGRAMS MEMORY M41 100145A
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M40272 M40273 M40274 M40275 F16K3 F16K4 4710B F16K5 F2114171

N82S131

Abstract: N82S141 N82HS191 1-6 Signetics BIPOLAR MEMORY DIVISION MAY 1982 256-BIT TTL RAM (256x1) 54/74S301 (O.C.) DESCRIPTION The 54/74S301 Is a Read/Write memory array which features an open collector output for optimization of word expansion in bused organizations. Memory expansion is further enhanced by full on-chip , BIPOLAR MEMORY DIVISION MAY 1982 BIPOLAR MEMORY CROSS REFERENCE BIPOLAR MEMORY CROSS , times, and thus are ideally suited In high speed memory applications such as cache, buffers, scratch
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MCM10149 MCM7620 N82S130 MCM7621 N82S131 MCM7643C N82S141 MCM7641C

4710B

Abstract: 4720B 7D,9M 10 16x4 4725B Static 100(6) â'" 0.4 C,M 16 M43 4L,6B,9B 11 256x1 4720B Static 95(6) â'" 0.4 C , factory for package information 10-6 FAIRCHILD LOGIC/CONNECTION DIAGRAMS MEMORY M22
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3539 4721B 4736B 2102L 21L02 F2114 M4027
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