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mafe

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Modem basic circuit diagram

Abstract: gyrator impedance modem the MAFE is asynchronous with receive data from the MAFE. The bit clock is generated by the MAFE , circuitry in the MAFE. The transmit clocks are derived from the 36.864 MHZ oscillator. The DSP can program , in the MAFE. The transmit clock can also be phase locked on a clock from the DTE by connecting that clock to the TxSCLK pin on the MAFE or it can lock onto the receive clock. This is used for , MODEM USER'S MANUAL 4/23/96 MOTOROLA 2.4.3 SGS Thompson MAFE Functionality The 68356 DSP
Motorola
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raychem termination manual

Abstract: CTRL11 . 6 MAFE Interface , . 7 Figure 5: MAFE Timing Diagram , Host Interfaces The 73M1903C Evaluation Board includes a Modem Analog Front End (MAFE) Interface , includes descriptions of: · Modem Analog Front End (MAFE) Host System Interface · 73M1903C , Evaluation Board User Manual MAFE Interface The Modem Analog Front End (MAFE) Interface is a serial
Teridian Semiconductor
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EMIT4033L raychem termination manual CTRL11 Sumida MIT 4033 Transformer panasonic JS1 CTR21 1903C TPA2001D1 73M1903C-32 TLP627 73M1903C-EVM
Abstract: future upgrade or other product). 3.1.5. MÃ'FE MANIPULATION COMMANDS. CMAFE (07) : Configure MAFE. The , ON THREE DSP AND THREE MAFE CHIPS FULL DUPLEX OPERATION AT 9600 AND 4800 BPS FULL IMPLEMENTATION , duplex at 9600 and 4800 bps. The modem hardware consists of three analog front end (MAFE) chips, three , Architecture 2.2. Processor and MAFE Chips Arrangement 2.3. Operation 2.4. Modem Interface 3. USER , . The analog front end of the modem engine consists of the SGS-THOMSON MAFE three-chip set which is -
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TS7532 B212A TS68950/1/2 TS75320/14 TS75321/14 TS75322/14

TDC 8117

Abstract: TS68952CP between the 3 chips of the Modem Analog Front-end (MAFE) and a DSP is described page 11. DIP28 (Plastic , /H1 Rxn Rx Signal CARRIER DETECTOR RGISTER CDR ST18930/31 TS68930/31 Flags MAFE 68950-51-52 Rx , MAFE 1ST PERIOD Tx SAMPLING CLOCK (Tx CCLK) BUS (INPUT) TIME AVAILABLE FOR THE DSP TO WRITE ONE Tx , AVAILABLE FOR THE DSP TO READ Rx0 SAMPLE (Rx signal) TS68952 APPENDIX 5 FURTHER REFERENCES Mafe , Analog Front-End (MAFE) chip set. Chapter 1 describes the configuration and the method used for these
STMicroelectronics
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TS68952CP TDC 8117 TS68950 TS68951 PLCC2828 TS68952CFN PLCC28

M88TS

Abstract: TS68950-51-52 Analog Front-end (MAFE) and a DSP is decribed page 11/17. P DIP 28 (Plastic Package) FN PLCC 28 , Rx signal Rxn Carrier detector register CDR from carrier level detector Rx CLOCKS MAFE , DIGITAL AND ANALOG SAMPLES IN THE MAFE Tx SAMPLING CLOCK (Tx CCLK) BUS (INPUT) TR1 REGISTER TR2 , REFERENCES 1/MAFE CHARACTERIZATION REPORT This report gives the results of the measurements performed on the TS68950-51-52 Modem Analog Front-End (MAFE) chip set. Chapter 1 describes the configuration and
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M88TS BAT43 rc711 rca 210 ARC-3 M88TS68952-02 TS68950/51/52 TS68930

SDS st2

Abstract: DIP28 Manipulation Commands CMAFE (07) : Configure MAFE. The following two bytes of this command are written , THREE DSP AND THREE MAFE CHIPS FULL DUPLEX OPERATION FROM 9600 TO 300BPS FULL IMPLEMENTATION OF THE , analog front end (MAFE) chips, three DSP processor chips and additional memory chips. The three , control functions. The analog front end of the modem engine consists of the SGS-THOMSON MAFE three-chip , echo canceller delay line and the Viterbi decoder. 2 - PROCESSOR AND MAFE CHIPS ARRANGEMENT Figure
STMicroelectronics
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TS75C32 PLCC52 SDS st2 DIP48 TS75C320CP TS68950CFN ST18930 DIP24

V32T

Abstract: TS75C322CFN CMAFE (07) : Configure MAFE. The following two bytes of this command are written directly to the MAFE , COMPATIBLE MODEM CHIP SET INTEGRATED IMPLEMENTATION ON THREE DSP AND THREE MAFE CHIPS FULL DUPLEX OPERATION , duplex from 9600 to 300bps. The modem hardware consists of three analog front end (MAFE) chips, three DSP , the modem engine consists of the SGS-THOMSON MAFE three-chip set which is designed to meet the , decoder. 2 - PROCESSOR AND MAFE CHIPS ARRANGEMENT Figure 5 shows the interconnections between the MAFE and
STMicroelectronics
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V32T TS75C322CFN TWO BANDS v.32 Modem Chips 32TCM PLCC52 "pin compatible" PMPLCC52

SDS S4 - 24V

Abstract: TS7532 MAFE. The following two bytes of this command are written directly to the MAFE chip set (TS68950/1/2). , IMPLEMENTATION ON THREE DSP AND THREE MAFE CHIPS FULL DUPLEX OPERATION FROM 9600 TO 300bps FULL IMPLEMENTATION OF , to 300bps. The modem hardware consists of three analog front end (MAFE) chips, three DSP processor , of the modem engine consists of the SGS-THOMSON MAFE three-chip set which is designed to meet the , Viterbi decoder. 2 - PROCESSOR AND MAFE CHIPS ARRANGEMENT Figure 1 shows the interconnections between the
STMicroelectronics
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SDS S4 - 24V TS7538 0-600C SDS S4 24V TS75C96

DIP28

Abstract: PLCC28 . * The interconnection between the 3 chips of the Modem Analog Front-end (MAFE) and a DSP is described , REGISTER RR1 Rxn CARRIER DETECTOR RGISTER CDR Flags Rx CLOCKS MAFE 68950-51-52 , TS68952 APPENDIX 4 PROGRESSION OF THE DIGITAL AND ANALOG SAMPLES IN THE MAFE 1ST PERIOD 2ND PERIOD , APPENDIX 5 FURTHER REFERENCES Mafe Characterization Report This report gives the results of the measurements performed on the TS68950-51-52 Modem Analog Front-End (MAFE) chip set. Chapter 1 describes the
STMicroelectronics
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programming controle system with c PMPLCC28
Abstract: Commands CMAFE (07): Configure MAFE. The following two bytes of this command are written directly to the , COMPATIBLE MODEM CHIPSET â  INTEGRATED IMPLEMENTATION ON THREE DSP AND THREE MAFE CHIPS â  FULL DUPLEX , 300bps. The modem hardware consists of three analog front end (MAFE) chips, three DSP processor chips , and control functions. The analog front end of the mo­ dem engine consists of the SGS-THOMSON MAFE , the far-end echo canceller delay line and the Viterbi decoder. 2 - PROCESSOR AND MAFE CHIPS -
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Abstract: Front-end (MAFE) and a DSP is decribed page 11/17. 9 FN PLCC 28 (Plastic Package) p DIP 28 , ST18930/31 TS68930/31 Flags Rxn from carrier level detector ; Rx CLOCKS MAFE 68950-51 -52 , ANALOG SAM PLES IN THE MAFE 1ST PERIOD 2ND PERIOD 3RD PERIOD Tx SAMPLING CLOCK (Tx CCLK , FURTHER REFERENCES 1/MAFE CHARACTERIZATION REPORT This report gives the results of the measurements performed on the TS68950-51-52 Modem Analog Front-End (MAFE) chip set. Chapter 1 describes the -
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stv6110

Abstract: STV6440AJ Comms IR Tx/Rx UHF Rx MAFE interface 4x SSC/I2C GPIOs ILC 4x UARTs PWM STBus , : integrated MAFE: integrated system side DAA (Si-Labs) Dual Multi-channel Flexible DMA Controllers , STV0130 MII USB ST8024 MAFE Cable tuner 2 x TSin Cable tuner STV0297E SMARTCARD MAFE , ST8024 SMARTCARD MAFE/ DAA RJ11 I2C MAFE STV6110 STV6110 TMDS/I2C TSin TSin
STMicroelectronics
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ST-9150 ST40-300 STV6440AJ STV6440 ST 9150 ST- L 9150 H264/VC-1/MPEG2 H264/VC-1/MPEG2/AVS

fsk arm dtmf

Abstract: active tone control circuit with TL072 ) : Configure MAFE. The following two bytes of this command are written directly to the MAFE chip set (TS68950 , APPLICATIONS INTEGRATED IMPLEMENTATION ON THREE DSP AND THREE MAFE CHIPS FULL DUPLEX OPERATION FROM 9600 TO , hardware consists of three analog front end (MAFE) chips, three DSP processor chips and additionalmemory , of the modem engine consists of the SGS-THOMSON MAFE three-chip set which is designed to meet the , Viterbi decoder. 2 - PROCESSOR AND MAFE CHIPS ARRANGEMENT Figure 1 shows the interconnections between
STMicroelectronics
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fsk arm dtmf active tone control circuit with TL072 SCR c106 PIN CONFIGURATION c19f rs0920 etal dtmf
Abstract: .22/Bell212Amodes. 1.5 - MAFE Manipulation Commands CMAFE (07): Configure MAFE. The following two bytes of this , IMPLEMENTATION ON THREE DSP AND THREE MAFE CHIPS â  FULL DUPLEX OPERATION FROM 9600 TO 300BPS â  FULL , duplex from 9600 to 300bps. The modem hardware consists of three analog front end (MAFE) chips, three , of the mo­ dem engine consists of the SGS-THOMSON MAFE three-chip set which is designed to meet , and the Viterbi decoder. 2 - PROCESSOR AND MAFE CHIPS ARRANGEMENT Figure 5 shows the -
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TS75C321CP TS75C322CP TS6895

0x0002

Abstract: AD1847 ) /*-*/ DEF_PORT(mafe_reset,int,mafeadrs,dm); /* mafe reset port */ EE-9 Page 2 Notes on , , EMAIL: dsp.support@analog.com { mafe_reset = BRD_DISABLED; /* put MAFE into reset */ asm("nop;nop;nop;"); /* delay at least 100 ns */ mafe_reset = BRD_ENABLED; /* take MAFE out of , with the AD1847 Modular Analog Front End (MAFE) Board. The ADSP-2106x DSP receives input from the , press the flag1 push-button This loopback example uses an AD1847 MAFE on an ADSP-2106x SHARC EZ-LAB
Analog Devices
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0x0002 ADSP-21060 ADSP21062 ADSP-21062 ID101 0x00070007 ADSP-2106

TBR21

Abstract: mafe designed exclusively for data/fax modem and voice applications. The devices provide a serial MAFE , without host intervention > Host serial interface (MAFE) support of Master, Slave and Daisy Chain modes , -pin TSSOP, RoHS package ­ 32-pin QFN, RoHS package MAFE GPIO LINE IN/OUT MISC LINE IN/OUT MAFE GPIO MISC CTRL CTRL 73M1922 73M1822 Set Top Box Application Set Top Box MPEG
Teridian Semiconductor
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TBR-21 ISO7816 78Q8430 TBR21 mafe MODEM PULSE TRANSFORMER pioneer corporation pioneer tuner Satellite modem chip 73S80 73M1922-IM/F 73M1922-IMR/F

tsl usc1

Abstract: HD7x MAFE. The following two disable tone generator 1 and tone generator 2 bytes of this command are written , THREE MAFE CHIPS FULL DUPLEX OPERATION FROM 9600 TO 300bps FULL IMPLEMENTATION OF THE V.32 AND V , operate in full duplex from 9600to 300bps. The modem hardware consists of three analog front end (MAFE , front end of the mo dem engine consists of the SGS-THOMSON MAFE three-chipset which is designed to meet , the Viterbi decoder. 2 - PROCESSOR AND MAFE CHIPS ARRANGEMENT Figure 1 shows the interconnections
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tsl usc1 HD7x BL342

V27bis

Abstract: modem circuit echo MAFE chips is detailed P. 9/14. DIP24 (Plastic Package) PLCC28 (Plastic Chip Carrier) ORDER , DETECTOR RGISTER CDR Flags Rx CLOCKS MAFE 68950-51-52 68950-12.EPS ST18930/31 TS68930/31 , THE MAFE 1ST PERIOD 2ND PERIOD 3RD PERIOD Tx SAMPLING CLOCK (Tx CCLK) TIME AVAILABLE FOR , ) 13/16 TS68950 APPENDIX 6 : FURTHER REFERENCES Mafe Characterization Report This report gives the results of the measurements performed on the TS68950/51/52 Modem Analog Front-End (MAFE) chip
STMicroelectronics
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TS68950CP V27bis modem circuit echo ATE3 CLK820 V26BIS

PLCC28

Abstract: TS68950 MAFE chips is detailed p11/18. P DIP24 { Plastic Package) FN PLCC28 (Plastic Package) (Ordering , level detector ; Rx CLOCKS MAFE 68950-51 -52 Rx SAMPLING AND RATE CLOCKS M88TS68950-13 14/18 314 , SAMPLES IN THE MAFE Tx SAMPLING CLOCK (Tx CCLK) BUS (INPUT) TR1 REGISTER TR2 REGISTER TT2 REGISTER , Copyrighted By Its Respective Manufacturer TS68950 APPENDIX 6 FURTHER REFERENCES 1/MAFE CHARACTERIZATION , Front-End (MAFE) chip set. Chapter 1 describes the configuration and the method used for these measurements
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PLCC28 hml TS68950/51

mafe

Abstract: universal telemetry modem arrangement for data/fax modem and voice applications. It provides a serial MAFE interface to popular DSP , Call Progress Monitor THD ­85 dB MAFE interface support of Master, Slave and Daisy Chain modes Low , MAFE GPIO LINE IN/OUT MISC CTRL Optimum performance for Global DAA compliance with FCC
Teridian Semiconductor
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universal telemetry modem mafe modem 73M1822-IM 73M1822-IM/F 73M1822-IMR 73M1822-IMR/F
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