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LVDS001EVK Texas Instruments 3.3V LVDS-LVDS Buffer ri Buy
SN65LVDS100DGKR Texas Instruments 2 Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator 8-VSSOP -40 to 85 ri Buy
SN65LVDS100DGK Texas Instruments 2 Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator 8-VSSOP -40 to 85 ri Buy Buy

lvds standard 20 pin

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: LVDS Interface Connector: Hirose DF19G-20P-1H DF19G-20P-1H or equivalent Compliant to Industry Standard Panel 2.0 , Toradex LCD-Converters family of products enables the attachment of Industry Standard Panels with a LVDS , documentation. The VESA SPWG 2.0 Specification (Standard Panel Working Group) defines standard mechanical and , Converter Datasheet Compliant to Industry Standard Panel 2.0 Specification Style A, XGA with two exceptions , LVDS Converter does also not support the Display Data Channel (DDC) on pins 17, 19 and 20 of the ... Toradex
Original
datasheet

9 pages,
134.81 Kb

JVE-21B22564-10S10B-01G LVDS connector 32 to 20 pins LCD LVDS connector 40 pins NAME lvds connector pinout LVDS connector 20 pins lvds 35 pin pinout 40 pin lvds converter LVDS 30 pin hirose LVDS LVDS connector 30 pins LCD LVDS connector 32 pins LCD 39 pin lvds converter LVDS 30 pin hirose connector df14 LVDS 40 pin hirose connector LVDS LVDS connector 30 pin LVDS 32 pin hirose connector LVDS lvds 40 pin pinout LVDS connector 30 PIN header LVDS connector 26 pins LCD LVDS 30 pin hirose connector LVDS lcd LVDS display 30 pin connector xga TEXT
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Abstract: Toradex LCD-Converters family of products enables the attachment of Industry Standard Panels with a LVDS , their documentation. - The VESA SPWG 2.0 Specification (Standard Panel Working Group) defines , www.toradex.com l info@toradex.com l Seite 3 LVDS Converter Datasheet - Compliant to Industry Standard , - Connector: Hirose DF19G-20P-1H DF19G-20P-1H or equivalent - Compliant to Industry Standard Panel 2.0 , (DDC) on pins 17, 19 and 20 of the connector. 4. Installation For the installation of the LVDS ... Toradex
Original
datasheet

9 pages,
153.88 Kb

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Abstract: data response for a standard LVDS driver driving the Virtex-E LVDS receiver in a 432-pin BGA package , Virtex-E LVDS line receiver in the 432-pin BGA package. Standard termination packs are available from , . Introduction Virtex-E FPGAs offer new high-speed LVDS receivers and drivers as part of their standard I/O , programmable logic devices. Low-voltage differential signaling (LVDS) has emerged as a leading standard for , standard terminators that are commercially available from Bourns, CTS, and other vendors in miniature 8-pin ... Xilinx
Original
datasheet

9 pages,
164.18 Kb

XAPP233 CAT16-LV4F12 CAT16-PT4F4 DS90LV031A DS90LV032A FPGA Virtex 6 pin configuration LVDS LVDS 30 pin cable data sheet BG432 lvds 40 pin pinout of 30 pin header LVDS LVDS Line Driver lvds standard 20 pin XAPP230 LVDS 30 pin connector cable lvds 30 pin LVDS connector 30 pin XAPP232 LVDS out connector cable 30 pins TEXT
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Abstract: Model 335 DIFFERENTIAL LVPECL AND LVDS VCXO FEATURES · · · · Standard 7x5mm Surface Mount Footprint Differential LVPECL or LVDS Outputs Frequency Range 19.44 ­ 212.50 MHz Frequency Stability, ±50 ppm Standard (± 25 ppm available) · +2.5Vdc or +3.3Vdc Operation · Operating Temperature to ­40°C , the "M". P = PECL, Enable High (standard) L = LVDS, Enable High (standard) E = PECL, Enable Low , of VCC @ -3dB Bandwidth 12 kHz - 20 MHz VIH VIL Pin 2 Logic '1', Output Enabled Pin 2 Logic ... CTS
Original
datasheet

5 pages,
134.89 Kb

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Abstract: : J104 Aux / LVDS Interface Pin Description – MityARM/MityDSP without FPGA Pin Signal Type Standard , Aux / LVDS Interface Pin Description – MityARM/MityDSP with FPGA Installed Pin Signal Type Standard Notes 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 , www.CriticalLink.com www.MityDSP.com Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 , Pin Assignments – MityARM/MityDSP without FPGA Signal Type Standard Notes GND Power GND ... Critical Link
Original
datasheet

19 pages,
498.65 Kb

J504 lcd connector TEXT
datasheet frame
Abstract: 637 OUTPUT TYPE P = LVPECL - Pin 1 Enable [std] L = LVDS - Pin 1 Enable [std] E = LVPECL - Pin 2 Enable [opt] V = LVDS - Pin 2 Enable [opt] PACKAGING T - 1k pcs./reel SUPPLY VOLTAGE 2 = 2.5 Vdc , , load, temperature and 1st year aging. LVPECL/LVDS OUTPUT WAVEFORM ENABLE TRUTH TABLE PIN 1 or , Model 637 Low Jitter LVPECL or LVDS Clock Oscillator FEATURES • • • • • • • • • • • Standard 7.0mm x 5.0mm, 6-Pad Surface Mount Package Low Phase Jitter, 0.5ps ... CTS
Original
datasheet

3 pages,
228.38 Kb

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Abstract: frequency control. ORDERING INFORMATION 635 OUTPUT TYPE P = PECL, Pin 1 Enable Pin 2 N.C. (standard) L = LVDS, Pin 1 Enable Pin 2 N.C. (standard) E = PECL, Pin 2 Enable Pin 1 N.C. V = LVDS, Pin 2 Enable , Model 635 LVPECL or LVDS CLOCK OSCILLATOR FEATURES · · · · · · · · · · Standard 7x5mm Surface , Bandwidth 12 kHz - 20 MHz Pin Pin Pin Pin 1 1 1 1 or or or or Pin Pin Pin Pin 2 2 2 2 Logic Logic Logic , Load @ 20% - 80% Levels Between Outputs @ 1.25V RL = 100 Ohms LVDS Load LVDS Load LVDS Load @ 20% - 80 ... CTS
Original
datasheet

4 pages,
130.69 Kb

TEXT
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Abstract: 2.5V CMOS 1.8V CMOS 256MB 256MB DDR2 Dual Channel (x72) 125 MHz XTAL CMOS + LVDS USB 2.0 , . Table 2–5. MAX II Device Pinout (Part 1 of 9) MAX II Pin Number I/O Standard Signal Direction , Table 2–5. MAX II Device Pinout (Part 2 of 9) MAX II Pin Number I/O Standard Signal Direction , 3 of 9) MAX II Pin Number I/O Standard Signal Direction Schematic Signal Name R14 , (Part 4 of 9) MAX II Pin Number I/O Standard Signal Direction Schematic Signal Name D14 ... Altera
Original
datasheet

90 pages,
1467.32 Kb

TEXT
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Abstract: . (standard) L = LVDS, Pin 1 Enable Pin 2 N.C. (standard) E = PECL, Pin 2 Enable Pin 1 N.C. V = LVDS, Pin 2 , LVPECL or LVDS CLOCK OSCILLATOR FEATURES · · · · · · · · · · Standard 7x5mm Surface Mount Footprint Differential LVPECL or LVDS Output Low Phase Jitter, NON-Multiplied Frequency Range 19.44 ­ 212.50 MHz Frequency Stability, ±50 ppm Standard (± 25 ppm and ± 100 ppm available) +2.5Vdc or +3.3Vdc , Between Outputs @ 1.25V RL = 100 Ohms LVDS Load LVDS Load LVDS Load @ 20% - 80% Levels Electrical and ... CTS
Original
datasheet

5 pages,
131.83 Kb

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Abstract: , lowvoltage backplanes, or data channels. This application note explains the LVDS standard and describes how , Transmission The LVDS I/O standard utilizes a low-voltage differential data transmission scheme without , potential data rate. To provide switching speeds in the hundreds-of-Mbps range, the LVDS standard defines , is a power-efficient standard. Because LVDS has a low switching voltage (typically 350 mV), the AC , LVDS standard also provides the important advantage of reduced electromagnetic interference (EMI). EMI ... Altera
Original
datasheet

76 pages,
1653.49 Kb

vhdl code for lvds driver ldvs connector EP20K600E EP20K400E EP20K1000E altlvds_tx 10226-1A10VE TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
power physical layer interface. The IEEE 1596.3 SCI LVDS standard goes further and defines the data fraction of the power." This need has been addressed by the IEEE 1596.3 SCI LVDS standard that advantages of LVDS technology make it likely that it will become the next data transmission standard for /DS90C032TM /DS90C032TM are point-to-point drivers/receivers with 155.5 Mbps data rates, the LVDS standard can be ). PARAMETER RS-422 RS-422 PECL LVDS Differential Driver Output Voltage + 2.0 V +
/datasheets/files/national/docs/wcd00038/wcd038e3.htm
National 03/04/1998 10.17 Kb HTM wcd038e3.htm
IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard National P/N DS90C032 DS90C032 - LVDS Quad CMOS Differential Line Receiver [Information as of 14-Dec-98] DS90C032 DS90C032 LVDS Quad CMOS rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. range option Available in surface mount packaging (SOIC) and (LCC) Pin compatible with DS26C32A DS26C32A
/datasheets/files/national/htm/nsc05442.htm
National 18/12/1998 15.11 Kb HTM nsc05442.htm
compatible with DS26C31 DS26C31, MB571 MB571 (PECL) and 41LG (PECL) Compatible with IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit Drawing (SMD) 5962-95833 National P/N DS90C031 DS90C031 - LVDS Quad CMOS Differential Line Driver [Information as of 14-Dec-98] DS90C031 DS90C031 LVDS Quad CMOS Differential Line Driver Generic P/N MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The accepts TTL/CMOS input
/datasheets/files/national/htm/nsc05441.htm
National 18/12/1998 14.51 Kb HTM nsc05441.htm
compatible with DS26C31 DS26C31, MB571 MB571 (PECL) and 41LG (PECL) Compatible with IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit Drawing (SMD) 5962-95833 National P/N DS90C031 DS90C031 - LVDS Quad CMOS Differential Line Driver [Information as of 12-Aug-99] DS90C031 DS90C031      (Improved Performance device(s): DS90C031B DS90C031B ) LVDS Quad Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The accepts TTL/CMOS
/datasheets/files/national/htm/nsc02271-v1.htm
National 13/08/1999 17.93 Kb HTM nsc02271-v1.htm
compatible with DS26C31 DS26C31, MB571 MB571 (PECL) and 41LG (PECL) Compatible with IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit Drawing (SMD) 5962-95833 National P/N DS90C031 DS90C031 - LVDS Quad CMOS Differential Line Driver [Information as of 1-Apr-98] DS90C031 DS90C031 LVDS Quad CMOS Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The accepts TTL/CMOS
/datasheets/files/national/docs/wcd00004/wcd004da.htm
National 03/04/1998 10.44 Kb HTM wcd004da.htm
Available in surface mount packaging (SOIC) and (LCC) Pin compatible with DS26C31 DS26C31, MB571 MB571 (PECL) and 41LG (PECL) Compatible with IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard National P/N DS90C031 DS90C031 - LVDS Quad CMOS Differential Line Driver [Information as of 11-Sep-98] DS90C031 DS90C031 LVDS Quad CMOS Differential Line Driver Generic P/N Differential Signaling (LVDS) technology. The accepts TTL/CMOS input levels and translates them to low
/datasheets/files/national/htm/nsc02980-v4.htm
National 16/09/1998 13.37 Kb HTM nsc02980-v4.htm
, short and terminated input fail-safe Compatible with IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit Drawing (SMD) 5962-95834 National P/N DS90C032 DS90C032 - LVDS Quad CMOS Differential Line Receiver    Jobs     Products > Analog - Interface > LVDS Circuits LVDS Quad CMOS Differential Line Receiver     See Also:    DS90C032B DS90C032B - high Z
/datasheets/files/national/htm/nsc02633-v2.htm
National 14/09/2000 23.84 Kb HTM nsc02633-v2.htm
LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit National P/N DS90C032 DS90C032 - LVDS Quad CMOS Differential Line Receiver [Information as of 11-Sep-98] DS90C032 DS90C032 LVDS Quad CMOS 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The accepts low Available in surface mount packaging (SOIC) and (LCC) Pin compatible with DS26C32A DS26C32A, MB570 MB570 (PECL) and
/datasheets/files/national/htm/nsc02981-v4.htm
National 16/09/1998 14.09 Kb HTM nsc02981-v4.htm
generated self-test voltage levels. TLV1544CD TLV1544CD 16-pin SOIC $3.28 TLV1544ID TLV1544ID 16-pin SOIC $3.64 TLV1548CDBLE TLV1548CDBLE 20-pin TSSOP $3.64 TLV1548IDBLE TLV1548IDBLE 20-pin TSSOP $4.13 RS-485 RS-485 differential transceiver The SN75LBC184 SN75LBC184 is the first '176 standard footprint RS-485 RS-485 SN65LBC184 SN65LBC184 8-pin DIP and SOIC $2.72 SN75LBC184 SN75LBC184 8-pin DIP and SOIC $2.44 introduced the industry's first family of 3.3-V transmitter/receiver devices satisfying the emerging LVDS
/datasheets/files/texas-instruments/sc/docs/integrat/97feb/product.htm
Texas Instruments 14/02/1997 10.4 Kb HTM product.htm
SCI LVDS standard Conforms to ANSI/TIA/EIA-644 ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit National P/N DS90C031 DS90C031 - LVDS Quad CMOS Differential Line Driver >   Products > Analog - Interface > LVDS Circuits > Line Drivers, Receivers and Transceivers > DS90C031 DS90C031 DS90C031 DS90C031     LVDS Quad CMOS Differential Line Driver     excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The
/datasheets/files/national/htm/nsc03765-v2.htm
National 28/06/2001 24.42 Kb HTM nsc03765-v2.htm