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Part Manufacturer Description Datasheet BUY
SN7476N-00 Texas Instruments TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 visit Texas Instruments
SN7476N-10 Texas Instruments TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 visit Texas Instruments
SN7476J Texas Instruments IC TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch visit Texas Instruments
SN7476J-00 Texas Instruments IC TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch visit Texas Instruments
ADCS7476AIMFE Texas Instruments 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6, SOT-23, 6 PIN visit Texas Instruments
TTL-LOGIC-DATABOOK Texas Instruments TTL-LOGIC-DATABOOK visit Texas Instruments

logic ic 7476 flip-flop pin diagram

Catalog Datasheet MFG & Type PDF Document Tags

logic ic 7476 pin diagram

Abstract: and pin diagram of IC 7476 FLIP-FLOP LOGIC DIAGRAM MODE SELECT- TRUTH TABLE OPERATING MODE ®D Asynchronous Set Asynchronous , 54/7476 54H/74H76 54LS/74LS76 DESCRIPTION The "76'' is a Dual JK Flip-Flop w ith individ ual J, K, Clock, Set and Reset inputs. The 7476 and 74H76 are positive pulse triggered flip-flops. JK inform ation , levels as shown in the Truth Table. LOGIC SYMBOL 2 7 4- J SD Q -15 9 , PACKAGES PIN CONF. Fig A Fig A Fig A Fig A Fig A Fig A (See Section 9 for further Package and Ordering
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74LS76 logic ic 7476 pin diagram and pin diagram of IC 7476 logic ic 7476 flip-flop pin diagram 7476 truth table pin diagram for IC 7476 pin configuration of 74LS76 IC N7476N N74H76N N74LS76N N74H76F N74LS76F

74LS76P

Abstract: 74LS76D 76 CO NNECTIO N DIAGRAM PINOUT A /54/7476 0 / / o / c ^ ^S4H/74H76 Gf / ci 7 ^ 54LS/74LS76£ v , both Q and Q HIGH LOGIC SYMBOL The 'LS76 is a dual JK, negative edge-triggered flip -flo p also , PIN PKGS Plastic DIP (PI Ceramic DIP (D) Flatpak (F) ? 3 ? 8 COMMERCIAL GRADE Vcc = +5.0 V , MILITARY GRADE Vcc = +5.0 V ±10%, Ta = -55° C to +125°C PKG TYPE 9B Vcc = Pin 5 GND = Pin 13 OUT , 3 for U.L. definitions PIN NAMES J l, J2. K l, «2 C P , CPz C o i, C d 2 SOI, §02 Q i, Q i. 02. O
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74LS76P 74LS76D IC 7476 pinout 7476PC 74LS76 pinout IC 74LS76 54/74LS 54/74H CLS76

logic ic 7476 pin diagram

Abstract: and pin diagram of IC 7476 , the d ata from the m aster is transferred to th e slave. The logic state of J and K inputs m ust not , edge of the clock pulse. A low logic level on the preset or clear inputs will se t or reset the outputs regardless o f th e logic levels of the other inputs. Features Alternate M ilitary/A erospace device , specifications. Connection Diagram D ual-ln-Line Package K1 16 Q1 15 Q1 14 GND 13 K2 12 Q2 11 Q2 10 J2 9 , , D M 5476J, D M 5476W or DM 7476N See Package N um ber J16A , N 16E or W 16A H = High Logic Level
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circuit diagram with IC 7476 IC 7476 JK Features of IC 7476 DM7476

truth table for ic 74138

Abstract: 16CUDSLR cycles Elim ination of un u sed gates A utom atic pin and p art assignm ents SALSA logic m inim ization , ation. Figure 1. A+PLUS Block Diagram A+PLUS Simulation Virtual Logic Analyzer (V LA) Functional , Sim ulator (FS1M) V irtual Logic A nalyzer (VLA) Log ic M a p II p rog ra m m i ng so ft w a re D ocum , PLCAD-SUPREME & PLS-SUPREME A+PLUS Programmable Logic Development System & Software September , Description A+PLUS is a co m prehensive CAE system for designing logic w ith A ltera Classic EPLDs. A+PLUS
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truth table for ic 74138 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table
Abstract: le in 13" reel. U se suffix = SCX. Connection Diagram Logic Symbol Pin A ssignm ent for D , Logic Diagram DETAIL A DS009593-4 P lease note th a t th is dia g ra m is pro vid e d o n ly fo r , a g a tio n delays. w w w .fa ir c h ild s e m i.c o m 2 Unit Loading/Fan Out 74F Pin Nam , R C H II_ D E M IC O N D U C T O R t 74F779 8-Bit Bidirectional Binary Counter with , current 80 m A typ G uaranteed 4000V m inim um ESD protection Available in S O IC (300 mil only -
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74F779PC 74F779SC DS009593

S6B0108

Abstract: S6B0108B permission of LCD Driver IC Team. Precautions for Light Light has characteristics to move electrons in the , the IC on all parts of the surface area, the top, bottom and the sides of the chip. Follow the , the IC at substrate (board or glass) or product design stage. 2. Always test and inspect , . 1 BLOCK DIAGRAM . 2 PIN CONFIGURATION
Samsung Electronics
Original
S6B0108 S6B0755 S6B0107 S6B0108B pin DIAGRAM OF IC 7476 d flip flop S6B2107 COM64 SEG64 COM65

itt 7441

Abstract: 7446 BCD to 7-segment functions with more than 100 MSI devices from which to choose. The family consists of logic, memory and , ) 74H74 (9H74) 74S74 (9S74) 7475 (9375) 7476 (9N76) 74H76 (9H76) 7477 (9377) 74H78 (9H78) 7480 (9380) 7481 , JK M/S Flip-Flop 5-116 NAND Gate 9N76 (54/7476) Dual JK M/S Flip-Flop 5-118 9N27 (54/7427) Triple 3 , ns _TL 9N73/7473 â'¢ 9N107/74107 20 MHz/25 ns 9H73/74H73 30 MHz/22 ns 9N76/7476 20 MHz/25 ns 9H76 , 90 440 * *HLL = HIGH Level Logic * * For Data Sheet write FSC, P.O. Box 880A, Mt. View, California
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itt 7441 7446 BCD to 7-segment transistor fcs 9012 Fairchild dtl catalog Truth Table 74192 7400 quad 2-input NAND gate truth-table 93L00 93S00 APP-161

IC 3-8 decoder 74138 pin diagram

Abstract: full adder using ic 74138 common logic Macros. FEATURES · · · · · · 1.4 ns g a te d e la y ty p ic a l. (2 -in p u t N A N D g , CARRIERS (LCC) C E R A M IC J -L E A D E D CHIP CARRIERS (JLCC) C E R A M IC PIN GRID ARR AY (PGA) PACKAGE , bipolar logic. The AV (MB65xxxx) series is an ideal choice for LSI and VLSI applications that require up , arrays include, in addition to the 1.5K, 2.3K, and 4K gates of logic, two basic sizes of static , and address register logic so that they may be split and used as two independent memories without
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IC 3-8 decoder 74138 pin diagram full adder using ic 74138 full adder using Multiplexer IC 74151 pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 circuit diagram for IC 7483 full adder MB65XXXX MB66XXXX MB67XXXX C4002

pin DIAGRAM OF IC 7476 d flip flop

Abstract: Functional block diagram 65 4 ELECTRONICS KS0108B 64CH SEGMENT DRIVER FOR DOT MATRIX LCD PIN , 64CH SEGMENT DRIVER FOR DOT MATRIX LCD B LO C K DIAGRAM E KW TR BBBTBl OUTPUT REGISTER SUFFEI , MATRIX LCD PAD DIAGRAM (Chip Layout for the 100QFP) 656 ELECTRONICS KS0108B 64CH SEGMENT , DIAGRAM (Chip Layout for the 100TQFP) @ 0 0 0 (3 0 0 © 0 0 0 E OS 13@@013130130 0 0 B 0 0 , -493.2 -620.4 -747.6 -874.8 -1002 -1129.2 -1256.4 -1849 -1849 -1849 -1849 -1849 -1849 -1849 -1849 -1849
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KSQ108B KS0107B QFP-1420C TQFP-1414 100TQ KS01Q7B

IC 74151 diagram and truth table

Abstract: 7474 ic from which to choose. The family consists of logic, memory and interface functions, and is a unique , . NUMERICAL INDEX OF DEVICES D E V IC E 4100 4101 4102 4103 4106 5033 5400 (9N00) 54H00 (9H00) 54S00 (9S00 , (9N39) 5440 (9N40) 54H40 (9H40) 54S40 (9S40) 5442(9352) 5443 (9353) 5444 (9354) D E V IC E 54H30 (9H30 , be an n o u n c e d . 2-1 NUMERICAL INDEX OF DEVICES D E V IC E 54S74 (9S74) 5475 (9375) 5476 , 8-265 8-265 8-272 8-66 8-117 8-54 8-54 8-276 8-279 8-282 8-282 8-283 8-283 8-284 D E V IC E 54181
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7474 ic EQUIVALENT 9974 GP 2x4 demultiplexer using ic 74155 APPLICATION NOTES CD 7474 IC 7447 BCD to 7-segment IC 7404 7406 truth table 54S/74S

ALU IC 74381

Abstract: encoder IC 74147 O r C A D , V ie w lo g ic , Fu tu re N e t, M e n to r G ra p h ics, and V a lid Logic. T he M A X , ., flip-flops, logic ou tp u ts) d u rin g sim ulation. Tag-andd rag ed itin g can be used to q u ic k ly m o ve , packages from M e n to r G rap h ics, V a lid Logic, and V ie w lo g ic , but users can also create their o , ), w h ic h rem oves an y unused logic w ith in the design. T he Log ic Syn th e siz er uses expert , PLDS-HPS, PLS-HPS, PLS-OS & PLS-ES A N & r * a \ MAX+PLUS II Programmable Logic
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ALU IC 74381 encoder IC 74147 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table

12864B

Abstract: 12864b graphic LCD ) VEE = output pin of on-board negative voltage generator Figure 2. System Block Diagram VEE VR , Ground to the Logic Ground (VSS, Pin 2), use an "0805" package 0 ohm resistor to close jumper JE. Close JE. Logic Ground 0000 "0805" package 0 ohm resistor JE Frame Ground JE Pin 2 , DIRECTION INTERFACE PIN FUNCTIONS 1 VDD +5.0v ­ Supply voltage for logic 2 VSS 0v , - - - - 8 System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Crystalfontz America
Original
CFAG12864B-WGH-V 12864B 12864b graphic LCD S6B0107 S6B0108 14 pin LCD samsung 4 inches 12864B v.2 CFAIEL2P01

12864B

Abstract: S6B0107 S6B0108 Diagram above) is a trace that connects some of the bezel tabs. To connect Frame Ground to the Logic Ground (VSS, Pin 2), use an "0805" package 0 ohm resistor to close jumper JE. Close JE. Logic Ground , DIRECTION INTERFACE PIN FUNCTIONS 1 VDD +5.0v ­ Supply voltage for logic 2 VSS 0v , - - - - 8 System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - , - - - - - - 10 Interface Pin Functions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Crystalfontz America
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CFAG12864B-WGH-N 12864-B 5v dc to 110v ac 400 hz inverter 12864b graphic LCD v2.0 s53 photo S6B0107B 100-c23

p 12864b

Abstract: S6B0108B Diagram above) is a trace that connects some of the bezel tabs. To connect Frame Ground to the Logic Ground (VSS, Pin 2), use an "0805" package 0 ohm resistor to close jumper JE. Close JE. Logic Ground , DIRECTION INTERFACE PIN FUNCTIONS 1 VDD +5.0v ­ Supply voltage for logic 2 VSS 0v , - - - - 8 System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - , - - - - - - 10 Interface Pin Functions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Crystalfontz America
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CFAG12864B-YYH-N p 12864b t 8748 12864b+graphic+LCD+v2.0 CFAG12864B-TFH-V led matrix 2388 128 64 graphic LCD COM66 COM67 COM128

12864b graphic LCD v2.0

Abstract: p 12864b D/I +5V RST Frame Ground Jumper JE Logic Ground (VSS) VEE = output pin of , (VSS, Pin 2), use an "0805" package 0 ohm resistor to close jumper JE. Close JE. Logic Ground , DIRECTION INTERFACE PIN FUNCTIONS 1 VDD +5.0v ­ Supply voltage for logic 2 VSS 0v , - - - - 8 System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - , - - - - - - 10 Interface Pin Functions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Crystalfontz America
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CFAG12864B-YYH-V ATMEGA32 using light control 12864b v2.0 samsung processor connections 12864B LCD pin diagram of LCD dot matrix display

12864B

Abstract: S6B0108B D/I +5V RST Frame Ground Jumper JE Logic Ground (VSS) VEE = output pin of , (VSS, Pin 2), use an "0805" package 0 ohm resistor to close jumper JE. Close JE. Logic Ground , DIRECTION INTERFACE PIN FUNCTIONS 1 VDD +5.0v ­ Supply voltage for logic 2 VSS 0v , - - - - 8 System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - , - - - - - - 10 Interface Pin Functions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Crystalfontz America
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12864B display up down counter using IC 7476 CFAG12864B atmel s52 microcontroller CFAG12864BTFHV Samsung S6B0108

12864b graphic LCD v2.0

Abstract: 12864b graphic LCD ) VEE = output pin of on-board negative voltage generator Figure 2. System Block Diagram VEE VR , Ground to the Logic Ground (VSS, Pin 2), use an "0805" package 0 ohm resistor to close jumper JE. Close JE. Logic Ground 0000 "0805" package 0 ohm resistor JE Frame Ground JE Pin 2 , DIRECTION INTERFACE PIN FUNCTIONS 1 VDD +5.0v ­ Supply voltage for logic 2 VSS 0v , - - - - 8 System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Crystalfontz America
Original
CFAG12864B-TMI-V Resister 0805 samsung samsung s6 C19 Connector scrolling led display atmel Samsung - S6B0108

74LS115

Abstract: 74LS273 5-49 5-52 5-58 For AC Waveforms see page 5-323. Wrong pin numbers on Logic Symbol and Connection Diagram. Pin numbers in Logic Diagram are correct, except that legends beside Pins 2, 3, and 4 are , Diagram. Connection dot missing at output of second NAND gate in first column. Logic_Symbols and Pin Names , . Connection diagram. Delete the connection from Pin 20 to the Enable gate input. Icc Power Supply current should be 25 mA max. Logic Symbol should have inversion bubbles on the outputs. Logic Diagram. Delete
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74LS115 74LS273 74LS00 QUAD 2-INPUT NAND GATE 74LS189 equivalent 74LS265 74LS93A

A5 GNC mosfet

Abstract: TCA345 largest electronic publisher in the world. Contents Quick Guide to IC Master . 2 Part Number Index , has been expended to make IC MASTER accurate and complete, but IC MASTER cannot assume responsibility , may be reproduced without express written permission of the publishers. Copyright IC MASTER, 1977. IC , Corp., 643 Stewart Ave., Garden City, N.Y. 11530. TWX: 510-222-1673. @ IC MASTER 1977 1 1 II quick guide to your IC fflASTER APPLICATION To prepare this directory each IC NOTE manufacturer reviewed his
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A5 GNC mosfet TCA345 INTERSIL application bulletin TP4081 AY-5-4057 mosfet A5 GNC AMI6800H AMI6800 VMI6800

74L02

Abstract: Mechanically Identical to SN 5476/SM 7476 functional block diagram (each flip-flop) S N 54LS 76, S N 74LS , T R A N S I S T O R LO G IC SCHOTTKY+ TTL MS! _ B U L L E T IN , desirable features of, and are completely compatible with, most of the popular saturated logic circuits. Schottky T T L circuits currently offer the best speed-power product o f any high-speed logic family , 0 .4 1 4 10 40 100 Typical Power Dissipationâ'"mW - i- T y p ic a l s a t u r a t
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74L02 54LS/74LS 54H/74H 54L/74L
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