NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| SN7474DR | Texas Instruments | Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-SOIC 0 to 70 | 
|
|
|
| SN7474N3 | Texas Instruments | Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-PDIP 0 to 70 |
|
|
|
| SN7474N | Texas Instruments | IC TTL/H/L SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, PLASTIC, MS-001AA, DIP-14, FF/Latch |
|
|
|
| SN7474J | Texas Instruments | IC TTL/H/L SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, CERAMIC, DIP-14, FF/Latch |
|
|
|
| SN7474N-00 | Texas Instruments | IC TTL/H/L SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, PLASTIC, DIP-14, FF/Latch |
|
|
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: clock pulse. DUAL D FLIP FLOP GENERAL DESCRIPTION The 7474 is designed for use where the flexibility of 2 inputs is not required. It has only a single DATA (D) input. The logical level applied to this , TTL INTEGRATED CIRCUITS DUAL JK MASTER/SLAVE FLIP FLOP GENERAL DESCRIPTION The flip flops described herein are TTI, (Transistor-Transistor Logic) dual ]K Master/Slave flip flops. Asynchrorous CLEAR inputs are provided on the flip flops The device is totally monolithic and designed for use in high speed ... | OCR Scan |
1 pages, |
7474 d flip 7474 d-flip flop 7474 flip flop 7474 flip flops ic for jk flip flop IC 7474 flipflop 7474 jk flip flop ic 7474 truth table master slave jk flip flop 7474 D flip flop features of ic 7474 d flip flop 7474 ic 7474 j-k flip flop datasheet abstract |
|
|||
| Abstract: Quad D flip flop Synchronous decimal counter with set and reset inputs and N-input Synchronous 4-bit , flop Dual J-K flip-flop with clear Dual J-K pos. edge trig. flip flop with preset.+clear Dual J-K Neg edge triggered flip flop with preset and clear Dual J-K Neg edge triggered flip flop with , Quad 2-input NOR gate with N-input JK-master-slave flip flop with 2J and K inputs and N-input on slave section JK-master-slave flip flop with N-input on master slave section JK-master-slave flip ... | Original |
5 pages, |
FZJ115 74hc4000 astable multivibrator 74LS14 ic D flip flop 7474 ic 74ls83 FZL145S IC 74LS192 FZH195 FZJ125 74LS104 FZH265B FZJ105 FZH115 FZH205 74INTEGRATED 74INTEGRATED abstract |
|
|||
| Abstract: the counter D and flip flop F is to the proper phasing for separation of data and clock. It , flip flop F at each 8 count and normally provides a 50% window every 2 j1sec. Each time a bit is , the 00 output of counter E the outputOC causes the flip flop to reverse the sampling Windows. , Address Marks for Index,1 D, and Data are identified by a particular pattern not repeated in the , ~_~ (IFUs~D) FD1771 FD1771 SYSTEM BLOCK DIAGRAM FIG1 COR P OR A , I 0 IV c·a ... | Original |
12 pages, |
external DIAGRAM OF IC 7474 floppy Stepping Motors diagram western digital FD1771 internal circuit of ic 7474 underrun floppy diskette 1771 floppy fr1502 western digital data separator 7474 D flip flop pin DIAGRAM OF IC 7474 d flip flop INTERNAL DIAGRAM OF IC 7474 FD1771 FD1771 abstract |
|
|||
| Abstract: selector 2102-1/TMS4033NL 2102-1/TMS4033NL 1024 x 1 static memory 7402 quad NOR gate 74174 hex D flip flop Resistors , AND-OR-INVERT gate 7474 dual D flip-flop 7404 hex inverter 7493 binary counter 7408 quad AND gate 7432 quad , oscilloscopes. This "dot clock" is used to toggle flip flop IC4B which regulates the transmission data from , should match with that shown on the component layout drawing for each of the IC's. Integrated circuits IC-27 - IC-29 and IC-31 - IC-33 are MOS IC's and should be handled as little as possible during ... | Original |
17 pages, |
7404 hex inverter 7474 D flip-flop diode 1n5402 IC AND GATE 7408 pin diagram of ic 7493 IC 7408 ic 7404 not gate datasheet pin diagram of IC 7402 14 pin ic 7404 datasheet 7404 not gate 7493 binary counter pin DIAGRAM OF IC 7486 GT-6144 GT-6144 GT-6144 abstract |
|
|||
| Abstract: output data. Simple gate delays can be employed or the Status can be made the input of a D flip flop , output of the MSB flip flop is set to logic "0", the outputs of the other bit flip flops are set to logic , These A/D converters are available with either of four input voltage ranges (0 to + 10V, 0 to - 10V, ± , reference or, for improved overall accuracy, a model that uses an external reference. MN5610 MN5610 A/D's are , supplies, the MN5610 MN5610 Series is similar in function and fabrication to Micro Networks MN5210 MN5210 Series A/D ... | OCR Scan |
6 pages, |
MN343 of ic7400 d flip flop 7474 7474 flip flops IC 7474 data sheet IC TTl 7474 free IC TTL 7400 free IC-7400 14 pin pin DIAGRAM OF IC 7400 7474 pin out diagram ic 7474 pin diagram IC7400 7474 D flip flop free MIL-STD-883 MIL-STD-883 abstract |
|
|||
| Abstract: SN74ALS90N GLC556 SN74ALS107N MC74HC123AN MJE13001 SN74ALS154 IRF9634 in558n IL311AN SN74ALS93N iff4n60 IL311ANM ) IC's Class Pin to Pin Compatibility Part IL34119N IL34119N, D Mono MC34119 MC34119 IL386N IL386N, D LM386 LM386 , Bus. 9 Microcontrollers, Drivers, Peripherals IC , IC. 11 LED Driver Circuits , . 12 TV and Audio IC . 14 Vision and Sound IF Demodulation IC ... | Original |
110 pages, |
sound sensor alarm NE555 tda8362a tda8890 ic D flip flop 7474 IZ1325 ILa1519B1Q IL91214AN tda8362b datasheet abstract |
|
|||
| Abstract: UtgÃ¥va 2005-03-24 Alla artiklar i katalogen finns normalt i lager men det tillkommer och utgÃ¥r kontinuerligt. För aktuell information om prisvärt industriöverskott / surplus surfa in pÃ¥: http://www.labb.se/surplus.htm Tel: 08-641 86 30 Fax: 08-641 87 30 E-post: info@labb.se Internet: http://www.labb.se 2 FÃ-RSÄLJNINGSVILLKOR: Betalningsvillkor: All försäljning sker kontant, mot postförskott eller (efter överenskommelse) mot faktura. Efter fakturans förfallodag debiteras drö ... | Original |
120 pages, |
lm3914 TDA3650 100W TDA2030 TRANSISTOR PBD3511 KOR 2310 transistor 7 segment to bcd converter 74c915 datasheet abstract |
|
|||
| Abstract: QuickWorks« User Manual with SpDE Reference (Release 2009.2.1) Contact Information QuickLogic Corporation 1277 Orleans Drive Sunnyvale, CA 94089 Phone: (408) 990-4000 (US) (905) 940-4149 (Canada) +(44) 1932-57-9011 (Europe) +(852) 2567-5441 (Asia) E-mail: info@quicklogic.com Sales: America-sales@quicklogic.com Europe-sales@quicklogic.com Asia-sales@quicklogic.com Japan-sales@quicklogic.com Support:www.quicklogic.com/support Internet:www.quicklogic.com Notice of Disclaimer ... | Original |
660 pages, |
QL8150 ttl74 74107 footprint 74373 cmos dual s-r latch 74374 3-8 decoder 74138 pin diagram QL3004 7474 D flip-flop active hdl images of pin configuration of IC 74138 synopsis of usb serial interface engine RAM1024 74594 datasheet abstract |
|
|||
| Abstract: 1 BHIAB Electronics Du som söker besvärliga IC & transistorer, börja Ditt sökande hos oss  vi har fler typer på lager än man rimlingen kan begära av ett företag Denna utgå visar lagerartiklar , Hylslist .146 Högtalarkontakt.153 IC  , Kolfilmsmotstånd 1/4W Kolfilmsmotstån d 1/4W Kolfilmsmotstånd 1/4W Kolfilmsmotstånd 1/4W Kolfilmsmotstånd 1/4W , tillkommer på samtliga priser www.bhiab.se 9 Trådlindat effektmotstånd. 5W 5% Mått D=7mm L=16.5mm ... | Original |
168 pages, |
k2645 equivalent datasheet abstract |
|
|||
| Abstract: of FFS (Flip Flop), malfunctions may occur. Because of this, it is necessary to use caution when , , BGA C Plastic DIP D Bare Chip F Plastic QFP H Ceramic DIP L Ceramic QFP *3 M R T 2 3 , A TCP BL 2 directions 0 B Tape & reel BACK 0 C TCP BR 2 directions 0 D , , output and bi-directional signals must be attached to I/O buffers. Due to CMOS IC's extreme , change only once during a single test vector event (cycle) to allow test vector set usage during IC ... | Original |
230 pages, |
epson ink level controller HV 953 U LT 862 RAM circuit diagram 0.18 um CMOS s1l60173 SK1002 TRANSISTOR BC 187 wa6 797 SK10018 TRANSISTOR PHL 641 msi ms 1731 rx 434 ask MF1246-04 S1L60000 MF1246-04 abstract |
|
|||
| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
|||||
| _out .model da_out vcdac .ENDS XLS74 XLS74 XLS74 XLS74 *7474 D Flip-Flop MCE Nodes: S,D,CP,R,QN,Q *MCE mixed-mode D Flip-Flop )=0V V(4)=4.5V .ENDS X7474 *74F74 74F74 74F74 74F74 D Flip-Flop MCE Nodes: S,D,CP,R,QN,Q *MCE mixed-mode D Flip-Flop 7410 .IC V(3)=0V V(4)=4.5V .ENDS X74HC74 X74HC74 X74HC74 X74HC74 *74LS74 74LS74 74LS74 74LS74 D Flip-Flop MCE Nodes: S,D,CP,R,QN,Q *MCE mixed-mode D Flip-Flop pkg:DIP14 DIP14 DIP14 DIP14 (A:4,2,3,1,6,5)(B:10,12,11,13,8,9) .SUBCKT X74LS74 X74LS74 X74LS74 X74LS74 10 7 5 8 3 4 XU1A 10 6 3 (3)=0V V(4)=4.5V .ENDS X74F74 X74F74 X74F74 X74F74 *74HC74 74HC74 74HC74 74HC74 D Flip-Flop MCE Nodes: S,D,CP,R,QN,Q *MCE mixed-mode D www.datasheetarchive.com/files/spicemodels/misc/modelos/7474.sub |
Spice Models | 21/02/2008 | 2.04 Kb | SUB | 7474.sub |
| *74LS74 74LS74 74LS74 74LS74 D Flip-Flop MCE Nodes: S,D,CP,R,QN,Q *MCE mixed-mode D Flip-Flop pkg:DIP14 DIP14 DIP14 DIP14 (A:4,2,3,1,6,5)(B:10,12,11,13,8,9) .SUBCKT X74LS74 X74LS74 X74LS74 X74LS74 10 7 5 8 3 4 XU1A 10 6 3 4 7410 XU1B 4 8 11 3 7410 XU1C 11 8 7 9 7410 XU2A 6 5 9 11 7410 XU2B 12 8 5 6 7410 XU2C 10 9 6 12 7410 .IC V(3)=0V V(4)=4.5V .ENDS X74LS74 X74LS74 X74LS74 X74LS74 www.datasheetarchive.com/files/spicemodels/misc/models/7474.sub |
Spice Models | 17/09/2010 | 0.3 Kb | SUB | 7474.sub |
| _delay=17n) .ends * * * * > Flip-Flop *SYM=T7474 *74HCT74 74HCT74 74HCT74 74HCT74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED *FLIP-FLOPS WITH PRESET & CLEAR * .subckt 74hct74 * * * * Flip-Flop *SYM=T74273 T74273 T74273 T74273 *74HCT273 74HCT273 74HCT273 74HCT273 OCTAL D-TYPE FLIP-FLOP 6;9 10 8;12 13 11:VCC=14 GND=7 anand [in1 in2] out ls_nand .model ls_nand d_nand(rise_delay=15n 1 in2] out ls_nor .model ls_nor d_nor(rise_delay=15n fall_delay=15n) .ends www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/74hct.lib |
Spice Models | 18/04/2010 | 8.24 Kb | LIB | 74hct.lib |
| * * * *SRC=54ACT74 54ACT74 54ACT74 54ACT74;54ACT74 54ACT74 54ACT74 54ACT74;CMOS;54ACTxx;D Flip-Flop *SYM=T7474 *54ACT74 54ACT74 54ACT74 54ACT74 DUAL D-TYPE EDGE-TRIGGERED *FLIP-FLOPS ;54ACT174 54ACT174 54ACT174 54ACT174;CMOS;54ACTxx;D-type Flip-Flop *SYM=T74174 T74174 T74174 T74174 *54ACT174 54ACT174 54ACT174 54ACT174 HEX D-TYPE FLIP-FLOPS WITH CLEAR ACTxx;D-type Flip-Flop *SYM=T74175 T74175 T74175 T74175 *54ACT175 54ACT175 54ACT175 54ACT175 QUAD D-TYPE FLIP-FLOPS WITH CLEAR * .subckt 54act175 ls_dff .model ls_dff d_dff(clk_delay=1p rise_delay=6.3n + fall_delay=6.8n ic=1) .ends * * * *SRC=54ACT109 54ACT109 54ACT109 54ACT109;54ACT109 54ACT109 54ACT109 54ACT109;CMOS;54ACTxx;J-K Flip-Flop *SYM=T74109 T74109 T74109 T74109 *54ACT109 54ACT109 54ACT109 54ACT109 DUAL J-KBAR EDGE www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/54actxx.lib |
Spice Models | 18/04/2010 | 11.29 Kb | LIB | 54actxx.lib |
| * * * *SRC=54AS74 54AS74 54AS74 54AS74;54AS74 54AS74 54AS74 54AS74;TTL;54ASxx;D Flip-Flop *SYM=T7474 *54AS74 54AS74 54AS74 54AS74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED *FLIP-FLOPS WITH PRESET & CLEAR * .subckt 54AS74 54AS74 54AS74 54AS74 clrbar d clk prebar q qbar *FAMILY TTLin TTLin -type Flip-Flop *SYM=T74174 T74174 T74174 T74174 *54AS174 54AS174 54AS174 54AS174 HEX D-TYPE FLIP-FLOPS WITH CLEAR * .subckt 54AS174 54AS174 54AS174 54AS174 clrb clk d1 d2 ;54AS175A 54AS175A 54AS175A 54AS175A;TTL;54ASxx;D-type Flip-Flop *SYM=T74175 T74175 T74175 T74175 *54AS175A 54AS175A 54AS175A 54AS175A QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR _xor(rise_delay=5n fall_delay=5n) .ends * * * *SRC=54AS109 54AS109 54AS109 54AS109;54AS109 54AS109 54AS109 54AS109;TTL;54ASxx;J-K Flip-Flop www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/54as.lib |
Spice Models | 18/04/2010 | 11.8 Kb | LIB | 54as.lib |
| _delay=20n) .ends * * * *SRC=54HCT74 54HCT74 54HCT74 54HCT74;54HCT74 54HCT74 54HCT74 54HCT74;CMOS;54HCTxx;D Flip-Flop *SYM=T7474 *54HCT74 54HCT74 54HCT74 54HCT74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED *FLIP-FLOPS WITH PRESET & CLEAR * .subckt 54hct74 * * * * Flip-Flop *SYM=T74273 T74273 T74273 T74273 *54HCT273 54HCT273 54HCT273 54HCT273 OCTAL D-TYPE FLIP-FLOP 6;9 10 8;12 13 11:VCC=14 GND=7 anand [in1 in2] out ls_nand .model ls_nand d_nand(rise_delay=17n 1 in2] out ls_nor .model ls_nor d_nor(rise_delay=17n fall_delay=17n) .ends www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/54hctxx.lib |
Spice Models | 18/04/2010 | 8.27 Kb | LIB | 54hctxx.lib |
| _or(rise_delay=3.5n fall_delay=3.5n) .ends * * * *SRC=74AS74;74AS74;TTL;74ASxx;D Flip-Flop *SYM=T7474 *74AS74 74AS74 74AS74 74AS74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED *FLIP-FLOPS WITH PRESET & CLEAR -type Flip-Flop *SYM=T74174 T74174 T74174 T74174 *74AS174 74AS174 74AS174 74AS174 HEX D-TYPE FLIP-FLOPS WITH CLEAR * .subckt 74AS174 74AS174 74AS174 74AS174 clrb clk d1 d2 ASxx;D-type Flip-Flop *SYM=T74175 T74175 T74175 T74175 *74AS175A 74AS175A 74AS175A 74AS175A QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR * .subckt 74AS * * * *SRC=74AS109 74AS109 74AS109 74AS109;74AS109 74AS109 74AS109 74AS109;TTL;74ASxx;J-K Flip-Flop *SYM=T74109 T74109 T74109 T74109 *74AS109 74AS109 74AS109 74AS109 DUAL J-KBAR POSITIVE www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/74as.lib |
Spice Models | 18/04/2010 | 15.28 Kb | LIB | 74as.lib |
| * * * *SRC=74ALS74A 74ALS74A 74ALS74A 74ALS74A;74ALS74A 74ALS74A 74ALS74A 74ALS74A;TTL;74ALSxx;D Flip-Flop *SYM=T7474 *74ALS74A 74ALS74A 74ALS74A 74ALS74A DUAL D-TYPE POSITIVE-EDGE-TRIGGERED *FLIP-FLOPS WITH PRESET & CLEAR * .subckt 74ALS74A 74ALS74A 74ALS74A 74ALS74A clrbar d clk prebar q qbar *FAMILY TTLin TTLin * * * *SRC=74ALS174 74ALS174 74ALS174 74ALS174;74ALS174 74ALS174 74ALS174 74ALS174;TTL;74ALSxx;D-type Flip-Flop *SYM=T74174 T74174 T74174 T74174 *74ALS174 74ALS174 74ALS174 74ALS174 HEX D-TYPE FLIP-FLOPS WITH _pullup .ends * * * *SRC=74ALS175 74ALS175 74ALS175 74ALS175;74ALS175 74ALS175 74ALS175 74ALS175;TTL;74ALSxx;D-type Flip-Flop *SYM=T74175 T74175 T74175 T74175 *74ALS175 74ALS175 74ALS175 74ALS175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR * .subckt 74ALS175 74ALS175 74ALS175 74ALS175 clrb clk d1 d2 d3 d4 + q1 q2 www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/74als.lib |
Spice Models | 18/04/2010 | 26.73 Kb | LIB | 74als.lib |
| * * * *SRC=54ALS74A 54ALS74A 54ALS74A 54ALS74A;54ALS74A 54ALS74A 54ALS74A 54ALS74A;TTL;54ALSxx;D Flip-Flop *SYM=T7474 *54ALS74A 54ALS74A 54ALS74A 54ALS74A DUAL D-TYPE POSITIVE-EDGE-TRIGGERED *FLIP-FLOPS WITH PRESET & CLEAR * .subckt 54ALS74A 54ALS74A 54ALS74A 54ALS74A clrbar d clk prebar q qbar *FAMILY TTLin TTLin ;54ALS174 54ALS174 54ALS174 54ALS174;TTL;54ALSxx;D-type Flip-Flop *SYM=T74174 T74174 T74174 T74174 *54ALS174 54ALS174 54ALS174 54ALS174 HEX D-TYPE FLIP-FLOPS WITH CLEAR * * * *SRC=54ALS175 54ALS175 54ALS175 54ALS175;54ALS175 54ALS175 54ALS175 54ALS175;TTL;54ALSxx;D-type Flip-Flop *SYM=T74175 T74175 T74175 T74175 *54ALS175 54ALS175 54ALS175 54ALS175 QUADRUPLE D-TYPE FLIP-FLOPS .5n) .ends * * * *SRC=54ALS273 54ALS273 54ALS273 54ALS273;54ALS273 54ALS273 54ALS273 54ALS273;TTL;54ALSxx;D-type Flip-Flop *SYM www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/54als.lib |
Spice Models | 18/04/2010 | 24.84 Kb | LIB | 54als.lib |
| * * * *SRC=MC54F74 MC54F74 MC54F74 MC54F74;MC54F74 MC54F74 MC54F74 MC54F74;TTL;54Fxx;D Flip-Flop *SYM=T7474 *MC54F74 MC54F74 MC54F74 MC54F74 DUAL D-TYPE EDGE-TRIGGERED *FLIP-FLOPS -type Flip-Flop *SYM=T74174 T74174 T74174 T74174 *MC54F174 MC54F174 MC54F174 MC54F174 HEX D-TYPE FLIP-FLOPS WITH CLEAR * .subckt MC54F174 MC54F174 MC54F174 MC54F174 clrb clk d1 d -type Flip-Flop *SYM=T74175 T74175 T74175 T74175 *MC54F175 MC54F175 MC54F175 MC54F175 QUAD D-TYPE FLIP-FLOPS WITH CLEAR * .subckt MC54F175 MC54F175 MC54F175 MC54F175 clrb clk d1 _dff .model ls_dff d_dff(clk_delay=1p rise_delay=6.2n + fall_delay=7.5n ic=1) .ends * * * *SRC=MC54F109 MC54F109 MC54F109 MC54F109;MC54F109 MC54F109 MC54F109 MC54F109;TTL;54Fxx;J-K Flip-Flop *SYM=T74109 T74109 T74109 T74109 *MC54F109 MC54F109 MC54F109 MC54F109 DUAL J-KBAR EDGE-TRIGGERED FLIP-FLOPS www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/54fxx.lib |
Spice Models | 18/04/2010 | 23.91 Kb | LIB | 54fxx.lib |