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ADCS7476AIMFE Texas Instruments 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6, SOT-23, 6 PIN visit Texas Instruments
SN7476J Texas Instruments IC TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch visit Texas Instruments
SN7476J-00 Texas Instruments IC TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch visit Texas Instruments
SN7476N-00 Texas Instruments TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 visit Texas Instruments
SN7476N-10 Texas Instruments TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 visit Texas Instruments
ADCS7476AIMFX/NOPB Texas Instruments 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 & LLP 6-SOT-23 -40 to 125 visit Texas Instruments Buy

ic 7476 pin diagram

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logic ic 7476 pin diagram

Abstract: and pin diagram of IC 7476 54/7476 54H/74H76 54LS/74LS76 DESCRIPTION The "76'' is a Dual JK Flip-Flop w ith individ ual J, K, Clock, Set and Reset inputs. The 7476 and 74H76 are positive pulse triggered flip-flops. JK inform ation , PACKAGES PIN CONF. Fig A Fig A Fig A Fig A Fig A Fig A (See Section 9 for further Package and Ordering , V ± 1 0 % ; T a = - 5 5 ° C to *1 2 5 ° C V cc = Pin 5 GND = Pin 13 Plastic DIP N7476N · , N7476F PIN CONFIGURATION Flatpak S5476W [T H ]o , m q i INPUT AND OUTPUT LOADING AND
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74LS76 logic ic 7476 pin diagram and pin diagram of IC 7476 logic ic 7476 flip-flop pin diagram 7476 truth table pin diagram for IC 7476 pin configuration of 74LS76 IC N74H76N N74LS76N N74H76F N74LS76F S5476F

7476 truth table

Abstract: 2526-N,! DESCRIPTION PIN CONFIGURATION The 2526 is a high speed 5 184-bit Static Read-Only , Address 10 3 Address 9 BLOCK DIAGRAM Address 1 [7 O u tp u t Enable Address 5 VGG O u tp , IRPW t AD *AG *A1 *A2 ! oe TIMING DIAGRAM NOTE: Ati Times Measured from 50% Points, tr = , CODE CONVERSION DECIMAL ADDRESS " V NOTES: 1. BCD IC to A S C II in leftmost column, Baudot to , ' Blank Name 2 Data Cards Card No. 1 Column 1-9 10 11-19 20 21-29 73 74-76 77
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0I0I00I0I 0I00I0T0T NQISM3AN03 N-92S

logic ic 7476 pin diagram

Abstract: logic ic 74LS76 pin diagram /Connection Diagram 9314 D EV IC E NO . 4xD 4xD 4xD 4x(RS) 4xD 1 4xD i- 4xD 4xD , Dissipation mW (Typ) Logic/Connection Diagram X X X X X X X cn 05 O ro ro o , , JO Cd 13 Q 0 -8 Vcc = Pin 16 GND = Pin 8 UJ Vcc = Pin 14 GND = Pin 7 O Q UJ D57a , 0 0-13 ^ Cd Q z 5 o > p < o UJ O Vcc = Pm 4 GND = Pin 11 D57b 54H/74H103 12 7_ C
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logic ic 74LS76 pin diagram 74LS107 ic 74109 74109 dual JK 74LS109 IC 74196 54LS/74LS77 54LS/74LS75 54LS/74LS197 93L14 54LS/74LS196 54LS/74LS279

74LS76P

Abstract: 74LS76D 76 CO NNECTIO N DIAGRAM PINOUT A /54/7476 0 / / o / c ^ ^S4H/74H76 Gf / ci 7 ^ 54LS/74LS76£ v , PIN PKGS Plastic DIP (PI Ceramic DIP (D) Flatpak (F) ? 3 ? 8 COMMERCIAL GRADE Vcc = +5.0 V , MILITARY GRADE Vcc = +5.0 V ±10%, Ta = -55° C to +125°C PKG TYPE 9B Vcc = Pin 5 GND = Pin 13 OUT , 3 for U.L. definitions PIN NAMES J l, J2. K l, «2 C P , CPz C o i, C d 2 SOI, §02 Q i, Q i. 02. O , (U.L.) H IG H /L O W 0.5/0.25 2.0/0.5 1.5/0.5 1.5/0.5 10/5.0 (2.5) LÔ G IC D IA G R A M S (one half
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74LS76P 74LS76D IC 7476 pinout 7476PC 74LS76 pinout IC 74LS76 54/74LS 54/74H CLS76

d4094bc

Abstract: 4094BC . Connection Diagram Pin A ssignm ents fo r DIP and SOIC STROBE - DATA - CLOCK - Q 1Q2 - Q 31 2 3 4 5 6 7 , escription 16-Lead Sm all O utline Integrated C ircuit (SO IC), JED E C M S-013, 0.300" W ide 16-Lead Plastic , www.fairchildsenii.com CD4094BC Block Diagram o I C M Id < ~ > kT < £ > io 41 ? w w , . w w w.fairchildsemi. com 4 CD4094BC Tim ing Diagram Test Circuits and Tim ing Diagram s , 4 5 6 7 8 0.0926-0.1043 h 0.2914-0.2992 7.4-7.6 R 7] 0.394010.00- 0.0138-0.0200
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4094BC d4094bc 4094bcw D4094BC CD4094BCN S-001

logic ic 7476 pin diagram

Abstract: , Three-State, Non-Inverting D ecem 1992 ber Pinouts Features 20 PIN C ER AM IC DUAL-IN-LINE M , output enable input (OE) puts the I/O port in the high-impedance state when high. 20 PIN C ER AM IC , burn-in. 2. Each pin except VCC and GND will have a resistor of 680£2 ± 5% for dynam ic burn-in , Diagram Truth Table ONE OF 8 TRANSCEIVERS CO NTRO L INPUTS - o A DATA 9 OPERATION Ã"à , devices are sensitive to electrostatic discharge. U sers should follow proper I.C. Handling Procedures. C
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HCS245MS IL-STD-1835 CDIP2-T20 MIL-STD-1835 CDFP4-F20 HCS245M

logic ic 7476 pin diagram

Abstract: and pin diagram of IC 7476 specifications. Connection Diagram D ual-ln-Line Package K1 16 Q1 15 Q1 14 GND 13 K2 12 Q2 11 Q2 10 J2 9 , /or clear inputs return to their inactive (high) level. © 1 9 9 8 F a irch ild S e m ic o n d u c , Max 5.5 Min 4.75 2 0.8 - 0 .4 16 15 DM 7476 Norn 5 Max 5.25 V V V mA mA MHz Units oi -5 5 125 , ise noted 16-Lead C eram ic D ual-ln-Line P ackage (J) O rder N um ber 5476D M Q B or D M 5476J P , 1 rrn y (2.286) INDEX_ AREA n a lis ir PIN NO. 1_ IDENT I d ^ L Ü L 2 J L 3 J L 4
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7476n circuit diagram with IC 7476 IC 7476 JK Features of IC 7476 DM7476

74LS259N

Abstract: 74LS259M DM74LS259 8-Bit Addressable March 1998 F /M R C H II_ D tm S E M IC O N D U C T O R , 22 mA Latches Connection Diagram D ual-ln-Line Package V cc | 16 Function Table Inputs , F a irch ild S e m ic o n d u c to r C o rp o ra tio n D S006418 w w w .fa irch ild se m i.co , TYP 0 022 (0.5591MAX TYP r . I 0.015 (0.381) 0.G06 (0.152) MIN TYP C eram ic Leadiess C hip C arrier (E) O rder N um ber D M 54LS 259E P ackage N um ber E20A 16-Lead C eram ic D
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74LS259N 74LS259M 54LS259J 74LS259W 54LS259W 54LS259/BEAJC
Abstract: Diagram RAM 1 6 X 4 *o - *i a2 0' 0 A- A 15 -G 1 . ^ 3 - 3 CS- ^ 1 EN , w ww .fairchildsem i.com 74F189 Unit Loading/Fan Out U.L. Pin Names Ao~A3 CS WE Do- D3 O 0 , Data High Im pedance WE L H X Write Read Inhibit Block Diagram D0 D1 D 2 D 3 WE · CS w w , .5 V G round Pin Input Voltage (Note 2) Input C urrent (Note 2) Voltage Applied to O utput in HIGH , 0.3977-0.4133 10.10-10.50 16 15 14 13 12 11 10 9 nnnnnnnn 0.2914-0.2992 7.4-7.6 R 7] 0.394010.00- I -
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74F189SC 74F189SJ 74F189PC DS009493
Abstract: le in 13" reel. U se suffix = SCX. Connection Diagram Logic Symbol Pin A ssignm ent for D , a g a tio n delays. w w w .fa ir c h ild s e m i.c o m 2 Unit Loading/Fan Out 74F Pin Nam , R C H II_ D E M IC O N D U C T O R t 74F779 8-Bit Bidirectional Binary Counter with , current 80 m A typ G uaranteed 4000V m inim um ESD protection Available in S O IC (300 mil only , e m i.c o m 74F779 8-Bit Bidirectional Binary Counter with 3-STATE Outputs February 1998 F /M -
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74F779PC 74F779SC DS009593

logic ic 7476 pin diagram

Abstract: pin diagram for IC 7476 s t rip p le c a rry fo r e c o n o m ic a l e x p a n s io n S u m o u tp u t d e la y tim e 1 6.5 , irc u it (S O IC ), J E D E C M S -0 1 3 , 0 .3 0 0 W id e 1 6 -L e a d P la s tic D u a l-ln -L in e P a c k a g e (P D IP ), J E D E C M S -0 0 1 , 0 .3 0 0 W id e Logic Symbols Connection Diagram , - s2GND - - " " A0 Bo - s 0 Si 9 - S 3 Unit Loading/Fan Out 74F Pin Nam es A0 , u g h c a s c a d in g Logic Diagram w w w.fairchildsenii. com 74F583 Absolute Maximum
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74F583SC 74F583PC

logic ic 7476 pin diagram

Abstract: December 1992 Pinouts Features 20 PIN CERAMIC OUAL-IN-UNE MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD , radiation hardened, high-speed, CMOS/SOS Logic Family. 20 PIN CERAMIC FLAT PACK MIL-STD-1835 DESIGNATOR , (D suffix). 9 12 10 11 Functional Diagram Truth Table ONE OF 8 TRANSCEIVERS , . Users should follow proper I.C. Handling Procedures. Copyright © Harris Corporation 1992 j pjjQ , '0". 7-476 ' Specifications HCS245MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER
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Abstract: Connection Diagrams Pin Assignment for DIP and SOIC Ao 1 cs- 2 W Ë- 3 16 - VC C 15 " Al 14 - a 2 13 - , www.fairchildsenii.com 74F189 Unit Loading/Fan Out Pin Names Description U.L. HIGH/LOW A 0- A 3 CS WE D o_ D3 0 , plem ent o f Stored Data High Im pedance Block Diagram D0 D1 D2 D3 A 0 -A1 - , RatingSfNote S torage Tem perature A m bient Tem perature under Bias Junction Tem perature under Bias V CC Pin Potential to G round Pin Input Voltage (Note 2) Input C urrent (Note 2) Voltage Applied to O utp u t in HIGH -
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pin diagram for IC 7476

Abstract: 004II 1.3V. 3 w w w .fa ir c h ild s e m i.c o m Logic Diagram PARALLEL INPUTS Timing Diagram , DM74LS166 8-Bit Parallel-ln/Serial-Out Shift Registers A p ril 1 9 9 8 FAIRCHILD E M IC O N , Diagram D u a l-ln -L in e P a c k a g e PARALLEL VCC 16 SH IFT LOAD 15 IN PUT H 14 PARALLEL INPUTS , n t Î tra n sitio n o f th e clo ck © 1 9 9 8 F a irch ild S e m ic o n d u c to r C o rp o ra tio n D S006400 w w w .fa irc h ild s e m i.c o m Absolute Maximum Ratings e i \ / i+ S u p
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004II

logic ic 7476 pin diagram

Abstract: HCS245MS , Non-Inverting December 1992 Features Pinouts 20 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR , high-impedance state when high. 20 PIN CERAMIC FLAT PACK MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C , Package (D suffix). GND Functional Diagram Truth Table ONE OF 8 TRANSCEIVERS CONTROL , should follow proper I.C. Handling Procedures. Copyright © Harris Corporation 1992 7-475 File , as a logic "0". 7-476 Specifications HCS245MS TABLE 2. AC ELECTRICAL PERFORMANCE
Harris Semiconductor
Original

circuit diagram with IC 7476

Abstract: 600/DG34-1021-36-1012-F ADVANCE I^ IC R D N 32K, 64K X MT2LSYT3272B2, MT4LSYT6472B2 72 SYNCHRONOUS SRAM MODULE , , REGISTERED INPUTS AND BURST COUNTER PIN ASSIGNMENT (Top View) 160-Lead, Dual Read-out DIMM (SF-1) 32K x 72 , include the output enable (OE) and the clocks (CLK0 and CLK1) and burst mode (MODE). The PIN# SYMBOL PIN# 41 1 Vss 42 2 DQ0 3 Vcc2 43 44 4 DÛ2 DQ4 45 5 0Q6 46 6 7 47 DQP0 Vss 48 8 9 009 49 DQ11 50 10 11 , NC Vss PIN* 81 62 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106
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600/DG34-1021-36-1012-F 160-L MT2LSYT3272B2G-10 MT4LSYT6472B2G-10 256KB 512KB A3-A18

INTERNAL DIAGRAM OF IC 7476

Abstract: D4029BC a p p e n d in g th e suffix le tte r "X " to th e orde rin g code. Connection Diagram Pin A ssig nm ents for DIP, SO IC and SOP JA M INPUTS V DD CLOCK 15 UP/DOWN B IN A R Y / DECADE PRESET EN , escription 16-Lead Sm all O utline Integrated C ircuit (SO IC), JED EC M S-013, 0 .300" W ide body 16-Lead Sm , Semiconductor Corporation DS005960.prf www.fairchildsenii.com CD4029BC Logic Diagram CARRY w w , 0.2914-0.2992 7.4-7.6 R q 0.394010.00- 6 7 8 -iJ 0.0926-0.1043 0.0138-0.0200 0.350-0.508
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INTERNAL DIAGRAM OF IC 7476 D4029BC 4029bc cd4029bcn 7476 up down counter LD 7476 PS 4029BC

4 bit synchronous ic 7476

Abstract: logic ic 7476 pin diagram determined by the SCLK. REV. PrH FUNCTIONAL BLOCK DIAGRAM S CL K CO NT RO L LO G IC S DA TA CS A D 7476/A D 7477 G ND PRODUCT HIGHLIGHTS 1. First 10-/12-Bit ADCs in a SOT-23 package. 2 , ( 2 .50 ) RY A IN AL IM IC L N RE CH A P E AT T D PIN 1 0 .03 7 (0 .9 5 ) B S C 0 , 10-/12-B IT S UC CE S SIV E AP P RO X IM A TIO N AD C T /H RY A IN AL IM IC L N RE CH A , LSB typ RY A IN AL IM IC L N RE CH A P E AT T D ±1.5 Differential Nonlinearity2 Test
Analog Devices
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4 bit synchronous ic 7476 logic diagram of ic 7476 applications IC 7476 AD7476 AD7476ART AD7476BRT AD7476/AD7477 MC68HC16 68HC16

74hc595n

Abstract: 74HC595M "X " to th e o rd e rin g code. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP , -Lead Sm all O utline Integrated C ircuit (SO IC), JED E C M S-013, 0 .300" W ide 16-Lead Small O utline , Semiconductor Corporation D S005342.prf www.fairchildsenii.com MM74HC595 Logic Diagram (positive , ) C lam p Diode C urrent (I| k , Io k ) DC O utput Current, per pin (Io u t ) DC Vc c or GND Current, per pin (lc c ) S torage Tem perature Range (Ts t g ) Power Dissipation (P D) (Note 3) S.O. Package
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74hc595n 74HC595M MM74HC595N 74hc595w M74HC595N MS-001

74LS259N

Abstract: and pin diagram of IC 7476 DM74LS259 8-Bit Addressable Latches M arch 1998 F/MRCHII_D S E M IC O N D U C T O R tm , lCc 22 mA Connection Diagram D ual-ln -Lin e Package V cc | 16 CLEAR 15 E 14 D 13 Q7 12 Q6 11 Q5 , Indicated Steady-State Input Conditions Were Established. © 1 9 9 8 F a irc h ild S e m ic o n d u c to r C o rp o ra tio n D S006418 w w w .fa irc h ild s e m i.c o m Absolute Maximum Ratings c , open. Note 8: T^ = 25°C and Vcc = 5V. w w w .fa ir c h ild s e m i.c o m 2 Switching
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pin diagram decoder 7476
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