500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

Top Results

Part Manufacturer Description Datasheet BUY
LTC2938CMS#PBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 12; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2939CMS#PBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2938HDE#TRPBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: DFN; Pins: 12; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2939HMS#TRPBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2938HDE#PBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: DFN; Pins: 12; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2939HMS#PBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy

ic 74194 pin configuration

Catalog Datasheet MFG & Type PDF Document Tags

IC 74194

Abstract: 74194 ic pin diagram .4 m A l|_. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) MR [ T °S R C l D0 U , S ig n e t ic s 7 4 1 9 4 , LS 1 9 4 A , S 1 9 4 Shift Registers 4-Bit Bidirectional Universal , both serial and parallel operation · Asynchronous Master Reset · Hold (do nothing) mode TYPE 74194 , pecification Shift Registers 74194, LS194A, S194 MODE SELECT - FUNCTION TABLE INPUTS OPERATING MODE , on the 74194 should o nly take place while CP is HIGH fo r conventional operation. The '194 design
-
OCR Scan
IC 74194 74194 ic pin diagram Pin configuration of IC 74194 IC 74194 logic diagram IC 74194 pin diagram ic 74194 pin configuration 74LS194A 74S194 105MH SO-16 N74194N N74LS194AN

ic 74194

Abstract: pin diagram of ic 74195 ) A m 54/ Amb4/ 74195 74194 Input/Outpul input/Output Pin No input Output Output Unit Load HIGH LOW , testing in compliance with MIL-STD-883. functional description The Am54/74194 features four separate , â Â«put. LOGIC SYMBOLS logic diagrams Am54/74194 ? \ Clear a fïf nji TOMO, parallel outputs ORDERING INFORMATION Am 54/ Am 54/ Package 74194 74195 Temperature Order Order Type Range , to+IE Temperature (Ambient) Under Bias -55°C to+U Supply Voltage to Ground Potential (Pin 16 to Pin
-
OCR Scan
pin diagram of ic 74195 IC 74195 ml741 74194 function table 74194 shift register 74195 pin configuration SN74194N 21850E/0-I

full adder using ic 74138

Abstract: full adder using Multiplexer IC 74151 Advanced CHMOS circuitry features low power, high performance, and high noise immunity · Includes 68-pin , as special processors, dedicated peripheral controllers and intelligent support chips. IC count can be reduced by an order of magnitude depending on the system configuration. Power requirements can be , contains some 17 logic func tions most of which are MacroFunctions. The overall configuration of the chip , input multiplexer 74194 - universal bidirectional shift register 74180 - 8 bit parity generator
-
OCR Scan
full adder using ic 74138 full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 EP1800JC-EV1 EP1800 0UT20 0UT21 OUT22 0UT23
Abstract: 194 CO NN ECTIO N DIAGRAM PINO UT A JJS4/74194 J/S4S/74S194 o // v 2 0 /54LS/74LS194A 4 , nothing) modes of operation. LO G IC SYMBOL â'¢ GUARANTEED SHIFT FREQUENCY OF 30 MHz ( LS194A) OR 70 , SERIAL OR PARALLEL DATA TRANSFERS 2 ORDERING CODE: See Section 9 PIN PKGS OUT 9 - So , ±10%, T a = -55° C to +125° C PKG TYPE Plastic DIP (P) A 74194 PC 74S194PC, 74LS194APC , 54S194FM, 54LS194AFM 4L 1 Vcc = Pin 16 GND = Pin 8 INPUT LO ADING /FAN -O U T: See Section 3 -
OCR Scan
JJS4/74194 54194DM 74194DC 74S194DC 74LS194ADC

truth table for ic 74138

Abstract: ALU IC 74183 cycles Elim ination of un u sed gates A utom atic pin and p art assignm ents SALSA logic m inim ization , , 74280 7491, 7494, 7496, 7499, 74164, 74165, 74166, 74178, 74179, 74194, 74198, BARRELST, UNICNT2 SSI , . If a pin assignm ent is specified, the Fitter m atches the request. If no pin assignm ents are , achieved, the Fitter generates a U tilization R eport (.RPT) that d ocum ents macrocell and pin assignm ents, in p u t and o u tp u t pin nam es, and buried registers, as well as any u n u sed resources. At
-
OCR Scan
truth table for ic 74138 ALU IC 74183 16CUDSLR IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table

up down counter using IC 7476

Abstract: full adder using Multiplexer IC 74151 C H IP C A RRIERS (LCC) C ER A M IC J- LEA D ED C H IP C A R R IER S (JL C C ) C ER A M IC PIN GRID , have up to 2304 bits cf RAM organized In an optional by-nlne memory configuration that Is system , 0 volts, « = 1 MHz.) Param eter Input Capacitance Output Capacitance I/O Pin Capacitance Sym bol C , , VD0" V, = 0 volta, f - 1 MHz.) Param eter Input Capacitance Output Capacitance I/O Pin Capacitance Sym , Is determined by the location on the chip of the associated circuitry and any pin looatlon
-
OCR Scan
up down counter using IC 7476 74154 shift register IC full adder circuit using ic 74153 multiplexer sk 7443 DN 74352 74183 adder 0010S MB65XXXX MB66XXXX MB67XXXX

LEAPER-3

Abstract: 74189 matrix LCD display *Test Socket:One position for 28-pin IC socket *Operating Key: (1) 6 Function keys , hook x 1 40-pin IC socket x 1 DC power supply x 1 EXT CRYSTAL adaptor x1 System software disk User , x1 *16-bit 40-pin module + flat cable x1 *4 signal line hook x1 *28-pin IC socket x2 *System , IC socket X2 * DC adaptor * 16-bit 40-pin module + flat cable X1 * 4 signal line hook X1 , environment of development. Additional, the Company has been qualified by major IC manufacturer such as ATMEL
Leap Electronic
Original
LEAPER-3 74189 7489 sram 89C51 interfacing with lcd display 4N34 ic 74192 pin configuration SU-2000 PIC16C52/54/54A PIC16C55/56/57/57A/58A PIC12C508/509 PIC16C61 PIC16C620/621/622

IC 3-8 decoder 74138 pin diagram

Abstract: binary to gray code conversion using ic 74157 Note: Terminal capacities are average values and include package pin capacities and chip internal pad , Configuration of oscillation circuits CMOS standardcell LSI External parts â'¢ OSC (crystal, ceramic , ) b-68 b-75 b-81 (1) ^ 1 ! io PN! !a) ¿.J I (C) b-76 (11 b-69 Z2> (2) I IC , 74194 * 33 4-BIT PARALLEL-ACCESS SHIFT REGISTER 74195 * 34 8-BIT ADDRESSABLE LATCHES , in the Comments column, the addition of a terminal for each bit of an internal flip-flop makes the IC
-
OCR Scan
IC 3-8 decoder 74138 pin diagram binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder MSM91H000 72MS40

74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC design soft ware). An example configuration for a 2-input NAND gate is shown in figure 2. The complexity , for most requirements. Output drive may be increased from the basic 1mA to a maximum of 48mA per pin , is 4.5 Kbits Access time 12 ns (typical) depending on configuration. For a triple port RAM the , time 9 ns (typ) depending on configuration. In order to access the feasability of integrating a given , to discuss your requirements and to supply data sheets for the exact RAM configuration required
-
OCR Scan
74LS82 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 la 4508 ic schematic diagram advantages for ic 7473 TC140G SC12D4 SC18D4 SC27D4 SC37D4 SC44D4

16CUDSLR

Abstract: 7474 D flip flop free PL D s H ierarch ical d esig n entry m eth o d s for b oth g rap h ic and text d esig n s M u , , arithm etic and relational op eration s D elay p red iction and tim ing an aly sis fo r g ra p h ic an d , rap h ic D esign Files (.G D F) w ith the M A X + P L U S G ra p h ic Editor, and T ext D esign Files , Editor. T h e G ra p h ic E d itor offers ad van ced featu res such as m u ltiple h ierarchy lev els, sy , G rap h ic and T ext E d ito rs w ith the d elay p red ictio n featu re. A fter the so u rce and d
-
OCR Scan
7474 D flip flop free alu 74382 sn 74373 pin diagram of ic 74190 counter schematic diagram 74161 ALU IC 74381

IC 3-8 decoder 74138 pin diagram

Abstract: full adder using ic 74138 CARRIERS (LCC) C E R A M IC J -L E A D E D CHIP CARRIERS (JLCC) C E R A M IC PIN GRID ARR AY (PGA) PACKAGE , configuration that is system compatible with most modern designs. The 2301 has 1024 bits of RAM that may be , common logic Macros. FEATURES · · · · · · 1.4 ns g a te d e la y ty p ic a l. (2 -in p u t N A N D g a te ,F .O .= 2 ) S ta tic R A M or RO M on c h ip . S ilic o n -g a te 1.8 m ic ro n d ual m e ta l , s s -0 .5 -80 -40 -65 Ceramic T y p ic a l - M a x im u m 6.0 VDD + 0.5 VDD + 0.5 140 70 150
-
OCR Scan
pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 circuit diagram for IC 7483 full adder application of ic 74153 74171 ic 74139 decoder pin diagram C4002 C1502

ALU IC 74381

Abstract: encoder IC 74147 hierarch ical g raphic, text, and w a v e fo rm design entry: G ra p h ic E d ito r for schem atic designs , background. A u to m a tic erro r location is p ro v id e d for the G ra p h ic , Text, and W a v e fo rm , Data Sheet .and More Features IJ IJ IJ J IJ J Log ic synthesis and m in im iza tio n su p p , accessible w ith on-line, contextsensitive help. T he W in d o w s C lip b o a rd q u ic k ly m oves design , d e v ic e p ro g ra m m in g support. It runs un d er the W in d o w s 3.0 g rap h ical e n viro n
-
OCR Scan
encoder IC 74147 74139 truth table truth table for 7446 from ic 7447 truth table IC 74373 truth table pin configuration IC 74156

74ls82

Abstract: 74245 BIDIRECTIONAL BUFFER IC example configuration for a 2-input NAND gate is shown in figure 2. The complexity of logic functions made , 48mA per pin by means of parallel bond wires within the package. It should be remembered that an I/O , any single RAM block is 4.5 Kbits Access time 12 ns (typical) depending on configuration. For a , is 2.3 Kbits Accesse time 9 ns (typ) depending on configuration. In order to access the feasability , control logic etc. This overhead is dependent upon the exact configuration of the memory in question
-
OCR Scan
74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder

AMD K6

Abstract: 74147 decimal to binary encoder commercial products - 50, 70 MHz military products â  Selectable configuration modes 100 , workstations. The final configuration of the three main programmable elements is determined by the user and , Plastic Leaded Chip Carrier G = Pin Grid Array b. SPEED OPTION -50 (50 MHz toggle rate) -70 (70 MHz , TYPE Z = 84-pin PGA (Am3020) Z = 84-pin PGA (Am3030) Z = 132-pin PGA (Am3042)* Z = 132-pin PGA (Am3064)* Z = 175-pin PGA (Am3090) c. DEVICE CLASS /B = Class B b. SPEED/POWER OPTION -50 = 50 MHz
-
OCR Scan
AMD K6 74147 decimal to binary encoder C10BCPRD C10BCRD C10BPRD C10JCR C12JCR C16BARD

SN54367

Abstract: signetics 8223 . 14-PIN J CERAM IC F a lls w it h in J E D E C T 0 - 1 1 6 a n d M 0 - 0 0 1 A A d im e n s io n s 16-PIN J CERAM IC â'" j © © @© ® ® ® ® * F o r m e m o rie s o f 6 4 b its a n d u p , (continued) 20-PIN J CERAM IC 24-PIN J CERAM IC @ © © © ® © AAAAAAAAAAAA VWWWWVX7X7 A , 2 ) . A ll o t h e r d im e n s io n s a p p ly w it h o u t m o d if ic a t io n . 1 leads , packages (continued) 24-PIN N PLASTIC NOTES: a. AM d im e n s io n s a re s h o w n in in c h e
-
OCR Scan
SN54367 signetics 8223 sn74142 MC3021 9370c 14-PIN 16-PIN 20-PIN 24-PIN LCC4270 SN54S470

A5 GNC mosfet

Abstract: SL1626 largest electronic publisher in the world. Contents Quick Guide to IC Master . 2 Part Number Index , has been expended to make IC MASTER accurate and complete, but IC MASTER cannot assume responsibility , may be reproduced without express written permission of the publishers. Copyright IC MASTER, 1977. IC , Corp., 643 Stewart Ave., Garden City, N.Y. 11530. TWX: 510-222-1673. @ IC MASTER 1977 1 1 II quick guide to your IC fflASTER APPLICATION To prepare this directory each IC NOTE manufacturer reviewed his
-
OCR Scan
A5 GNC mosfet SL1626 HA1452 ABB inverter motor fault code itt9012 TDA0470 AMI6800H AMI6800 VMI6800

74138n

Abstract: 74373 cmos dual s-r latch slice m e th o d using the high p erfo rm a n c e silicon gate 2 m ic ro n H C M O S process w ith th e , o f th e s c h m itt trigger, c ry s ta l/ ceram ic o r C R o sc illa to r, p u ll-u p /p u ll-d o w , using any intern al gate, w h ic h are g reatly required by custom ers. In a d d itio n , th e I/O in p , n o f the n u m b e r o f gates and the n u m b e r o f pads (the n u m b e r o f p in s), w h ic h , h ic h has n ow been p o p u la r, O K I is ready to supply flo p p y disks fo r th e lib ra ry
-
OCR Scan
74138n 74373 cmos dual s-r latch buffer 74374 of IC 74191 G701

M5L8042

Abstract: panasonic inverter dv 707 manual PROMs? IC MASTER provides the most complete listing of application notes available in print. It is easy to find the right application notes by looking in IC MASTER because the application note directory is , PROMs. If he knows the device number, he can look it up in the part number index at the front of IC , IC MASTER has a Master Selection Guide which provides initial selection information and data on PROMs , provided by IC manufacturers and pick the most appropriate device. Literally hundreds of pages of
-
OCR Scan
M5L8042 panasonic inverter dv 707 manual ccd camera mc 7218 wiring diagram panasonic inverter manual dv 707 sn29764 tmm2114 J26487 S-17103 54070Z CH-5404

billion transformer e 3103 308 30631

Abstract: 74ls219 Offset Op Amp 2560 JFET Dual Op Amp 2560 OpAmp BI-FET,W Select. Chart 2565 I.C, Master Data Index , 1361 Manufacturers and Distributors Directory 1501 VOLUME II - Quick Guide to IC Master 1602 , ®IC MASTER 1981 1 A QUICK GUIDE TO YOUR SRK lilAXE^ ONE COMPLETE SOURCE IC MASTER is the first , Systems. Whether an IC exists in new design or is one of thousands, you'll find it out in seconds by using the MASTER. EASY TO USE The IC MASTER saves you time.no longer do you have to spend long
-
OCR Scan
billion transformer e 3103 308 30631 74ls219 HD46505 SW02F motorola mda 962-2 SAA6000 S2000 J24616 K25582

elcot tv kit circuit diagram

Abstract: synchronous inverter schematic ims 1600 . Atmel CMOS Gate Arrays Device Number Raw Gates Routable Gates Max Pin Count Max I/O Pins Gate Speed , PLD. 1-45 20-Pin Package, 8 FFs, 8 I/O Pins. 24/28-Pin Package, 10 FFs, 10 I/O Pins. High Speed, 24/28-Pin Package, 10 FFs, 10 I/O Pins. Low Voltage, 24/28-Pln Package, 10 FFs, 10 I/O Pins. 24/28-Pin Package, 20 FFs
-
OCR Scan
elcot tv kit circuit diagram synchronous inverter schematic ims 1600 iosq 050 pin diagram for IC cd 1619 cp in fm smd code transistor sd IL44 Z T22V10A T22V10AT22V10BAT22V10LAT22LV10AT22LV10LA TF22V10BA TF22V10BLA TF22V10B TF22V10BQLA
Showing first 20 results.