NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: trigger IC and the 74F32 74F32 OR gate IC. The OR gate is used so that a reset can be detected from either an , IC socket is compatible with the ADSP2101 ADSP2101 EZ-ICE. Refer to the ADSP-21XX ADSP-21XX and ADMC201 ADMC201 data sheets , are connected by a link (JP9) close to the ADMC201 ADMC201 for noise immunity. This link should not be , correct operation, this link must not be removed. FUNCTIONAL DESCRIPTION A full description of the , signals are buffered by a 74LS04 74LS04 HEX buffer IC and brought to the 8-way terminal block, J3. If active ... | Original |
8 pages, |
block diagram for ic 7404 DIAGRAM 7404 ic 7404 ic diagram pin diagram for ic 7404 IC 7404 7404 not gate logic diagram of ic 7404 pin-out diagram for 7404 IC CIRCUIT DIAGRAM ic 7404 not ic 7404 not gate ic 7404 7404 NOT ic ADMC201-LAB AD7306 ADMC201-LAB abstract |
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| Abstract: where low power consumption is required and those applications that do not provide sufficient input , conventional IC Line Driver · Total Line Length 1 - 300 ft. · Typical Data Rate: 180 kBs (tPHL, tPLH = 3 , Line Receiver · Drive with Standard TTL Buffer Gate · 2500 V 60 Hz Common Mode Rejection · Allows use of Low Cost Line · 40 kBs Data Rate · TTL Compatible Output CX 1 1/6 7404 7440 , IOL 2 mA VO +5 V 951-1 2.2 K IF = 1.7 mA +5 V 8 2 1/16 7404 3 5V 6 5 ... | Original |
4 pages, |
7404 7404 not gate datasheet or ic 7404 HLMP-1200 ic 7404 maximum current of 7404 NOT ic not ic 7404 TTL ic 7404 Belden 8777 IC 7404 not gate 7404 TTL 7404 NOT ic IC 7404 FOR NOT GATE 6N138/9 6N138/9 6N138/9 abstract |
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| Abstract: noise occurs when the motor is not running, the IC on an existing board, the following preparations , SMA7036M SMA7036M 2-Phase Excitation 2-Phase Stepper Motor Unipolar Driver IC sAbsolute Maximum , VS =24V uA us us 2-Phase Stepper Motor Unipolar Driver IC (2-Phase Excitation , , 15pin Description of pins Reg. Oscillator MOSFET gate drive circuit Reg. Chopping blanking , Synchronous chopping circuit SYNC A Rs A Synchronous chopping circuit 7 MOSFET gate drive ... | Original |
7 pages, |
IC 7404 datasheets TTL ic 7404 2-Phase connecting diagram for ic 7404 IC 7404 7404 not gate 23lm 23LM - C004 STEPPER MOTOR 23lm c004 - 04 ac SYNCHRONOUS MOTOR WIRING stepper 23lm 23lm c004 23LM MOTOR SMA7036M SMA7036M abstract |
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| Abstract: Gate Charge (VCE = 300 V, IC = ICmax, VGE = 15 V) THERMAL CHARACTERISTICS, EACH DIE TEMPERATURE , 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , = 80°C) ICmax 10 A Repetitive Peak IGBT Collector Current (1) IC(pk) 20 A , ) GateEmitter Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 600 - - V CollectorEmitter ... | Original |
6 pages, |
MHPM7A10E60DC3 MC33153 MBRS130LT3 IC 7404 FOR NOT GATE BAV99LT1 not gate ic 7404 IC 7404 not gate 7404 not gate ic MHPM7A10E60DC3/D MHPM7A10E60DC3/D abstract |
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| Abstract: Gate Charge (VCE = 600 V, IC = ICmax, VGE = 15 V) THERMAL CHARACTERISTICS, EACH DIE TEMPERATURE , 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , Collector Current (TC = 25°C) ICmax 25 A Repetitive Peak IGBT Collector Current (2) IC(pk , Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 1200 - - V CollectorEmitter ... | Original |
6 pages, |
not gate ic 7404 MHPM7A25S120DC3 MC33153 MBRS130LT3 IC 7404 FOR NOT GATE BAV99LT1 XHPM7A25S120DC3 MHPM7A25S120DC3/D MHPM7A25S120DC3/D abstract |
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| Abstract: Gate Charge (VCE = 600 V, IC = ICmax, VGE = 15 V) THERMAL CHARACTERISTICS, EACH DIE TEMPERATURE , 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , Collector Current (TC = 25°C) ICmax 15 A Repetitive Peak IGBT Collector Current (2) IC(pk , Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 1200 - - V CollectorEmitter ... | Original |
6 pages, |
XHPM7A15S120DC3 MHPM7A15S120DC3 MC33153 MBRS130LT3 BAV99LT1 DIODE MOTOROLA 633 7404 not gate ic 14 pin ic 7404 MHPM7A15S120DC3/D MHPM7A15S120DC3/D abstract |
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| Abstract: = 25 V, f = 1.0 MHz) Input Gate Charge (VCE = 600 V, IC = ICmax, VGE = 15 V) THERMAL , 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , = 25°C) ICmax 5.0 A Repetitive Peak IGBT Collector Current (2) IC(pk) 10 A , Voltage (IF = 5.0 A) GateEmitter Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 1200 - ... | Original |
6 pages, |
MHPM7A5S120DC3 MC33153 MBRS130LT3 BAV99LT1 7404 not gate ic MHPM7A5S120DC3/D MHPM7A5S120DC3/D abstract |
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| Abstract: Gate Charge (VCE = 600 V, IC = ICmax, VGE = 15 V) THERMAL CHARACTERISTICS, EACH DIE TEMPERATURE , 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , 150°C) ICmax 10 A Repetitive Peak IGBT Collector Current (2) IC(pk) 20 A , Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 1200 - - V CollectorEmitter ... | Original |
6 pages, |
MHPM7A10S120DC3 MC33153 MBRS130LT3 BAV99LT1 7404 not gate ic XHPM7A10S120 14 pin ic 7404 14 pin ic 7404 not gate XHPM7A10S120DC3 MHPM7A10S120DC3/D MHPM7A10S120DC3/D abstract |
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| Abstract: 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , Repetitive Peak IGBT Collector Current (1) IC(pk) 60 A Continuous FreeWheeling Diode Current (TC , Voltage (IF = 30 A) GateEmitter Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 600 - - V CollectorEmitter Saturation Voltage (IC = ICmax, VGE = 15 V) VCE(sat) - 2.2 2.6 ... | Original |
6 pages, |
MHPM7A30E60DC3 MC33153 MBRS130LT3 igbt inverter schematic induction BAV99LT1 7404 not gate MHPM7A30E60DC3/D MHPM7A30E60DC3/D abstract |
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| Abstract: 3phase induction motor drive applications. The inverter incorporates advanced insulated gate bipolar , Repetitive Peak IGBT Collector Current (1) IC(pk) 40 A Continuous FreeWheeling Diode Current (TC , Input Rectifier Forward Voltage (IF = 20 A) GateEmitter Threshold Voltage (VCE = VGE, IC = 1.0 mA) VGE(th) 4.0 6.0 8.0 V CollectorEmitter Breakdown Voltage (IC = 10 mA, VGE = 0 V) V(BR)CES 600 - - V CollectorEmitter Saturation Voltage (IC = ICmax, VGE = 15 V ... | Original |
6 pages, |
MHPM7A20E60DC3 MC33153 MBRS130LT3 BAV99LT1 MHPM7A20E60DC3/D MHPM7A20E60DC3/D abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| DGND + CLR CLRBAR + D0_GATE IO_STD IO_LEVEL={IO_LEVEL} UIBUF bufa(2) DPWR DGND + $D_HI CLRBAR PREBAR_BUF CLRBAR_BUF + D0_GATE IO_STD IO_LEVEL={IO_LEVEL} UA inv DPWR DGND + CLK CLKBAR + D0_GATE IO_STD IO_LEVEL={IO_LEVEL} U1 jkff(1) DPWR DGND + PREBAR_BUF CLRBAR_BUF CLKBAR $D_HI $D _DGND 7404 + PARAMS:IO_LEVEL=0 MNTYMXDLY=0 X4 CLR CLRBAR $G_DPWR $G_DGND 7404 + PARAMS:IO_LEVEL=0 DGND + CLK CLR CLKBAR CLRBAR + D0_GATE IO_STD X2 CLKBAR $D_HI CLRBAR Q $D_HI Q0 J1 $G_DPWR $G www.datasheetarchive.com/files/spicemodels/misc/function.lib |
Spice Models | 04/10/2007 | 20.02 Kb | LIB | function.lib |
| of this gate should only come from the following * gates: * '60 * * PSpice, however, will not this chip can only come from the * following gates: * '50 * '60 * PSpice, however, will not check :32:32 $ * * *$ *- * 7400 Quadruple 2-input Positive-Nand Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 + ) *$ *- * 7401 Quadruple 2-input Positive-Nand Gates with Open-Collector Outputs * * The TTL Data Book, Vol 2 + ) *$ *- * 7402 Quadruple 2-input Positive-Nor Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 www.datasheetarchive.com/files/spicemodels/misc/spice_model_cd/mixed part list/spice-models-collection/7400.lib |
Spice Models | 29/07/2012 | 282.15 Kb | LIB | 7400.lib |
| of this gate should only come from the following * gates: * '60 * * PSpice, however, will not this chip can only come from the * following gates: * '50 * '60 * PSpice, however, will not check :26:32 $ * * *$ *- * 7400 Quadruple 2-input Positive-Nand Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 + ) *$ *- * 7401 Quadruple 2-input Positive-Nand Gates with Open-Collector Outputs * * The TTL Data Book, Vol 2 + ) *$ *- * 7402 Quadruple 2-input Positive-Nor Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06 www.datasheetarchive.com/files/spicemodels/misc/7400.lib |
Spice Models | 19/12/2001 | 282.17 Kb | LIB | 7400.lib |
| * * IXGH40N60 IXGH40N60 IXGH40N60 IXGH40N60 N-channel Insulated Gate Bipolar Transistor * * LM324 LM324 LM324 LM324 * 7400 Quadruple 2-input Positive-Nand Gates * 7401 Quadruple 2-input Positive-Nand Gates with * Open-Collector Outputs * 7402 Quadruple 2-input Positive-Nor Gates * 7403 Quadruple 2-input Positive-Nand Gates with * Open-Collector Outputs www.datasheetarchive.com/files/spicemodels/misc/eval.lib |
Spice Models | 20/12/2001 | 295.35 Kb | LIB | eval.lib |
| MULTIPLEX INTERFACE FOR DOUBLE ENCODING APPLICATIONS (TO BE ABLE TO ENCODE OR NOT THE OSD CONTENT OF THE Teletext buffer in external demultiplexer or Transport IC. 23 TTXD I/O Teletext data stream from external demultiplexer or Transport IC synchronous to rising edge of CKREF signal average rate of 6.9375Mbit/s. Output in : odd (not-top) field : LOW level even (bottom) field : HIGH level II.2 - Pin Description (continued possible to allow encoding of incoming YCrCb data on those lines of the VBI that do not bear line sync www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5959-v2.htm |
STMicroelectronics | 14/06/1999 | 99.93 Kb | HTM | 5959-v2.htm |
| DOUBLE ENCODING APPLICATIONS (TO BE ABLE TO ENCODE OR NOT THE OSD CONTENT OF THE VIDEO INPUT STREAM Transport IC. 23 TTXD I/O Teletext data stream from external demultiplexer or Transport IC synchronous to default polarity : odd (not-top) field : LOW level even (bottom) field : HIGH level II.2 - Pin to allow encoding of incoming YCrCb data on those lines of the VBI that do not bear line sync Reg 6. The IC's response in that case is similar to its response after a hardware reset, except www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5116-v3.htm |
STMicroelectronics | 25/05/2000 | 99.28 Kb | HTM | 5116-v3.htm |
| MULTIPLEX INTERFACE FOR DOUBLE ENCODING APPLICATIONS (TO BE ABLE TO ENCODE OR NOT THE OSD CONTENT OF THE Teletext buffer in external demultiplexer or Transport IC. 23 TTXD I/O Teletext data stream from external demultiplexer or Transport IC synchronous to rising edge of CKREF signal average rate of 6.9375Mbit/s. Output in : odd (not-top) field : LOW level even (bottom) field : HIGH level II.2 - Pin Description (continued possible to allow encoding of incoming YCrCb data on those lines of the VBI that do not bear line sync www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5959-v1.htm |
STMicroelectronics | 02/04/1999 | 99.96 Kb | HTM | 5959-v1.htm |
| DOUBLE ENCODING APPLICATIONS (TO BE ABLE TO ENCODE OR NOT THE OSD CONTENT OF THE VIDEO INPUT STREAM buffer in external demultiplexer or Transport IC. 23 TTXD I/O Teletext data stream from external demultiplexer or Transport IC synchronous to rising edge of CKREF signal average rate of 6.9375Mbit/s. Output of CKREF - ODDEVEN default polarity : odd (not-top) field : LOW level even (bottom) field Cb data on those lines of the VBI that do not bear line sync pulses or pre/post-equalisation pulses (see www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5116.htm |
STMicroelectronics | 20/10/2000 | 103.45 Kb | HTM | 5116.htm |
| DOUBLE ENCODING APPLICATIONS (TO BE ABLE TO ENCODE OR NOT THE OSD CONTENT OF THE VIDEO INPUT STREAM demultiplexer or Transport IC. 23 TTXD I/O Teletext data stream from external demultiplexer or Transport IC to rising edge of CKREF - ODDEVEN default polarity : odd (not-top) field : LOW level even (bottom waveforms. It is possible to allow encoding of incoming YCrCb data on those lines of the VBI that do not setting bit'softreset' in Reg 6. The IC's response in that case is similar to its response after a www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5116-v1.htm |
STMicroelectronics | 02/04/1999 | 97.42 Kb | HTM | 5116-v1.htm |
| INTERFACE FOR DOUBLE ENCODING APPLICATIONS (TO BE ABLE TO ENCODE OR NOT THE OSD CONTENT OF THE VIDEO Transport IC. 23 TTXD I/O Teletext data stream from external demultiplexer or Transport IC synchronous to - ODDEVEN default polarity : odd (not-top) field : LOW level even (bottom) field : HIGH level II.2 Cb data on those lines of the VBI that do not bear line sync pulses or pre/post-equalisation pulses (see ). It is also possible to perform a software reset by setting bit'softreset' in Reg 6. The IC www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5959-v3.htm |
STMicroelectronics | 25/05/2000 | 101.8 Kb | HTM | 5959-v3.htm |