NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: clock prescalers can be used to generate a wide range of clock frequencies. A calibration feature , Introduction to the XMEGA clock system The Atmel® AVR® XMEGA® Clock System provides a large portfolio of clock , Counter module at the same time. Some of the internal clock sources can be used as a reference to the , compares the oscillator frequency with a more accurate reference clock to do automatic run-time , show how to change between the different oscillators as the main clock. Task 2: Using the internal ... | Original |
12 pages, |
AVR1003 Atmel AVR XMEGA A Manual 8404A how to make a digital clock AVR1518 AVR1512 AVR1518 abstract |
|
|||
| Abstract: Task 1: Clock switching Atmel XMEGA has a lot of clock sources. In this task we will show how to , used to generate a wide range of clock frequencies. A calibration feature (DFLL) is available, and can , and external. In addition, an internal PLL can be used to multiply selected clock sources with a , for automatic calibration against a 32 kHz clock source with the help of the built-in Digital , the same time. Some of the internal clock sources can be used as a reference to the internal PLL in ... | Original |
12 pages, |
atmel programming in c AVR1003 AVR1506 prescalers Real Time Clock LANGUAGE C xmega a1 XMEGA DATASHEETS AVR1500 XMEGA avr projects XMEGA Application Notes AVR1506 abstract |
|
|||
| Abstract: is not guaranteed. How to Read Data from HMC6352 HMC6352 1) In Standby Mode Use "A" command 2) In Query , (Slave) tries to make happen on the SDA line. Example 1: This example shows how to command the HMC6352 HMC6352 , : This example shows how to command HMC6352 HMC6352 to read a RAM register by sending the 'g' command and the , : This example shows how to write to a RAM register in the HMC6352 HMC6352 by sending the 'G' command, the , example shows how to read a single byte from the HMC6352 HMC6352. The Slave(HMC6352 HMC6352) continues to hold the SDA ... | Original |
10 pages, |
compass Sensor circuit 0x43 compass module compass digital hmc6352 HMC6352 HMC6352 abstract |
|
|||
| Abstract: EM78M680 EM78M680 ADC Application Notes 1 Introduction This document mainly describes how to use EM78M680 EM78M680 ADC function. 2 How to use EM78M680 EM78M680 ADC In order to make use of ADC function, please refer to following steps. Select ADC conversion clock source by setting up R11[6:5] register. Select AD , (Refer to EM78M680 EM78M680 product datasheet). When using the WICE, please make sure the ADC enable bit of , ADC conversion, it must delay at least one ADC conversion clock time. In order to acquire more ... | Original |
3 pages, |
AN004 EM78M680 EM78M680 abstract |
|
|||
| Abstract: delta-sigma (-) modulator provides a simple way to digitize an analog signal into a bit-serial digital signal , appropriate digital filter, one can make a first-order delta-sigma (-) analog-to-digital converter. Another , delta-modulated, and the resulting digital bit-stream is then used to drive an opto-isolator or a fiber-optic , , compared to a threshold, and the resulting digital value is then sampled by a flip-flop. The output of the , Delta-modulation Sampling Clock Input Voltage (analog) D 0 Modulated Output (digital bit-serial ... | Original |
2 pages, |
OA2 IC digital comparator circuit diagram IC OA2 1 bit delta-sigma simple block diagram for digital clock datasheet abstract |
|
|||
| Abstract: clock frequency. To remove the jitter, you could send the output through a band pass filter, or lock a , digital to analog (D/A) converter, whose analog output is then a sine wave with much less jitter. The , , then you can make a circuit where the counter divides by one factor for some number of clock cycles , known as pulse swallowing. This also results in a large amount of jitter due to the missing clock , gates are free as long as the design fits into the intended part. It takes 26 CLBs to make a 48 bit ... | Original |
2 pages, |
XC4085XL XC4003 XC4000 advantages of digital pulse counter synthesizer 144mhz datasheet abstract |
|
|||
| Abstract: delaying theVSYNCI/HSYNCI signals from x clock periods. The 29C84A 29C84A will be used to : make conversion from Y/C (digital) to R/G/B (digital) display pictures on a R/G/B monitor, starting from internal or , is digital to analog video decoder intended for conversion of digital luminance and chrominance to , digital TV. It is able to drive 75 Ohms / 20pF loads on its analog RGB outputs. The following technical note gives an indication of how to interface the 29C84A 29C84A with other existing components in order to ... | Original |
2 pages, |
pal video sync generator CCIR 601 analog ANM020 29C84A PAL generator TEA2000 pal sync generator Philips SAA1043 SAA1043 ANM020 abstract |
|
|||
| Abstract: how one can use the GC2011 GC2011 Digital Filter chip to build digital modulators for most BPSK, QPSK, and , digital to analog converter (DAC). The desired sample rate is a function of the IF signal frequency and , within the Symbol formatter FPGA by using the 30 MHz bit stream clock to repetitively output a one , clock synthesizer chip would need to be used to generate a 40 MHz clock which is locked to the 30 MHz bit stream clock. In addition, the Symbol Formatter chip will have to output data at a 20 MHz rate ... | Original |
5 pages, |
Graychip GC2011 qam circuit of band reject filter application 4 QAM modulator BPSK MODULATORS raised cosine GC2011 television signal modulator Graychip 16 QAM Transmitter Modulator 64 QAM GC2011 abstract |
|
|||
| Abstract: distribution: W 0x03 : 0x80 # enable the digital mode of XTAL1A [Provide a 16 MHz clock signal to the , feature clock usage. The following SPI code sequence shows how to switch over to a feature clock , code sequence shows how to disable the internal clock distribution, when a Feature Clock of 16 MHz is , clock input. If an external micro controller can provide a digital 16 MHz clock signal, then it can be , enables the digital mode, the clock distribution # and disables the clock switcher reset [Provide a ... | Original |
10 pages, |
16 MHZ crystal data sheet crystal 3.2768 Mhz crystal oscillator 1 MHz 4 pins crystal quartz 8 mhz Crystals 32.768 digital clock notes NanoNET Time Clock Nanotron Technologies 32.768 khz crystal 32.768 MHZ OSCILLATOR 32.768 MHZ OSCILLATOR NOT GIVING OUTPUT NA-05-0131-0334-1 NA-05-0131-0334-1 abstract |
|
|||
| Abstract: How to Improve SFDR SFDR is directly related to linearity and glitch performance of a DAC. The , SFDR are to slow down data and clock edge rates. A 50 shunt termination resistor on the clock line , into digital receivers and transmitters, spectral specifications become more important to the system , designers use to qualify a device for a given design. SFDR Definition Spurious Free Dynamic Range is the , dBc). Unlike digital systems, D/A converters have many factors that detract from optimum spectral ... | Original |
2 pages, |
TB326 nyquist plot HI5721 nyquist es 7240 TB326 abstract |
|
|||
| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
|||||
| Analogue Cell Library includes building block cells designed to make a 10-bit Analogue-to-digital Converter instantiate and connect one or more Clock Buffer Cells, and how to achieve and acceptable routing of the between two inputs to an ASIC, and how such conditions can be identified and corrected." Test Application Note is to explain how CBIC test vectors can be compressed by changing some pin formats into RTZ (Return-to-Zero) or RTO (Return-to-One. In addition, a description of rules which need to be observed in www.datasheetarchive.com/files/atmel/atmel/prod54.htm |
Atmel | 14/09/1998 | 15.98 Kb | HTM | prod54.htm |
| high-speed clocks-everything you need to create successful systems for a connected world. High completed, when it may already be too expensive to correct design errors. Learn how to complete these simulations before the layout has begun and how to use these simulations to produce rules that guide the layout step. Discover what to simulate for CMOS, GTL, AGP, and other bus types. Make sure to catch this their performance requirements. Learn how to measure the performance metrics defined in the Interconnect www.datasheetarchive.com/files/intel/design/idf/tracks/inconlab.htm |
Intel | 01/02/1999 | 10.07 Kb | HTM | inconlab.htm |
| such as RDRAM and high-speed clocks - everything you need to create successful systems for a connected errors. Learn how to complete these simulations before the layout has begun and how to use these other bus types. Make sure to catch this repeat of Fall'98 IDF Conference's popular workshop if you interconnects meet their performance requirements. Learn how to measure the performance metrics defined in the Interconnect Design Workshop (above) and how to use these measurements to assess the performance margin and www.datasheetarchive.com/files/intel/products one/design/idf/tracks/inconlab.htm |
Intel | 06/05/1999 | 10.43 Kb | HTM | inconlab.htm |
| Poke Clocks each time ! We are working together with Microsoft & Intel to make this change a permanent Instructions on How to Use USBTIMER.EXE together with your Philips DSS350 DSS350 DSS350 DSS350 USB-speakers - Q. Who needs USBTIMER.EXE ? USBTIMER.EXE is to be used on computers which have an "out order to obtain the address : a. start device manager by right-clicking on My computer, select . Power Off and back On your DSS350 DSS350 DSS350 DSS350 speakers to make the change work Q. When do I need to run USBTIMER www.datasheetarchive.com/files/digital-logic/drivers/usb/usbtimer/instructions.txt |
Digital Logic | 03/06/1998 | 2.89 Kb | TXT | instructions.txt |
| . This workshop will show how to measure the performance metrics defined in the Interconnect Design Lab and will show how to use these measurements to assess the performance margin and expected yield of a completed, when it may already be too expensive to correct design errors. This workshop will show how to complete these simulations before the layout has begun, and how to use these simulations to produce "rules (Computational Fluid Dynamics) tools plays a vital role in reducing design spins and time to market of a given www.datasheetarchive.com/files/intel/design/idf/tracks/trk_411.htm |
Intel | 01/08/1998 | 9.96 Kb | HTM | trk_411.htm |
| .25-micron quad-level metal process technology, a streamlined architecture, and increased clock speeds, the 'LC548 LC548 LC548 LC548 shows how we plan to achieve 100 MIPS for 16-bit fixed-point DSPs within a year." Increased DSP performance allows systems to perform a variety of processing functions on a single chip that today have to be distributed. For example, a digital cellular basestation can handle multiple full power. Other applications include the ability to integrate V.34, digital simultaneous voice data (DSVD www.datasheetarchive.com/files/texas-instruments/data/sc/docs/dsps/details/43/lc548.htm |
Texas Instruments | 08/02/1999 | 7.74 Kb | HTM | lc548.htm |
| Communicator 5.0. Example This example shows how to load a different web page based on the clock in the JavaScript thread makes a call to the routine in the Windows front end to get the requested of how the Javascript feature can be applied to provide scaleable content based on the client processor in MHz. For example: var speed = hardware.clockSpeed; would return 266 for a system running .appName="Netscape" && navigator.appVersion.charAt(0)>="5" ) { var clkspd = hardware.clockSpeed; //make sure www.datasheetarchive.com/files/intel/drg/pentiu~1/appnotes/jpeg_pii/jscript.htm |
Intel | 02/11/1998 | 13.3 Kb | HTM | jscript.htm |
| Communicator 5.0. Example This example shows how to load a different web page based on the clock in the JavaScript thread makes a call to the routine in the Windows front end to get the requested of how the Javascript feature can be applied to provide scaleable content based on the client processor in MHz. For example: var speed = hardware.clockSpeed; would return 266 for a system running .appName="Netscape" && navigator.appVersion.charAt(0)>="5" ) { var clkspd = hardware.clockSpeed; //make sure www.datasheetarchive.com/files/intel/drg/pentiu~1/appnotes/jpeg_pii/jscript-v1.htm |
Intel | 03/02/1999 | 13.28 Kb | HTM | jscript-v1.htm |
| Communicator 5.0. Example This example shows how to load a different web page based on the clock in the JavaScript thread makes a call to the routine in the Windows front end to get the requested of how the Javascript feature can be applied to provide scaleable content based on the client processor in MHz. For example: var speed = hardware.clockSpeed; would return 266 for a system running .appName="Netscape" && navigator.appVersion.charAt(0)>="5" ) { var clkspd = hardware.clockSpeed; //make sure www.datasheetarchive.com/files/intel/drg/pentiu~1/appnotes/jpeg_pii/jscript-v2.htm |
Intel | 04/08/1998 | 13.3 Kb | HTM | jscript-v2.htm |
| ARM project files to make sure that the include paths are correct for a given platform. It is the distributor. To obtain a Digital Semiconductor Product Catalog , contact the Digital Semiconductor describes how to build the m HAL library and the example applications and benchmarks. Revision/Update Information: This is a new document. Digital Equipment Corporation Maynard, Massachusetts of the date of publication, it is subject to change without notice. Digital Equipment Corporation www.datasheetarchive.com/download/76537031-238077ZC/uhal.zip (uHAL_FAQ.html) |
Intel | 17/06/1998 | 564.86 Kb | ZIP | uhal.zip |