NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| FLI2000S | Faroudja, Inc. | NTSC/PAL Video Decoder and Signal Processor with Timebase Corrector |
36 pages, |
Original | |
| FLI2200 | Genesis Microchip Inc. | Video Deinterlacer/Line Doubler, Digital Component Video Deinterlacer/Line Doubler |
52 pages, |
Original | |
| FLI2200 | Sage, Inc. | Digital Video Deinterlacer/Line Doubler that incorporates |
2 pages, |
Scan | |
| FLI2300 | Genesis Microchip Inc. | Digital Video Format Converter |
2 pages, |
Original | |
| FLI2300 | Genesis Microchip Inc. | 75-150 MHz, Digital video format converter |
2 pages, |
Original | |
| FLI2301 | Genesis Microchip Inc. | 75-150 MHz, Digital video format converter |
2 pages, |
Original | |
| FLI2310 | Genesis Microchip Inc. | Video ICs, Digital Video Format Converter |
2 pages, |
Original | |
| FLI30502-AC | STMicroelectronics | Single-chip analog TV processor |
7 pages, |
Original | |
| FLI30602H-AC | STMicroelectronics | Single-chip analog TV processor |
7 pages, |
Original | |
| FLI30X02 | STMicroelectronics | Single-chip analog TV processor |
7 pages, |
Original | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: VT30-90 VCC27 varactor BOWEI Content BOWEI INTEGRATED CIRCUITS CO.,LTD. LC Filter Outline Drawings- 2 Miniature LC Bandpass Filter- 9 Miniature LC Lowpass Filter - 15 Miniature LC Highpass Filter - 18 Miniature Ceramic Filter - 21 Surface Mount Ceramic Fi ... | Original |
65 pages, |
L-12 lorch s8 LBM700A-85 LC PI FILTER DESIGN t120 Lorch df u2000 Bowei Integrated Circuits L16 8pin Combline-Cavity-Filter DIODE S3l Equalizer 4000MHz VT400 T160-C4 datasheet abstract |
| Abstract: fließen, die den Gleichrichter gefährden. Durch einen ICL (Inrush Current Limiter) auf Basis eines ... | Original |
4 pages, |
arcelik B32564 B32653 B81122C1222M Fagor IGBTS K560 Kondensatoren bosch NTC K1560 NTC Siemens datasheet abstract |
| Abstract: flip the bit inadvertently (program bugs, incoming inspection routines, and so on). rN om ... | Original |
19 pages, |
STK14D88 local CY14B256L-SZ25XCT CY14B256L-SZ25XC CY14B256L-SP25XC CY14B256L CY14B256L abstract |
| Abstract: Kommt es deswegen gar zum Stillstand von Fließbändern und vollautomatisierten Anlagen, verursachen die ... | Original |
2 pages, |
Lang datasheet abstract |
| Abstract: training on the data lines to cancel out even small differences in signal flight times among the data , instead of per-bit training or use more coarse timing steps. The small differences in signal flight times ... | Original |
24 pages, |
2gbit Refresh 50Gb BGA-136 BGA-78 BI-DIRECTIONAL DDR 2gbit DDR3 pcb layout CLAMSHELL SGRAM POD-15 gddr5 controller GDDR5 pcb layout E1600E10 Elpida GDDR5 E1600E10 abstract |
| Abstract: CHN8 AN54468 Read Out Windowed, flipped, mirrored, and subsampled read out possible ADC Resolution 10-bit ... | Original |
43 pages, |
cmos SENSOR "global shutter" 2/3 CRC10 -0x20 polynomial CYIL2SM1300AA-GZDC mpix LUPA-1300 LUPA1300-2 AN54598 CYIL2SM1300-EVAL CHN 633 Diodes AN5256 CYIL2SC1300AA-GZDC CYIL2SM1300AA CYIL2SM1300AA abstract |
| Abstract: Teilnehmer fließen. Ein weiteres wichtiges Kriterium bei der Qualifizierung des T-Cap-Moduls durch Huawei ... | Original |
3 pages, |
kondensator Huawei datasheet abstract |
| Abstract: contains a power-on reset circuit that resets all the internal flip-flops and initializes the internal ... | Original |
21 pages, |
erj-m1wtf dual slope adc BCX53 93C46 4N35S 220k 192K Liteon QFN-28 s1J C4 QFN28 opto-isolator array MMBTA56 Y1 XTAL 12Mhz NICHIC MX844 MX844 abstract |
| Abstract: Auswirkungen auf die Sende- und Empfangsqualität haben. Unterschiedliche Ausführungen der Telefone wie Flip- ... | Original |
7 pages, |
1148 angep antenne datasheet abstract |
| Abstract: CY7C66013C CY7C66013C, CY7C66113C CY7C66113C Full Speed USB (12 Mbps) Peripheral Controller with Integrated Hub Features Operating temperature from 0°C70°C CY7C66013C CY7C66013C available in 48-pin SSOP (-PVXC) packages CY7C66113C CY7C66113C available in 56-pin QFN or 56-pin SSOP (-PVXC) packages Industry standard programmer support Functional Overview Internal memory 256 bytes of RAM 8 KB of PROM Integrated Master and Slave I2C compatible controller (100 kHz) enabled through General ... | Original |
59 pages, |
CY7C66113C CY7C66013C CY7C66013C abstract |
| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| independent feedbacks, individual output enable, global clear and D/T/latch configurable flip-flops. More www.datasheetarchive.com/files/atmel/atmel/prod2-v5.htm |
Atmel | 20/05/2001 | 24.86 Kb | HTM | prod2-v5.htm |
| /00) Decoders (updated 3/00) Delay Buffers (updated 3/00) Flip-flops (updated 3 www.datasheetarchive.com/files/atmel/atmel/prod84-v3.htm |
Atmel | 20/05/2001 | 51.29 Kb | HTM | prod84-v3.htm |
| buffer by selecting Speed Optimization IP Core Macro Generator Flip-Flop (8 pages, updated www.datasheetarchive.com/files/atmel/atmel/prod100.htm-v1.bak |
Atmel | 07/05/2002 | 69.66 Kb | BAK | prod100.htm-v1.bak |
| logic cells up to 6 inputs latches and flip-flops, including scan flip-flops tristate buffers and www.datasheetarchive.com/files/atmel/atmel/cbic/cbic5_ht.bak |
Atmel | 14/09/1998 | 11.77 Kb | BAK | cbic5_ht.bak |
| logic cells up to 6 inputs latches and flip-flops, including scan flip-flops tristate buffers and www.datasheetarchive.com/files/atmel/atmel/cbic/cbic5.htm |
Atmel | 14/09/1998 | 11.78 Kb | HTM | cbic5.htm |
| combinational logic cells up to 6 inputs latches and flip-flops, including scan flip-flops tristate buffers www.datasheetarchive.com/files/atmel/atmel/cbic5-v2.htm |
Atmel | 07/05/2002 | 18.89 Kb | HTM | cbic5-v2.htm |
| FPSLIC. IP Core Macro Generator Flip-Flop (8 pages, updated 1/02) Parameterized IP Core www.datasheetarchive.com/files/atmel/atmel/prod318.htm-v1.bak |
Atmel | 07/05/2002 | 74.52 Kb | BAK | prod318.htm-v1.bak |
| with active low enable DFF (updated Sep 16 1997) D flip-flop DFFBCPX (updated Sep 16 1997) D flip-flop with asynchronous clear and preset with complementary outputs DFFBSRX (updated Sep 16 1997) D flip-flop with asynchronous set and reset with complemntary outputs DFFC (updated Sep 16 1997) D flip-flop with asynchronous clear DFFR (updated Sep 16 1997) D flip-flop with asychronous reset DFFS (updated Sep 16 1997) D flip-flop with asynchronous set www.datasheetarchive.com/files/atmel/atmel/prod88-v2.htm |
Atmel | 26/05/1998 | 18.59 Kb | HTM | prod88-v2.htm |
| -tronics Avionic Flight computer flight control system voice www.datasheetarchive.com/files/atmel/atmel/prod43a.htm.bak |
Atmel | 07/05/2002 | 30.04 Kb | BAK | prod43a.htm.bak |
| buffer by selecting Speed Optimization IP Core Macro Generator Flip-Flop (8 pages, updated www.datasheetarchive.com/files/atmel/atmel/prod100-v6.htm |
Atmel | 07/05/2002 | 69.66 Kb | HTM | prod100-v6.htm |